ArmPkg/ArmPkg.dsc: move ArmMmuStandaloneMmLib.inf to AARCH64 section

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / PageTbl.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 1da4b5506c965c58ce68326e48b11062042f09c7..117502dafaf8b3bdff34e71795a6e6ed1f1fa7a5 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1,7 +1,7 @@
 /** @file\r
 Page Fault (#PF) handler for X64 processors\r
 \r
-Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
@@ -300,7 +300,9 @@ SmmInitPageTable (
     }\r
   }\r
 \r
-  if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
+  if (FeaturePcdGet (PcdCpuSmmProfileEnable) ||\r
+      HEAP_GUARD_NONSTOP_MODE ||\r
+      NULL_DETECTION_NONSTOP_MODE) {\r
     //\r
     // Set own Page Fault entry instead of the default one, because SMM Profile\r
     // feature depends on IRET instruction to do Single Step\r
@@ -846,42 +848,56 @@ SmiPFHandler (
           DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);\r
         );\r
       }\r
+\r
+      if (HEAP_GUARD_NONSTOP_MODE) {\r
+        GuardPagePFHandler (SystemContext.SystemContextX64->ExceptionData);\r
+        goto Exit;\r
+      }\r
     }\r
     CpuDeadLoop ();\r
   }\r
 \r
   //\r
-  // If a page fault occurs in SMM range\r
+  // If a page fault occurs in non-SMRAM range.\r
   //\r
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
       (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
-    DumpCpuContext (InterruptType, SystemContext);\r
     if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {\r
+      DumpCpuContext (InterruptType, SystemContext);\r
       DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress));\r
       DEBUG_CODE (\r
         DumpModuleInfoByIp (*(UINTN *)(UINTN)SystemContext.SystemContextX64->Rsp);\r
       );\r
       CpuDeadLoop ();\r
     }\r
-    if (IsSmmCommBufferForbiddenAddress (PFAddress)) {\r
-      DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address (0x%lx)!\n", PFAddress));\r
+\r
+    //\r
+    // If NULL pointer was just accessed\r
+    //\r
+    if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&\r
+        (PFAddress < EFI_PAGE_SIZE)) {\r
+      DumpCpuContext (InterruptType, SystemContext);\r
+      DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));\r
       DEBUG_CODE (\r
         DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);\r
       );\r
+\r
+      if (NULL_DETECTION_NONSTOP_MODE) {\r
+        GuardPagePFHandler (SystemContext.SystemContextX64->ExceptionData);\r
+        goto Exit;\r
+      }\r
+\r
       CpuDeadLoop ();\r
     }\r
-  }\r
 \r
-  //\r
-  // If NULL pointer was just accessed\r
-  //\r
-  if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&\r
-      (PFAddress < EFI_PAGE_SIZE)) {\r
-    DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));\r
-    DEBUG_CODE (\r
-      DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);\r
-    );\r
-    CpuDeadLoop ();\r
+    if (mCpuSmmStaticPageTable && IsSmmCommBufferForbiddenAddress (PFAddress)) {\r
+      DumpCpuContext (InterruptType, SystemContext);\r
+      DEBUG ((DEBUG_ERROR, "Access SMM communication forbidden address (0x%lx)!\n", PFAddress));\r
+      DEBUG_CODE (\r
+        DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);\r
+      );\r
+      CpuDeadLoop ();\r
+    }\r
   }\r
 \r
   if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
@@ -893,6 +909,7 @@ SmiPFHandler (
     SmiDefaultPFHandler ();\r
   }\r
 \r
+Exit:\r
   ReleaseSpinLock (mPFLock);\r
 }\r
 \r
@@ -914,20 +931,27 @@ SetPageTableAttributes (
   BOOLEAN               IsSplitted;\r
   BOOLEAN               PageTableSplitted;\r
 \r
-  //
-  // Don't do this if
-  //  - no static page table; or
-  //  - SMM heap guard feature enabled
-  //      BIT2: SMM page guard enabled
-  //      BIT3: SMM pool guard enabled
-  //
-  if (!mCpuSmmStaticPageTable ||
-      (PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) {
-    //
-    // Static paging and heap guard should not be enabled at the same time.
-    //
-    ASSERT (!(mCpuSmmStaticPageTable &&
-              (PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0));
+  //\r
+  // Don't do this if\r
+  //  - no static page table; or\r
+  //  - SMM heap guard feature enabled; or\r
+  //      BIT2: SMM page guard enabled\r
+  //      BIT3: SMM pool guard enabled\r
+  //  - SMM profile feature enabled\r
+  //\r
+  if (!mCpuSmmStaticPageTable ||\r
+      ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) ||\r
+      FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
+    //\r
+    // Static paging and heap guard could not be enabled at the same time.\r
+    //\r
+    ASSERT (!(mCpuSmmStaticPageTable &&\r
+              (PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0));\r
+\r
+    //\r
+    // Static paging and SMM profile could not be enabled at the same time.\r
+    //\r
+    ASSERT (!(mCpuSmmStaticPageTable && FeaturePcdGet (PcdCpuSmmProfileEnable)));\r
     return ;\r
   }\r
 \r