ArmPkg/ArmPkg.dsc: move ArmMmuStandaloneMmLib.inf to AARCH64 section

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmFuncsArch.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
index 6a5d453242ff43b362451aaa2a94a51066bc225e..89b3f2b7257f3a057d9e9f8257da25ce15db7440 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
@@ -1,6 +1,6 @@
 /** @file\r
   SMM CPU misc functions for x64 arch specific.\r
-  \r
+\r
 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
@@ -40,7 +40,7 @@ InitializeIDTSmmStackGuard (
 \r
 /**\r
   Initialize Gdt for all processors.\r
-  \r
+\r
   @param[in]   Cr3          CR3 value.\r
   @param[out]  GdtStepSize  The step size for GDT table.\r
 \r
@@ -110,7 +110,6 @@ GetProtectedModeCS (
   UINTN                    GdtEntryCount;\r
   UINT16                   Index;\r
 \r
-  Index = (UINT16) -1;\r
   AsmReadGdtr (&GdtrDesc);\r
   GdtEntryCount = (GdtrDesc.Limit + 1) / sizeof (IA32_SEGMENT_DESCRIPTOR);\r
   GdtEntry = (IA32_SEGMENT_DESCRIPTOR *) GdtrDesc.Base;\r
@@ -122,7 +121,7 @@ GetProtectedModeCS (
     }\r
     GdtEntry++;\r
   }\r
-  ASSERT (Index != -1);\r
+  ASSERT (Index != GdtEntryCount);\r
   return Index * 8;\r
 }\r
 \r