]> git.proxmox.com Git - mirror_edk2.git/blame - ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
ArmPkg/CpuDxe: Fixed AArch64 MMU/GCD synchronization
[mirror_edk2.git] / ArmPkg / Drivers / CpuDxe / AArch64 / Mmu.c
CommitLineData
25402f5d
HL
1/*++\r
2\r
3Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
4Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
5Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
6\r
7This program and the accompanying materials\r
8are licensed and made available under the terms and conditions of the BSD License\r
9which accompanies this distribution. The full text of the license may be found at\r
10http://opensource.org/licenses/bsd-license.php\r
11\r
12THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15\r
16--*/\r
17\r
5b53eaff 18#include <Library/MemoryAllocationLib.h>\r
25402f5d
HL
19#include "CpuDxe.h"\r
20\r
21#define TT_ATTR_INDX_INVALID ((UINT32)~0)\r
22\r
23STATIC\r
24UINT64\r
25GetFirstPageAttribute (\r
26 IN UINT64 *FirstLevelTableAddress,\r
27 IN UINTN TableLevel\r
28 )\r
29{\r
30 UINT64 FirstEntry;\r
31\r
32 // Get the first entry of the table\r
33 FirstEntry = *FirstLevelTableAddress;\r
34\r
35 if ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) {\r
36 // Only valid for Levels 0, 1 and 2\r
37 ASSERT (TableLevel < 3);\r
38\r
39 // Get the attribute of the subsequent table\r
40 return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1);\r
41 } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) ||\r
42 ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3)))\r
43 {\r
44 return FirstEntry & TT_ATTR_INDX_MASK;\r
45 } else {\r
46 return TT_ATTR_INDX_INVALID;\r
47 }\r
48}\r
49\r
50STATIC\r
51UINT64\r
52GetNextEntryAttribute (\r
53 IN UINT64 *TableAddress,\r
54 IN UINTN EntryCount,\r
55 IN UINTN TableLevel,\r
56 IN UINT64 BaseAddress,\r
57 IN OUT UINT32 *PrevEntryAttribute,\r
58 IN OUT UINT64 *StartGcdRegion\r
59 )\r
60{\r
61 UINTN Index;\r
62 UINT64 Entry;\r
63 UINT32 EntryAttribute;\r
64 UINT32 EntryType;\r
65 EFI_STATUS Status;\r
66 UINTN NumberOfDescriptors;\r
67 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
68\r
69 // Get the memory space map from GCD\r
70 MemorySpaceMap = NULL;\r
71 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
72 ASSERT_EFI_ERROR (Status);\r
73\r
74 // We cannot get more than 3-level page table\r
75 ASSERT (TableLevel <= 3);\r
76\r
77 // While the top level table might not contain TT_ENTRY_COUNT entries;\r
78 // the subsequent ones should be filled up\r
79 for (Index = 0; Index < EntryCount; Index++) {\r
80 Entry = TableAddress[Index];\r
81 EntryType = Entry & TT_TYPE_MASK;\r
82 EntryAttribute = Entry & TT_ATTR_INDX_MASK;\r
83\r
84 // If Entry is a Table Descriptor type entry then go through the sub-level table\r
85 if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||\r
86 ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {\r
87 if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {\r
88 if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
89 // Update GCD with the last region\r
90 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
91 *StartGcdRegion,\r
047c0cbb 92 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
25402f5d
HL
93 PageAttributeToGcdAttribute (EntryAttribute));\r
94 }\r
95\r
96 // Start of the new region\r
97 *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
98 *PrevEntryAttribute = EntryAttribute;\r
99 } else {\r
100 continue;\r
101 }\r
102 } else if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
103 // Table Entry type is only valid for Level 0, 1, 2\r
104 ASSERT (TableLevel < 3);\r
105\r
106 // Increase the level number and scan the sub-level table\r
107 GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE),\r
108 TT_ENTRY_COUNT, TableLevel + 1,\r
109 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),\r
110 PrevEntryAttribute, StartGcdRegion);\r
111 } else {\r
112 if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {\r
113 // Update GCD with the last region\r
114 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
115 *StartGcdRegion,\r
047c0cbb
OM
116 (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
117 PageAttributeToGcdAttribute (*PrevEntryAttribute));\r
25402f5d
HL
118\r
119 // Start of the new region\r
120 *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
121 *PrevEntryAttribute = TT_ATTR_INDX_INVALID;\r
122 }\r
123 }\r
124 }\r
125\r
5b53eaff
OM
126 FreePool (MemorySpaceMap);\r
127\r
25402f5d
HL
128 return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel));\r
129}\r
130\r
131EFI_STATUS\r
132SyncCacheConfig (\r
133 IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol\r
134 )\r
135{\r
136 EFI_STATUS Status;\r
137 UINT32 PageAttribute = 0;\r
138 UINT64 *FirstLevelTableAddress;\r
139 UINTN TableLevel;\r
140 UINTN TableCount;\r
141 UINTN NumberOfDescriptors;\r
142 EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;\r
143 UINTN Tcr;\r
144 UINTN T0SZ;\r
145 UINT64 BaseAddressGcdRegion;\r
146 UINT64 EndAddressGcdRegion;\r
147\r
148 // This code assumes MMU is enabled and filed with section translations\r
149 ASSERT (ArmMmuEnabled ());\r
150\r
151 //\r
152 // Get the memory space map from GCD\r
153 //\r
154 MemorySpaceMap = NULL;\r
155 Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap);\r
156 ASSERT_EFI_ERROR (Status);\r
157\r
158 // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs\r
159 // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a\r
160 // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were\r
161 // a client) to update its copy of the attributes. This is bad architecture and should be replaced\r
162 // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead.\r
163\r
164 // Obtain page table base\r
165 FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ());\r
166\r
167 // Get Translation Control Register value\r
168 Tcr = ArmGetTCR ();\r
169 // Get Address Region Size\r
170 T0SZ = Tcr & TCR_T0SZ_MASK;\r
171\r
172 // Get the level of the first table for the indicated Address Region Size\r
173 GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount);\r
174\r
175 // First Attribute of the Page Tables\r
176 PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel);\r
177\r
178 // We scan from the start of the memory map (ie: at the address 0x0)\r
179 BaseAddressGcdRegion = 0x0;\r
180 EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress,\r
181 TableCount, TableLevel,\r
182 BaseAddressGcdRegion,\r
183 &PageAttribute, &BaseAddressGcdRegion);\r
184\r
047c0cbb
OM
185 // Update GCD with the last region if valid\r
186 if (PageAttribute != TT_ATTR_INDX_INVALID) {\r
187 SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
188 BaseAddressGcdRegion,\r
189 EndAddressGcdRegion - BaseAddressGcdRegion,\r
190 PageAttributeToGcdAttribute (PageAttribute));\r
191 }\r
25402f5d 192\r
5b53eaff
OM
193 FreePool (MemorySpaceMap);\r
194\r
25402f5d
HL
195 return EFI_SUCCESS;\r
196}\r