ArmPkg/CpuDxe: Fixed AArch64 MMU/GCD synchronization

- Fix the length used to set the GCD Memory Space attribute
- Print a warning message if the given length of a memory space region is not 4KB-aligned

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14562 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index da6e6225bed28751dc1c043261912232e422df4f..40a4c1b0aab170769f40daee29397ca4184e7de9 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -89,7 +89,7 @@ GetNextEntryAttribute (
           // Update GCD with the last region\r
           SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
               *StartGcdRegion,\r
-              (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)) - 1) - *StartGcdRegion,\r
+              (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
               PageAttributeToGcdAttribute (EntryAttribute));\r
         }\r
 \r
@@ -113,8 +113,8 @@ GetNextEntryAttribute (
         // Update GCD with the last region\r
         SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
             *StartGcdRegion,\r
-            (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)) - 1) - *StartGcdRegion,\r
-            PageAttributeToGcdAttribute (EntryAttribute));\r
+            (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion,\r
+            PageAttributeToGcdAttribute (*PrevEntryAttribute));\r
 \r
         // Start of the new region\r
         *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));\r
@@ -182,11 +182,13 @@ SyncCacheConfig (
                                                BaseAddressGcdRegion,\r
                                                &PageAttribute, &BaseAddressGcdRegion);\r
 \r
-  // Update GCD with the last region\r
-  SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
-      BaseAddressGcdRegion,\r
-      EndAddressGcdRegion - BaseAddressGcdRegion,\r
-      PageAttributeToGcdAttribute (PageAttribute));\r
+  // Update GCD with the last region if valid\r
+  if (PageAttribute != TT_ATTR_INDX_INVALID) {\r
+    SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,\r
+        BaseAddressGcdRegion,\r
+        EndAddressGcdRegion - BaseAddressGcdRegion,\r
+        PageAttributeToGcdAttribute (PageAttribute));\r
+  }\r
 \r
   FreePool (MemorySpaceMap);\r
 \r

diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
index b1364820a452fe2af06ac2406b80dc494a3e0fc1..e0ee9fc28718b2ddf52b6b65686c87731f9e4fec 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
@@ -96,6 +96,13 @@ SetGcdMemorySpaceAttributes (
   DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n",\r
       BaseAddress, BaseAddress + Length, Attributes));\r
 \r
+  // We do not support a smaller granularity than 4KB on ARM Architecture\r
+  if ((Length & EFI_PAGE_MASK) != 0) {\r
+    DEBUG ((DEBUG_WARN,\r
+            "Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n",\r
+            Length));\r
+  }\r
+\r
   //\r
   // Get all memory descriptors covered by the memory range\r
   //\r