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afdfe8f0 | 1 | /**@file\r |
2 | \r | |
3 | Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r | |
fbcd5cea | 4 | Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>\r |
6f050ad6 | 5 | Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>\r |
44788bae | 6 | \r |
4059386c | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
afdfe8f0 | 8 | \r |
9 | Module Name:\r | |
10 | \r | |
11 | MemoryInit.c\r | |
3402aac7 | 12 | \r |
afdfe8f0 | 13 | Abstract:\r |
14 | \r | |
15 | PEIM to provide fake memory init\r | |
16 | \r | |
17 | **/\r | |
18 | \r | |
19 | \r | |
20 | \r | |
21 | //\r | |
22 | // The package level header files this module uses\r | |
23 | //\r | |
24 | #include <PiPei.h>\r | |
25 | //\r | |
ff5fef14 | 26 | // The protocols, PPI and GUID definitions for this module\r |
afdfe8f0 | 27 | //\r |
44788bae | 28 | #include <Ppi/ArmMpCoreInfo.h>\r |
afdfe8f0 | 29 | \r |
30 | //\r | |
31 | // The Library classes this module consumes\r | |
32 | //\r | |
33 | #include <Library/DebugLib.h>\r | |
34 | #include <Library/PeimEntryPoint.h>\r | |
44788bae | 35 | #include <Library/PeiServicesLib.h>\r |
afdfe8f0 | 36 | #include <Library/PcdLib.h>\r |
37 | #include <Library/HobLib.h>\r | |
38 | #include <Library/ArmLib.h>\r | |
39 | \r | |
afdfe8f0 | 40 | /*++\r |
41 | \r | |
42 | Routine Description:\r | |
43 | \r | |
afdfe8f0 | 44 | Arguments:\r |
45 | \r | |
46 | FileHandle - Handle of the file being invoked.\r | |
47 | PeiServices - Describes the list of possible PEI Services.\r | |
3402aac7 | 48 | \r |
afdfe8f0 | 49 | Returns:\r |
50 | \r | |
51 | Status - EFI_SUCCESS if the boot mode could be set\r | |
52 | \r | |
53 | --*/\r | |
44788bae | 54 | EFI_STATUS\r |
55 | EFIAPI\r | |
56 | InitializeCpuPeim (\r | |
57 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
58 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
59 | )\r | |
afdfe8f0 | 60 | {\r |
44788bae | 61 | EFI_STATUS Status;\r |
62 | ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi;\r | |
63 | UINTN ArmCoreCount;\r | |
64 | ARM_CORE_INFO *ArmCoreInfoTable;\r | |
65 | \r | |
afdfe8f0 | 66 | // Enable program flow prediction, if supported.\r |
67 | ArmEnableBranchPrediction ();\r | |
68 | \r | |
44788bae | 69 | // Publish the CPU memory and io spaces sizes\r |
a3b65371 | 70 | BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));\r |
149daa61 | 71 | \r |
44788bae | 72 | // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid\r |
73 | Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi);\r | |
74 | if (!EFI_ERROR(Status)) {\r | |
75 | // Build the MP Core Info Table\r | |
76 | ArmCoreCount = 0;\r | |
77 | Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r | |
78 | if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {\r | |
79 | // Build MPCore Info HOB\r | |
80 | BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);\r | |
81 | }\r | |
82 | }\r | |
afdfe8f0 | 83 | \r |
84 | return EFI_SUCCESS;\r | |
85 | }\r |