ArmPlatformPkg/ArmJunoPkg: Added the ACPI 5.0 Tables

[mirror_edk2.git] / ArmPlatformPkg / ArmJunoPkg / AcpiTables / Madt.aslc

/** @file\r
*  Multiple APIC Description Table (MADT)\r
*\r
*  Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include "ArmPlatform.h"\r
#include <Library/AcpiLib.h>\r
#include <Library/PcdLib.h>\r
#include <IndustryStandard/Acpi.h>\r
\r
#pragma pack (1)\r
\r
typedef struct {\r
  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;\r
  EFI_ACPI_5_0_GIC_STRUCTURE                            GicInterfaces[FixedPcdGet32 (PcdCoreCount)];\r
  EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;\r
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;\r
\r
#pragma pack ()\r
\r
//\r
// Multiple APIC Description Table\r
//\r
EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {\r
  {\r
    ARM_ACPI_HEADER (\r
      EFI_ACPI_1_0_APIC_SIGNATURE,\r
      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,\r
      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION\r
    ),\r
    //\r
    // MADT specific fields\r
    //\r
    0, // LocalApicAddress\r
    0, // Flags\r
  },\r
  {\r
    // Format: EFI_ACPI_5_0_GIC_STRUCTURE_INIT(GicId, AcpiCpuId, Flags, PmuIrq, GicBase)\r
    // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GIC Structure of\r
    //       ACPI v5.0).\r
    //       On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the\r
    //       Trusted Firmware. When supported, we will need to code to dynamically change the ordering.\r
    //       For now we leave CPU2 (A53-0) at the first position.\r
    //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses\r
    //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.\r
    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 2, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0\r
    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 3, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1\r
    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 4, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2\r
    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 5, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3\r
    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 0, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0\r
    EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 1, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase))  // A57-1\r
  },\r
  EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)\r
};\r
\r
VOID*\r
ReferenceAcpiTable (\r
  VOID\r
  )\r
{\r
  //\r
  // Reference the table being generated to prevent the optimizer from removing the\r
  // data structure from the executable\r
  //\r
  return (VOID*)&Madt;\r
}\r