2 * Multiple APIC Description Table (MADT)
4 * Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include "ArmPlatform.h"
17 #include <Library/AcpiLib.h>
18 #include <Library/PcdLib.h>
19 #include <IndustryStandard/Acpi.h>
24 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
25 EFI_ACPI_5_0_GIC_STRUCTURE GicInterfaces[FixedPcdGet32 (PcdCoreCount)];
26 EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
27 } EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
32 // Multiple APIC Description Table
34 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
37 EFI_ACPI_1_0_APIC_SIGNATURE,
38 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
39 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
42 // MADT specific fields
44 0, // LocalApicAddress
48 // Format: EFI_ACPI_5_0_GIC_STRUCTURE_INIT(GicId, AcpiCpuId, Flags, PmuIrq, GicBase)
49 // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GIC Structure of
51 // On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the
52 // Trusted Firmware. When supported, we will need to code to dynamically change the ordering.
53 // For now we leave CPU2 (A53-0) at the first position.
54 // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
55 // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
56 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 2, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0
57 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 3, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1
58 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 4, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2
59 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 5, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3
60 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 0, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0
61 EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 1, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase)) // A57-1
63 EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)
72 // Reference the table being generated to prevent the optimizer from removing the
73 // data structure from the executable