[mirror_edk2.git] / ArmPlatformPkg / Drivers / NorFlashDxe / NorFlashDxe.h

/** @file  NorFlashDxe.h\r
\r
  Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef __NOR_FLASH_DXE_H__\r
#define __NOR_FLASH_DXE_H__\r
\r
\r
#include <Base.h>\r
#include <PiDxe.h>\r
\r
#include <Protocol/BlockIo.h>\r
#include <Protocol/FirmwareVolumeBlock.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/NorFlashPlatformLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/UefiRuntimeLib.h>\r
\r
#define NOR_FLASH_ERASE_RETRY                     10\r
\r
// Device access macros\r
// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
\r
#define HIGH_16_BITS                              0xFFFF0000\r
#define LOW_16_BITS                               0x0000FFFF\r
#define LOW_8_BITS                                0x000000FF\r
\r
#define FOLD_32BIT_INTO_16BIT(value)              ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r
\r
#define GET_LOW_BYTE(value)                       ( value & LOW_8_BITS )\r
#define GET_HIGH_BYTE(value)                      ( GET_LOW_BYTE( value >> 16 ) )\r
\r
// Each command must be sent simultaneously to both chips,\r
// i.e. at the lower 16 bits AND at the higher 16 bits\r
#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr)   ((BaseAddr) + ((OffsetAddr) << 2))\r
#define CREATE_DUAL_CMD(Cmd)                      ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r
#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
\r
// Status Register Bits\r
#define P30_SR_BIT_WRITE                          (BIT7 << 16 | BIT7)\r
#define P30_SR_BIT_ERASE_SUSPEND                  (BIT6 << 16 | BIT6)\r
#define P30_SR_BIT_ERASE                          (BIT5 << 16 | BIT5)\r
#define P30_SR_BIT_PROGRAM                        (BIT4 << 16 | BIT4)\r
#define P30_SR_BIT_VPP                            (BIT3 << 16 | BIT3)\r
#define P30_SR_BIT_PROGRAM_SUSPEND                (BIT2 << 16 | BIT2)\r
#define P30_SR_BIT_BLOCK_LOCKED                   (BIT1 << 16 | BIT1)\r
#define P30_SR_BIT_BEFP                           (BIT0 << 16 | BIT0)\r
\r
// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
\r
// On chip buffer size for buffered programming operations\r
// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
#define P30_MAX_BUFFER_SIZE_IN_BYTES              ((UINTN)128)\r
#define P30_MAX_BUFFER_SIZE_IN_WORDS              (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
#define MAX_BUFFERED_PROG_ITERATIONS              10000000\r
#define BOUNDARY_OF_32_WORDS                      0x7F\r
\r
// CFI Addresses\r
#define P30_CFI_ADDR_QUERY_UNIQUE_QRY             0x10\r
#define P30_CFI_ADDR_VENDOR_ID                    0x13\r
\r
// CFI Data\r
#define CFI_QRY                                   0x00595251\r
\r
// READ Commands\r
#define P30_CMD_READ_DEVICE_ID                    0x0090\r
#define P30_CMD_READ_STATUS_REGISTER              0x0070\r
#define P30_CMD_CLEAR_STATUS_REGISTER             0x0050\r
#define P30_CMD_READ_ARRAY                        0x00FF\r
#define P30_CMD_READ_CFI_QUERY                    0x0098\r
\r
// WRITE Commands\r
#define P30_CMD_WORD_PROGRAM_SETUP                0x0040\r
#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP      0x0010\r
#define P30_CMD_BUFFERED_PROGRAM_SETUP            0x00E8\r
#define P30_CMD_BUFFERED_PROGRAM_CONFIRM          0x00D0\r
#define P30_CMD_BEFP_SETUP                        0x0080\r
#define P30_CMD_BEFP_CONFIRM                      0x00D0\r
\r
// ERASE Commands\r
#define P30_CMD_BLOCK_ERASE_SETUP                 0x0020\r
#define P30_CMD_BLOCK_ERASE_CONFIRM               0x00D0\r
\r
// SUSPEND Commands\r
#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND          0x00B0\r
#define P30_CMD_SUSPEND_RESUME                    0x00D0\r
\r
// BLOCK LOCKING / UNLOCKING Commands\r
#define P30_CMD_LOCK_BLOCK_SETUP                  0x0060\r
#define P30_CMD_LOCK_BLOCK                        0x0001\r
#define P30_CMD_UNLOCK_BLOCK                      0x00D0\r
#define P30_CMD_LOCK_DOWN_BLOCK                   0x002F\r
\r
// PROTECTION Commands\r
#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
\r
// CONFIGURATION Commands\r
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
#define P30_CMD_READ_CONFIGURATION_REGISTER       0x0003\r
\r
#define NOR_FLASH_SIGNATURE                       SIGNATURE_32('n', 'o', 'r', '0')\r
#define INSTANCE_FROM_FVB_THIS(a)                 CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
#define INSTANCE_FROM_BLKIO_THIS(a)               CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
\r
typedef struct _NOR_FLASH_INSTANCE                NOR_FLASH_INSTANCE;\r
\r
typedef EFI_STATUS (*NOR_FLASH_INITIALIZE)        (NOR_FLASH_INSTANCE* Instance);\r
\r
typedef struct {\r
  VENDOR_DEVICE_PATH                  Vendor;\r
  EFI_DEVICE_PATH_PROTOCOL            End;\r
} NOR_FLASH_DEVICE_PATH;\r
\r
struct _NOR_FLASH_INSTANCE {\r
  UINT32                              Signature;\r
  EFI_HANDLE                          Handle;\r
\r
  BOOLEAN                             Initialized;\r
  NOR_FLASH_INITIALIZE                Initialize;\r
\r
  UINTN                               DeviceBaseAddress;\r
  UINTN                               RegionBaseAddress;\r
  UINTN                               Size;\r
  EFI_LBA                             StartLba;\r
\r
  EFI_BLOCK_IO_PROTOCOL               BlockIoProtocol;\r
  EFI_BLOCK_IO_MEDIA                  Media;\r
\r
  BOOLEAN                             SupportFvb;\r
  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
  VOID*                               FvbBuffer;\r
\r
  NOR_FLASH_DEVICE_PATH	              DevicePath;\r
};\r
\r
EFI_STATUS\r
NorFlashReadCfiData (\r
  IN  UINTN                   DeviceBaseAddress,\r
  IN  UINTN                   CFI_Offset,\r
  IN  UINT32                  NumberOfBytes,\r
  OUT UINT32                  *Data\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteBuffer (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN UINTN                  TargetAddress,\r
  IN UINTN                  BufferSizeInBytes,\r
  IN UINT32                 *Buffer\r
  );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReset (\r
  IN EFI_BLOCK_IO_PROTOCOL    *This,\r
  IN BOOLEAN                  ExtendedVerification\r
  );\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoReadBlocks (\r
  IN  EFI_BLOCK_IO_PROTOCOL   *This,\r
  IN  UINT32                  MediaId,\r
  IN  EFI_LBA                 Lba,\r
  IN  UINTN                   BufferSizeInBytes,\r
  OUT VOID                    *Buffer\r
);\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoWriteBlocks (\r
  IN  EFI_BLOCK_IO_PROTOCOL   *This,\r
  IN  UINT32                  MediaId,\r
  IN  EFI_LBA                 Lba,\r
  IN  UINTN                   BufferSizeInBytes,\r
  IN  VOID                    *Buffer\r
);\r
\r
//\r
// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
//\r
EFI_STATUS\r
EFIAPI\r
NorFlashBlockIoFlushBlocks (\r
  IN EFI_BLOCK_IO_PROTOCOL    *This\r
);\r
\r
\r
//\r
// NorFlashFvbDxe.c\r
//\r
\r
EFI_STATUS\r
EFIAPI\r
NorFlashFvbInitialize (\r
  IN NOR_FLASH_INSTANCE*                            Instance\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetAttributes(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  OUT       EFI_FVB_ATTRIBUTES_2                    *Attributes\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbSetAttributes(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN OUT    EFI_FVB_ATTRIBUTES_2                    *Attributes\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetPhysicalAddress(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  OUT       EFI_PHYSICAL_ADDRESS                    *Address\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbGetBlockSize(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  OUT       UINTN                                   *BlockSize,\r
  OUT       UINTN                                   *NumberOfBlocks\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbRead(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  IN        UINTN                                   Offset,\r
  IN OUT    UINTN                                   *NumBytes,\r
  IN OUT    UINT8                                   *Buffer\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbWrite(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  IN        EFI_LBA                                 Lba,\r
  IN        UINTN                                   Offset,\r
  IN OUT    UINTN                                   *NumBytes,\r
  IN        UINT8                                   *Buffer\r
  );\r
\r
EFI_STATUS\r
EFIAPI\r
FvbEraseBlocks(\r
  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,\r
  ...\r
  );\r
\r
//\r
// NorFlashDxe.c\r
//\r
\r
EFI_STATUS\r
NorFlashUnlockAndEraseSingleBlock (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN UINTN                  BlockAddress\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteSingleBlock (\r
  IN NOR_FLASH_INSTANCE     *Instance,\r
  IN EFI_LBA                Lba,\r
  IN UINT32                 *DataBuffer,\r
  IN UINT32                 BlockSizeInWords\r
  );\r
\r
EFI_STATUS\r
NorFlashWriteBlocks (\r
  IN  NOR_FLASH_INSTANCE *Instance,\r
  IN  EFI_LBA           Lba,\r
  IN  UINTN             BufferSizeInBytes,\r
  IN  VOID              *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashReadBlocks (\r
  IN NOR_FLASH_INSTANCE   *Instance,\r
  IN EFI_LBA              Lba,\r
  IN UINTN                BufferSizeInBytes,\r
  OUT VOID                *Buffer\r
  );\r
\r
EFI_STATUS\r
NorFlashReset (\r
  IN  NOR_FLASH_INSTANCE *Instance\r
  );\r
\r
#endif /* __NOR_FLASH_DXE_H__ */\r
Commit	Line	Data
1e57a462	1	/** @file NorFlashDxe.h\r
1e57a462	2	\r
2dff0c1a	3	Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
1e57a462	4	\r
	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#ifndef __NOR_FLASH_DXE_H__\r
	16	#define __NOR_FLASH_DXE_H__\r
	17	\r
	18	\r
	19	#include <Base.h>\r
	20	#include <PiDxe.h>\r
	21	\r
	22	#include <Protocol/BlockIo.h>\r
	23	#include <Protocol/FirmwareVolumeBlock.h>\r
	24	\r
	25	#include <Library/DebugLib.h>\r
	26	#include <Library/IoLib.h>\r
	27	#include <Library/NorFlashPlatformLib.h>\r
	28	#include <Library/UefiLib.h>\r
2dff0c1a	29	#include <Library/UefiRuntimeLib.h>\r
1e57a462	30	\r
	31	#define NOR_FLASH_ERASE_RETRY 10\r
	32	\r
	33	// Device access macros\r
	34	// These are necessary because we use 2 x 16bit parts to make up 32bit data\r
	35	\r
	36	#define HIGH_16_BITS 0xFFFF0000\r
	37	#define LOW_16_BITS 0x0000FFFF\r
	38	#define LOW_8_BITS 0x000000FF\r
	39	\r
	40	#define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) \| ( value & LOW_16_BITS ) )\r
	41	\r
	42	#define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r
	43	#define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r
	44	\r
	45	// Each command must be sent simultaneously to both chips,\r
	46	// i.e. at the lower 16 bits AND at the higher 16 bits\r
	47	#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r
	48	#define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) \| ( Cmd & LOW_16_BITS) )\r
	49	#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r
	50	#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )\r
	51	\r
	52	// Status Register Bits\r
	53	#define P30_SR_BIT_WRITE (BIT7 << 16 \| BIT7)\r
	54	#define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 \| BIT6)\r
	55	#define P30_SR_BIT_ERASE (BIT5 << 16 \| BIT5)\r
	56	#define P30_SR_BIT_PROGRAM (BIT4 << 16 \| BIT4)\r
	57	#define P30_SR_BIT_VPP (BIT3 << 16 \| BIT3)\r
	58	#define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 \| BIT2)\r
	59	#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 \| BIT1)\r
	60	#define P30_SR_BIT_BEFP (BIT0 << 16 \| BIT0)\r
	61	\r
	62	// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r
	63	\r
	64	// On chip buffer size for buffered programming operations\r
	65	// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r
	66	// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r
	67	#define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r
	68	#define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r
	69	#define MAX_BUFFERED_PROG_ITERATIONS 10000000\r
	70	#define BOUNDARY_OF_32_WORDS 0x7F\r
	71	\r
	72	// CFI Addresses\r
	73	#define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r
	74	#define P30_CFI_ADDR_VENDOR_ID 0x13\r
	75	\r
	76	// CFI Data\r
	77	#define CFI_QRY 0x00595251\r
	78	\r
	79	// READ Commands\r
	80	#define P30_CMD_READ_DEVICE_ID 0x0090\r
	81	#define P30_CMD_READ_STATUS_REGISTER 0x0070\r
	82	#define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r
	83	#define P30_CMD_READ_ARRAY 0x00FF\r
	84	#define P30_CMD_READ_CFI_QUERY 0x0098\r
	85	\r
	86	// WRITE Commands\r
	87	#define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r
	88	#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r
	89	#define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r
	90	#define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r
	91	#define P30_CMD_BEFP_SETUP 0x0080\r
	92	#define P30_CMD_BEFP_CONFIRM 0x00D0\r
	93	\r
94	// ERASE Commands\r
95	#define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r
96	#define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r
97	\r
98	// SUSPEND Commands\r
99	#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r
100	#define P30_CMD_SUSPEND_RESUME 0x00D0\r
101	\r
102	// BLOCK LOCKING / UNLOCKING Commands\r
103	#define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r
104	#define P30_CMD_LOCK_BLOCK 0x0001\r
105	#define P30_CMD_UNLOCK_BLOCK 0x00D0\r
106	#define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r
107	\r
108	// PROTECTION Commands\r
109	#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r
110	\r
111	// CONFIGURATION Commands\r
112	#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r
113	#define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r
114	\r
115	#define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r
116	#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r
117	#define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r
118	\r
119	typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r
120	\r
121	typedef EFI_STATUS (NOR_FLASH_INITIALIZE) (NOR_FLASH_INSTANCE Instance);\r
122	\r
123	typedef struct {\r
124	VENDOR_DEVICE_PATH Vendor;\r
125	EFI_DEVICE_PATH_PROTOCOL End;\r
126	} NOR_FLASH_DEVICE_PATH;\r
127	\r
128	struct _NOR_FLASH_INSTANCE {\r
129	UINT32 Signature;\r
130	EFI_HANDLE Handle;\r
131	\r
132	BOOLEAN Initialized;\r
133	NOR_FLASH_INITIALIZE Initialize;\r
134	\r
135	UINTN DeviceBaseAddress;\r
136	UINTN RegionBaseAddress;\r
137	UINTN Size;\r
138	EFI_LBA StartLba;\r
139	\r
140	EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r
141	EFI_BLOCK_IO_MEDIA Media;\r
142	\r
143	BOOLEAN SupportFvb;\r
144	EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r
2dff0c1a	145	VOID* FvbBuffer;\r
1e57a462	146	\r
	147	NOR_FLASH_DEVICE_PATH DevicePath;\r
	148	};\r
	149	\r
	150	EFI_STATUS\r
	151	NorFlashReadCfiData (\r
	152	IN UINTN DeviceBaseAddress,\r
	153	IN UINTN CFI_Offset,\r
	154	IN UINT32 NumberOfBytes,\r
	155	OUT UINT32 *Data\r
	156	);\r
	157	\r
	158	EFI_STATUS\r
	159	NorFlashWriteBuffer (\r
	160	IN NOR_FLASH_INSTANCE *Instance,\r
	161	IN UINTN TargetAddress,\r
	162	IN UINTN BufferSizeInBytes,\r
	163	IN UINT32 *Buffer\r
	164	);\r
	165	\r
	166	//\r
	167	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r
	168	//\r
	169	EFI_STATUS\r
	170	EFIAPI\r
	171	NorFlashBlockIoReset (\r
	172	IN EFI_BLOCK_IO_PROTOCOL *This,\r
	173	IN BOOLEAN ExtendedVerification\r
	174	);\r
	175	\r
	176	//\r
	177	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r
	178	//\r
	179	EFI_STATUS\r
	180	EFIAPI\r
	181	NorFlashBlockIoReadBlocks (\r
	182	IN EFI_BLOCK_IO_PROTOCOL *This,\r
	183	IN UINT32 MediaId,\r
	184	IN EFI_LBA Lba,\r
	185	IN UINTN BufferSizeInBytes,\r
	186	OUT VOID *Buffer\r
	187	);\r
	188	\r
	189	//\r
	190	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r
	191	//\r
	192	EFI_STATUS\r
	193	EFIAPI\r
	194	NorFlashBlockIoWriteBlocks (\r
	195	IN EFI_BLOCK_IO_PROTOCOL *This,\r
	196	IN UINT32 MediaId,\r
	197	IN EFI_LBA Lba,\r
	198	IN UINTN BufferSizeInBytes,\r
	199	IN VOID *Buffer\r
	200	);\r
	201	\r
	202	//\r
	203	// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r
	204	//\r
	205	EFI_STATUS\r
	206	EFIAPI\r
	207	NorFlashBlockIoFlushBlocks (\r
	208	IN EFI_BLOCK_IO_PROTOCOL *This\r
	209	);\r
210	\r
211	\r
212	//\r
213	// NorFlashFvbDxe.c\r
214	//\r
215	\r
216	EFI_STATUS\r
217	EFIAPI\r
218	NorFlashFvbInitialize (\r
219	IN NOR_FLASH_INSTANCE* Instance\r
220	);\r
221	\r
222	EFI_STATUS\r
223	EFIAPI\r
224	FvbGetAttributes(\r
225	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
226	OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
227	);\r
228	\r
229	EFI_STATUS\r
230	EFIAPI\r
231	FvbSetAttributes(\r
232	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
233	IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r
234	);\r
235	\r
236	EFI_STATUS\r
237	EFIAPI\r
238	FvbGetPhysicalAddress(\r
239	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
240	OUT EFI_PHYSICAL_ADDRESS *Address\r
241	);\r
242	\r
243	EFI_STATUS\r
244	EFIAPI\r
245	FvbGetBlockSize(\r
246	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
247	IN EFI_LBA Lba,\r
248	OUT UINTN *BlockSize,\r
249	OUT UINTN *NumberOfBlocks\r
250	);\r
251	\r
252	EFI_STATUS\r
253	EFIAPI\r
254	FvbRead(\r
255	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
256	IN EFI_LBA Lba,\r
257	IN UINTN Offset,\r
258	IN OUT UINTN *NumBytes,\r
259	IN OUT UINT8 *Buffer\r
260	);\r
261	\r
262	EFI_STATUS\r
263	EFIAPI\r
264	FvbWrite(\r
265	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
266	IN EFI_LBA Lba,\r
267	IN UINTN Offset,\r
268	IN OUT UINTN *NumBytes,\r
269	IN UINT8 *Buffer\r
270	);\r
271	\r
272	EFI_STATUS\r
273	EFIAPI\r
274	FvbEraseBlocks(\r
275	IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r
276	...\r
277	);\r
278	\r
279	//\r
280	// NorFlashDxe.c\r
281	//\r
282	\r
283	EFI_STATUS\r
284	NorFlashUnlockAndEraseSingleBlock (\r
285	IN NOR_FLASH_INSTANCE *Instance,\r
286	IN UINTN BlockAddress\r
287	);\r
288	\r
289	EFI_STATUS\r
290	NorFlashWriteSingleBlock (\r
291	IN NOR_FLASH_INSTANCE *Instance,\r
292	IN EFI_LBA Lba,\r
293	IN UINT32 *DataBuffer,\r
294	IN UINT32 BlockSizeInWords\r
295	);\r
296	\r
297	EFI_STATUS\r
298	NorFlashWriteBlocks (\r
299	IN NOR_FLASH_INSTANCE *Instance,\r
300	IN EFI_LBA Lba,\r
301	IN UINTN BufferSizeInBytes,\r
302	IN VOID *Buffer\r
303	);\r
304	\r
305	EFI_STATUS\r
306	NorFlashReadBlocks (\r
307	IN NOR_FLASH_INSTANCE *Instance,\r
308	IN EFI_LBA Lba,\r
309	IN UINTN BufferSizeInBytes,\r
310	OUT VOID *Buffer\r
311	);\r
312	\r
313	EFI_STATUS\r
314	NorFlashReset (\r
315	IN NOR_FLASH_INSTANCE *Instance\r
316	);\r
317	\r
318	#endif /* __NOR_FLASH_DXE_H__ */\r