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b1b69d26 1/** @file\r
4257dfaa 2 This file contains the platform independent parts of HdLcd\r
3e7105bb 3\r
b1b69d26 4 Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
3e7105bb 5\r
f4dfad05 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7\r
8**/\r
9\r
10#include <Library/DebugLib.h>\r
11#include <Library/IoLib.h>\r
12#include <Library/LcdHwLib.h>\r
13#include <Library/LcdPlatformLib.h>\r
14#include <Library/MemoryAllocationLib.h>\r
15#include <Library/PcdLib.h>\r
16\r
17#include "HdLcd.h"\r
18\r
40b0b23e 19#define BYTES_PER_PIXEL 4\r
3e7105bb 20\r
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21/** Initialize display.\r
22\r
23 @param[in] VramBaseAddress Address of the framebuffer.\r
24\r
25 @retval EFI_SUCCESS Display initialization successful.\r
26**/\r
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27EFI_STATUS\r
28LcdInitialize (\r
40b0b23e 29 IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
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30 )\r
31{\r
32 // Disable the controller\r
b1b69d26 33 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
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34\r
35 // Disable all interrupts\r
b1b69d26 36 MmioWrite32 (HDLCD_REG_INT_MASK, 0);\r
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37\r
38 // Define start of the VRAM. This never changes for any graphics mode\r
b1b69d26 39 MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);\r
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40\r
41 // Setup various registers that never change\r
40b0b23e 42 MmioWrite32 (HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);\r
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GP
43\r
44 MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);\r
45\r
46 MmioWrite32 (\r
47 HDLCD_REG_PIXEL_FORMAT,\r
48 HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL\r
49 );\r
50\r
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51 return EFI_SUCCESS;\r
52}\r
53\r
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54/** Set requested mode of the display.\r
55\r
56 @param[in] ModeNumber Display mode number.\r
57\r
58 @retval EFI_SUCCESS Display mode set successfully.\r
3da4193b 59 @retval !(EFI_SUCCESS) Other errors.\r
4257dfaa 60**/\r
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61EFI_STATUS\r
62LcdSetMode (\r
63 IN UINT32 ModeNumber\r
64 )\r
65{\r
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66 EFI_STATUS Status;\r
67 SCAN_TIMINGS *Horizontal;\r
68 SCAN_TIMINGS *Vertical;\r
fe787dfb 69\r
268aad67
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70 EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;\r
71\r
fe787dfb 72 EFI_GRAPHICS_OUTPUT_MODE_INFORMATION ModeInfo;\r
3e7105bb 73\r
3e7105bb 74 // Set the video mode timings and other relevant information\r
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75 Status = LcdPlatformGetTimings (\r
76 ModeNumber,\r
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77 &Horizontal,\r
78 &Vertical\r
b1b69d26 79 );\r
b1b69d26 80 if (EFI_ERROR (Status)) {\r
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81 ASSERT_EFI_ERROR (Status);\r
82 return Status;\r
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83 }\r
84\r
262c8846
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85 ASSERT (Horizontal != NULL);\r
86 ASSERT (Vertical != NULL);\r
87\r
fe787dfb
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88 // Get the pixel format information.\r
89 Status = LcdPlatformQueryMode (ModeNumber, &ModeInfo);\r
b1b69d26 90 if (EFI_ERROR (Status)) {\r
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91 ASSERT_EFI_ERROR (Status);\r
92 return Status;\r
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93 }\r
94\r
268aad67
GP
95 // By default PcdArmHdLcdSwapBlueRedSelect is set to false\r
96 // However on the Juno platform HW lines for BLUE and RED are swapped\r
97 // Therefore PcdArmHdLcdSwapBlueRedSelect is set to TRUE for the Juno platform\r
98 PixelFormat = FixedPcdGetBool (PcdArmHdLcdSwapBlueRedSelect)\r
99 ? PixelRedGreenBlueReserved8BitPerColor\r
100 : PixelBlueGreenRedReserved8BitPerColor;\r
101\r
102 if (ModeInfo.PixelFormat == PixelFormat) {\r
40b0b23e 103 MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 16);\r
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104 MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 0);\r
105 } else {\r
106 MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 16);\r
40b0b23e 107 MmioWrite32 (HDLCD_REG_RED_SELECT, (8 << 8) | 0);\r
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108 }\r
109\r
110 MmioWrite32 (HDLCD_REG_GREEN_SELECT, (8 << 8) | 8);\r
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111\r
112 // Disable the controller\r
b1b69d26 113 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
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114\r
115 // Update the frame buffer information with the new settings\r
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116 MmioWrite32 (\r
117 HDLCD_REG_FB_LINE_LENGTH,\r
fe787dfb 118 Horizontal->Resolution * BYTES_PER_PIXEL\r
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119 );\r
120\r
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121 MmioWrite32 (\r
122 HDLCD_REG_FB_LINE_PITCH,\r
123 Horizontal->Resolution * BYTES_PER_PIXEL\r
124 );\r
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125\r
126 MmioWrite32 (HDLCD_REG_FB_LINE_COUNT, Vertical->Resolution - 1);\r
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127\r
128 // Set the vertical timing information\r
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129 MmioWrite32 (HDLCD_REG_V_SYNC, Vertical->Sync);\r
130 MmioWrite32 (HDLCD_REG_V_BACK_PORCH, Vertical->BackPorch);\r
131 MmioWrite32 (HDLCD_REG_V_DATA, Vertical->Resolution - 1);\r
262c8846 132 MmioWrite32 (HDLCD_REG_V_FRONT_PORCH, Vertical->FrontPorch);\r
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133\r
134 // Set the horizontal timing information\r
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135 MmioWrite32 (HDLCD_REG_H_SYNC, Horizontal->Sync);\r
136 MmioWrite32 (HDLCD_REG_H_BACK_PORCH, Horizontal->BackPorch);\r
137 MmioWrite32 (HDLCD_REG_H_DATA, Horizontal->Resolution - 1);\r
262c8846 138 MmioWrite32 (HDLCD_REG_H_FRONT_PORCH, Horizontal->FrontPorch);\r
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139\r
140 // Enable the controller\r
b1b69d26 141 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_ENABLE);\r
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142\r
143 return EFI_SUCCESS;\r
144}\r
145\r
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146/** De-initializes the display.\r
147**/\r
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148VOID\r
149LcdShutdown (\r
150 VOID\r
151 )\r
152{\r
153 // Disable the controller\r
154 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
155}\r
156\r
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157/** Check for presence of HDLCD.\r
158\r
159 @retval EFI_SUCCESS Returns success if platform implements a HDLCD\r
160 controller.\r
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161 @retval EFI_NOT_FOUND HDLCD display controller not found on the\r
162 platform.\r
4257dfaa 163**/\r
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164EFI_STATUS\r
165LcdIdentify (\r
166 VOID\r
167 )\r
168{\r
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169 if ((MmioRead32 (HDLCD_REG_VERSION) >> 16) == HDLCD_PRODUCT_ID) {\r
170 return EFI_SUCCESS;\r
171 }\r
172\r
173 return EFI_NOT_FOUND;\r
3e7105bb 174}\r