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ArmPlatformPkg: reorganize PL011 code
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1e57a462 1/** @file\r
2 Serial I/O Port library functions with no library constructor/destructor\r
3\r
4 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
9f08a052 5 Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>\r
921e987b 6 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
3402aac7 7\r
1e57a462 8 This program and the accompanying materials\r
9 are licensed and made available under the terms and conditions of the BSD License\r
10 which accompanies this distribution. The full text of the license may be found at\r
11 http://opensource.org/licenses/bsd-license.php\r
12\r
13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
16**/\r
17\r
18#include <Base.h>\r
19\r
20#include <Library/IoLib.h>\r
21#include <Library/PcdLib.h>\r
12156134 22#include <Library/PL011UartLib.h>\r
1e57a462 23#include <Library/SerialPortLib.h>\r
1e57a462 24\r
2d52a3a2 25/** Initialise the serial device hardware with default settings.\r
1e57a462 26\r
2d52a3a2
A
27 @retval RETURN_SUCCESS The serial device was initialised.\r
28 @retval RETURN_INVALID_PARAMETER One or more of the default settings\r
29 has an unsupported value.\r
30 **/\r
1e57a462 31RETURN_STATUS\r
32EFIAPI\r
33SerialPortInitialize (\r
34 VOID\r
35 )\r
36{\r
15e277d5 37 UINT64 BaudRate;\r
38 UINT32 ReceiveFifoDepth;\r
39 EFI_PARITY_TYPE Parity;\r
40 UINT8 DataBits;\r
41 EFI_STOP_BITS_TYPE StopBits;\r
42\r
a4bcf0bc 43 BaudRate = FixedPcdGet64 (PcdUartDefaultBaudRate);\r
9f08a052 44 ReceiveFifoDepth = 0; // Use default FIFO depth\r
aadc64e6
EL
45 Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
46 DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
47 StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);\r
15e277d5 48\r
1e57a462 49 return PL011UartInitializePort (\r
f6300528
EL
50 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),\r
51 FixedPcdGet32 (PL011UartClkInHz),\r
52 &BaudRate,\r
53 &ReceiveFifoDepth,\r
54 &Parity,\r
55 &DataBits,\r
56 &StopBits\r
57 );\r
1e57a462 58}\r
59\r
60/**\r
61 Write data to serial device.\r
62\r
63 @param Buffer Point of data buffer which need to be written.\r
64 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
65\r
66 @retval 0 Write data failed.\r
67 @retval !0 Actual number of bytes written to serial device.\r
68\r
69**/\r
70UINTN\r
71EFIAPI\r
72SerialPortWrite (\r
73 IN UINT8 *Buffer,\r
74 IN UINTN NumberOfBytes\r
75 )\r
76{\r
aadc64e6 77 return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
1e57a462 78}\r
79\r
80/**\r
81 Read data from serial device and save the data in buffer.\r
82\r
83 @param Buffer Point of data buffer which need to be written.\r
84 @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
85\r
86 @retval 0 Read data failed.\r
87 @retval !0 Actual number of bytes read from serial device.\r
88\r
89**/\r
90UINTN\r
91EFIAPI\r
92SerialPortRead (\r
93 OUT UINT8 *Buffer,\r
94 IN UINTN NumberOfBytes\r
95)\r
96{\r
aadc64e6 97 return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
1e57a462 98}\r
99\r
100/**\r
101 Check to see if any data is available to be read from the debug device.\r
102\r
2d52a3a2
A
103 @retval TRUE At least one byte of data is available to be read\r
104 @retval FALSE No data is available to be read\r
1e57a462 105\r
106**/\r
107BOOLEAN\r
108EFIAPI\r
109SerialPortPoll (\r
110 VOID\r
111 )\r
112{\r
aadc64e6 113 return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));\r
1e57a462 114}\r
921e987b
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115/**\r
116 Set new attributes to PL011.\r
117\r
9f08a052
EL
118 @param BaudRate The baud rate of the serial device. If the\r
119 baud rate is not supported, the speed will\r
120 be reduced down to the nearest supported one\r
121 and the variable's value will be updated\r
122 accordingly.\r
123 @param ReceiveFifoDepth The number of characters the device will\r
124 buffer on input. If the specified value is\r
125 not supported, the variable's value will\r
126 be reduced down to the nearest supported one.\r
127 @param Timeout If applicable, the number of microseconds the\r
128 device will wait before timing out a Read or\r
129 a Write operation.\r
130 @param Parity If applicable, this is the EFI_PARITY_TYPE\r
131 that is computed or checked as each character\r
132 is transmitted or received. If the device\r
133 does not support parity, the value is the\r
134 default parity value.\r
921e987b 135 @param DataBits The number of data bits in each character\r
9f08a052
EL
136 @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
137 of stop bits per character. If the device\r
138 does not support stop bits, the value is the\r
139 default stop bit value.\r
921e987b 140\r
9f08a052
EL
141 @retval EFI_SUCCESS All attributes were set correctly.\r
142 @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported\r
143 value.\r
921e987b
SZ
144\r
145**/\r
146RETURN_STATUS\r
147EFIAPI\r
148SerialPortSetAttributes (\r
149 IN OUT UINT64 *BaudRate,\r
150 IN OUT UINT32 *ReceiveFifoDepth,\r
151 IN OUT UINT32 *Timeout,\r
152 IN OUT EFI_PARITY_TYPE *Parity,\r
153 IN OUT UINT8 *DataBits,\r
154 IN OUT EFI_STOP_BITS_TYPE *StopBits\r
155 )\r
156{\r
157 return PL011UartInitializePort (\r
f6300528
EL
158 (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),\r
159 FixedPcdGet32 (PL011UartClkInHz),\r
160 BaudRate,\r
161 ReceiveFifoDepth,\r
162 Parity,\r
163 DataBits,\r
164 StopBits\r
165 );\r
921e987b
SZ
166}\r
167\r
168/**\r
169\r
170 Assert or deassert the control signals on a serial port.\r
171 The following control signals are set according their bit settings :\r
172 . Request to Send\r
173 . Data Terminal Ready\r
174\r
175 @param[in] Control The following bits are taken into account :\r
176 . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
177 "Request To Send" control signal if this bit is\r
178 equal to one/zero.\r
179 . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
180 the "Data Terminal Ready" control signal if this\r
181 bit is equal to one/zero.\r
182 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
183 the hardware loopback if this bit is equal to\r
184 one/zero.\r
185 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
186 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
187 disable the hardware flow control based on CTS (Clear\r
188 To Send) and RTS (Ready To Send) control signals.\r
189\r
9f08a052
EL
190 @retval RETURN_SUCCESS The new control bits were set on the device.\r
191 @retval RETURN_UNSUPPORTED The device does not support this operation.\r
921e987b
SZ
192\r
193**/\r
194RETURN_STATUS\r
195EFIAPI\r
196SerialPortSetControl (\r
197 IN UINT32 Control\r
198 )\r
199{\r
aadc64e6 200 return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);\r
921e987b
SZ
201}\r
202\r
203/**\r
1e57a462 204\r
921e987b
SZ
205 Retrieve the status of the control bits on a serial device.\r
206\r
207 @param[out] Control Status of the control bits on a serial device :\r
208\r
9f08a052
EL
209 . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
210 EFI_SERIAL_DATA_SET_READY,\r
211 EFI_SERIAL_RING_INDICATE,\r
212 EFI_SERIAL_CARRIER_DETECT,\r
213 EFI_SERIAL_REQUEST_TO_SEND,\r
214 EFI_SERIAL_DATA_TERMINAL_READY\r
215 are all related to the DTE (Data Terminal Equipment)\r
216 and DCE (Data Communication Equipment) modes of\r
217 operation of the serial device.\r
218 . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
219 receive buffer is empty, 0 otherwise.\r
220 . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
221 transmit buffer is empty, 0 otherwise.\r
222 . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
223 the hardware loopback is enabled (the output feeds\r
224 the receive buffer), 0 otherwise.\r
225 . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one\r
226 if a loopback is accomplished by software, else 0.\r
227 . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
228 one if the hardware flow control based on CTS (Clear\r
229 To Send) and RTS (Ready To Send) control signals is\r
230 enabled, 0 otherwise.\r
231\r
232 @retval RETURN_SUCCESS The control bits were read from the device.\r
921e987b
SZ
233\r
234**/\r
235RETURN_STATUS\r
236EFIAPI\r
237SerialPortGetControl (\r
238 OUT UINT32 *Control\r
239 )\r
240{\r
aadc64e6 241 return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);\r
921e987b 242}\r