projects / mirror_edk2.git / blame
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|---|---|---|
| 1bc83266 HL |
1 | //\r |
| 2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r | |
| 3 | //\r | |
| 4 | // This program and the accompanying materials\r | |
| 5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
| 6 | // which accompanies this distribution. The full text of the license may be found at\r | |
| 7 | // http://opensource.org/licenses/bsd-license.php\r | |
| 8 | //\r | |
| 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 11 | //\r | |
| 12 | //\r | |
| 13 | \r | |
| 14 | #include <AsmMacroIoLibV8.h>\r | |
| 15 | #include <Base.h>\r | |
| 16 | #include <Library/PcdLib.h>\r | |
| 17 | #include <AutoGen.h>\r | |
| 18 | \r | |
| 19 | .text\r | |
| 20 | .align 3\r | |
| 21 | \r | |
| 22 | GCC_ASM_IMPORT(CEntryPoint)\r | |
| 23 | GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r | |
| 24 | GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r | |
| 25 | GCC_ASM_IMPORT(ArmReadMpidr)\r | |
| 26 | GCC_ASM_IMPORT(ArmPlatformPeiBootAction)\r | |
| 27 | GCC_ASM_EXPORT(_ModuleEntryPoint)\r | |
| 28 | \r | |
| 29 | StartupAddr: .dword CEntryPoint\r | |
| 30 | \r | |
| 31 | ASM_PFX(_ModuleEntryPoint):\r | |
| 32 | // Do early platform specific actions\r | |
| 33 | bl ASM_PFX(ArmPlatformPeiBootAction)\r | |
| 34 | \r | |
| 35 | // NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect\r | |
| 36 | // and configure the system accordingly. EL2 is default if possible.\r | |
| 37 | // If we started in EL3 we need to switch and run at EL2.\r | |
| 38 | // If we are running at EL2 stay in EL2\r | |
| 39 | // If we are starting at EL1 stay in EL1.\r | |
| 40 | \r | |
| 41 | // If started at EL3 Sec is run and switches to EL2 before jumping to PEI.\r | |
| 42 | // If started at EL1 or EL2 Sec jumps directly to PEI without making any\r | |
| 43 | // changes.\r | |
| 44 | \r | |
| 45 | // Which EL are we running at? Every EL needs some level of setup...\r | |
| 46 | EL1_OR_EL2_OR_EL3(x0)\r | |
| 47 | 1:bl ASM_PFX(SetupExceptionLevel1)\r | |
| 48 | b ASM_PFX(MainEntryPoint)\r | |
| 49 | 2:bl ASM_PFX(SetupExceptionLevel2)\r | |
| 50 | b ASM_PFX(MainEntryPoint)\r | |
| 51 | 3:// If we are at EL3 we die.\r | |
| 52 | b dead\r | |
| 53 | \r | |
| 54 | ASM_PFX(MainEntryPoint):\r | |
| 55 | // Identify CPU ID\r | |
| 56 | bl ASM_PFX(ArmReadMpidr)\r | |
| 57 | // Keep a copy of the MpId register value\r | |
| 58 | mov x5, x0\r | |
| 59 | \r | |
| 60 | // Is it the Primary Core ?\r | |
| 61 | bl ASM_PFX(ArmPlatformIsPrimaryCore)\r | |
| 62 | \r | |
| 63 | // Get the top of the primary stacks (and the base of the secondary stacks)\r | |
| 64 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), x1)\r | |
| 65 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)\r | |
| 66 | add x1, x1, x2\r | |
| 67 | \r | |
| 68 | // x0 is equal to 1 if I am the primary core\r | |
| 69 | cmp x0, #1\r | |
| 70 | b.eq _SetupPrimaryCoreStack\r | |
| 71 | \r | |
| 72 | _SetupSecondaryCoreStack:\r | |
| 73 | // x1 contains the base of the secondary stacks\r | |
| 74 | \r | |
| 75 | // Get the Core Position\r | |
| 76 | mov x6, x1 // Save base of the secondary stacks\r | |
| 77 | mov x0, x5\r | |
| 78 | bl ASM_PFX(ArmPlatformGetCorePosition)\r | |
| 79 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r | |
| 80 | add x0, x0, #1\r | |
| 81 | \r | |
| 82 | // StackOffset = CorePos * StackSize\r | |
| 83 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2)\r | |
| 84 | mul x0, x0, x2\r | |
| 85 | // SP = StackBase + StackOffset\r | |
| 86 | add sp, x6, x0\r | |
| 87 | \r | |
| 88 | _PrepareArguments:\r | |
| 89 | // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r | |
| 90 | LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2)\r | |
| 91 | add x2, x2, #8\r | |
| 92 | ldr x1, [x2]\r | |
| 93 | \r | |
| 94 | // Move sec startup address into a data register\r | |
| 95 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
| 96 | ldr x3, StartupAddr\r | |
| 97 | \r | |
| 98 | // Jump to PrePeiCore C code\r | |
| 99 | // x0 = mp_id\r | |
| 100 | // x1 = pei_core_address\r | |
| 101 | mov x0, x5\r | |
| 102 | blr x3\r | |
| 103 | \r | |
| 104 | _SetupPrimaryCoreStack:\r | |
| 105 | // x1 contains the top of the primary stack\r | |
| 106 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x2)\r | |
| 107 | \r | |
| 108 | // The reserved space for global variable must be 16-bytes aligned for pushing\r | |
| 109 | // 128-bit variable on the stack\r | |
| 110 | SetPrimaryStack (x1, x2, x3, x4)\r | |
| 111 | b _PrepareArguments\r | |
| 112 | \r | |
| 113 | dead:\r | |
| 114 | b dead\r |