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[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / PrePeiCore.c
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1d5d0ae9 1/** @file\r
2* Main file supporting the transition to PEI Core in Normal World for Versatile Express\r
3*\r
4* Copyright (c) 2011, ARM Limited. All rights reserved.\r
5* \r
6* This program and the accompanying materials \r
7* are licensed and made available under the terms and conditions of the BSD License \r
8* which accompanies this distribution. The full text of the license may be found at \r
9* http://opensource.org/licenses/bsd-license.php \r
10*\r
11* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
13*\r
14**/\r
15\r
16#include <PiPei.h>\r
17#include <Ppi/TemporaryRamSupport.h>\r
18#include <Library/DebugLib.h>\r
19#include <Library/PcdLib.h>\r
20#include <Library/IoLib.h>\r
21#include <Library/BaseLib.h>\r
22#include <Library/BaseMemoryLib.h>\r
23#include <Library/ArmLib.h>\r
24#include <Chipset/ArmV7.h>\r
25\r
26EFI_STATUS\r
27EFIAPI\r
28SecTemporaryRamSupport (\r
29 IN CONST EFI_PEI_SERVICES **PeiServices,\r
30 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
31 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
32 IN UINTN CopySize\r
33 );\r
34\r
35VOID\r
36SecSwitchStack (\r
37 INTN StackDelta\r
38 );\r
39\r
80ddb68d 40EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};\r
1d5d0ae9 41\r
42EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {\r
43 {\r
44 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
45 &gEfiTemporaryRamSupportPpiGuid,\r
46 &mSecTemporaryRamSupportPpi\r
47 }\r
48};\r
49\r
50// Vector Table for Pei Phase\r
51VOID PeiVectorTable (VOID);\r
52\r
53\r
54VOID\r
55CEntryPoint (\r
56 IN UINTN CoreId,\r
57 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
58 )\r
59{\r
60 //Clean Data cache\r
61 ArmCleanInvalidateDataCache();\r
62\r
63 //Invalidate instruction cache\r
64 ArmInvalidateInstructionCache();\r
65\r
66 // Enable Instruction & Data caches\r
67 ArmEnableDataCache();\r
68 ArmEnableInstructionCache();\r
69\r
70 //\r
71 // Note: Doesn't have to Enable CPU interface in non-secure world,\r
72 // as Non-secure interface is already enabled in Secure world.\r
73 //\r
74\r
75 // Write VBAR - The Vector table must be 32-byte aligned\r
76 ASSERT(((UINT32)PeiVectorTable & ((1 << 5)-1)) == 0);\r
77 ArmWriteVBar((UINT32)PeiVectorTable);\r
78\r
79 //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r
80\r
81 //If not primary Jump to Secondary Main\r
82 if(0 == CoreId) {\r
83 //Goto primary Main.\r
84 primary_main(PeiCoreEntryPoint);\r
85 } else {\r
86 secondary_main(CoreId);\r
87 }\r
88\r
89 // PEI Core should always load and never return\r
90 ASSERT (FALSE);\r
91}\r
92\r
93EFI_STATUS\r
94EFIAPI\r
95SecTemporaryRamSupport (\r
96 IN CONST EFI_PEI_SERVICES **PeiServices,\r
97 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
98 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
99 IN UINTN CopySize\r
100 )\r
101{\r
102 //\r
103 // Migrate the whole temporary memory to permenent memory.\r
104 // \r
105 CopyMem (\r
106 (VOID*)(UINTN)PermanentMemoryBase, \r
107 (VOID*)(UINTN)TemporaryMemoryBase, \r
108 CopySize\r
109 );\r
110\r
111 SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));\r
112\r
113 return EFI_SUCCESS;\r
114}\r
115\r
2637d1ef 116VOID\r
117PeiCommonExceptionEntry (\r
118 IN UINT32 Entry,\r
119 IN UINT32 LR\r
120 )\r
121{\r
122 CHAR8 Buffer[100];\r
123 UINTN CharCount;\r
124\r
1d5d0ae9 125 switch (Entry) {\r
126 case 0:\r
2637d1ef 127 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);\r
1d5d0ae9 128 break;\r
129 case 1:\r
2637d1ef 130 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);\r
1d5d0ae9 131 break;\r
132 case 2:\r
2637d1ef 133 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);\r
1d5d0ae9 134 break;\r
135 case 3:\r
2637d1ef 136 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);\r
1d5d0ae9 137 break;\r
138 case 4:\r
2637d1ef 139 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);\r
1d5d0ae9 140 break;\r
141 case 5:\r
2637d1ef 142 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);\r
1d5d0ae9 143 break;\r
144 case 6:\r
2637d1ef 145 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);\r
1d5d0ae9 146 break;\r
147 case 7:\r
2637d1ef 148 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);\r
1d5d0ae9 149 break;\r
150 default:\r
2637d1ef 151 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);\r
1d5d0ae9 152 break;\r
153 }\r
2637d1ef 154 SerialPortWrite ((UINT8 *) Buffer, CharCount);\r
1d5d0ae9 155 while(1);\r
156}\r