MdePkg/Register: Add register definition header files for RISC-V

[mirror_edk2.git] / ArmVirtPkg / ArmVirtPkg.dec

#/** @file\r
#\r
#  Copyright (c) 2014, Linaro Limited. All rights reserved.\r
#  Copyright (c) 2020, ARM Limited. All rights reserved.\r
#\r
#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
#**/\r
\r
[Defines]\r
  DEC_SPECIFICATION              = 0x00010005\r
  PACKAGE_NAME                   = ArmVirtPkg\r
  PACKAGE_GUID                   = A0B31216-508E-4025-BEAB-56D836C66F0A\r
  PACKAGE_VERSION                = 0.1\r
\r
################################################################################\r
#\r
# Include Section - list of Include Paths that are provided by this package.\r
#                   Comments are used for Keywords and Module Types.\r
#\r
# Supported Module Types:\r
#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
#\r
################################################################################\r
[Includes.common]\r
  Include                        # Root include for the package\r
\r
[LibraryClasses]\r
  ArmVirtMemInfoLib|Include/Library/ArmVirtMemInfoLib.h\r
\r
[Guids.common]\r
  gArmVirtTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }\r
  gEarlyPL011BaseAddressGuid       = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }\r
  gEarly16550UartBaseAddressGuid   = { 0xea67ca3e, 0x1f54, 0x436b, { 0x97, 0x88, 0xd4, 0xeb, 0x29, 0xc3, 0x42, 0x67 } }\r
  gArmVirtSystemMemorySizeGuid     = { 0x504eccb9, 0x1bf0, 0x4420, { 0x86, 0x5d, 0xdc, 0x66, 0x06, 0xd4, 0x13, 0xbf } }\r
\r
  gArmVirtVariableGuid   = { 0x50bea1e5, 0xa2c5, 0x46e9, { 0x9b, 0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a } }\r
\r
[PcdsFeatureFlag]\r
  #\r
  # Feature Flag PCD that defines whether TPM2 support is enabled\r
  #\r
  gArmVirtTokenSpaceGuid.PcdTpm2SupportEnabled|FALSE|BOOLEAN|0x00000004\r
\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
  #\r
  # This is the physical address where the device tree is expected to be stored\r
  # upon first entry into UEFI. This needs to be a FixedAtBuild PCD, so that we\r
  # can do a first pass over the device tree in the SEC phase to discover the\r
  # UART base address.\r
  #\r
  gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress|0x0|UINT64|0x00000001\r
\r
  #\r
  # Padding in bytes to add to the device tree allocation, so that the DTB can\r
  # be modified in place (default: 256 bytes)\r
  #\r
  gArmVirtTokenSpaceGuid.PcdDeviceTreeAllocationPadding|256|UINT32|0x00000002\r
\r
  #\r
  # Binary representation of the GUID that determines the terminal type. The\r
  # size must be exactly 16 bytes. The default value corresponds to\r
  # EFI_VT_100_GUID.\r
  #\r
  gArmVirtTokenSpaceGuid.PcdTerminalTypeGuidBuffer|{0x65, 0x60, 0xA6, 0xDF, 0x19, 0xB4, 0xD3, 0x11, 0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}|VOID*|0x00000007\r
\r
  ##\r
  # This is the physical address of Rsdp which is the core struct of Acpi.\r
  # Cloud Hypervisor has no other way to pass Rsdp address to the guest except use a PCD.\r
  #\r
  gArmVirtTokenSpaceGuid.PcdCloudHvAcpiRsdpBaseAddress|0x0|UINT64|0x00000005\r
\r
[PcdsDynamic]\r
  #\r
  # Whether to force disable ACPI, regardless of the fw_cfg settings\r
  # exposed by QEMU\r
  #\r
  gArmVirtTokenSpaceGuid.PcdForceNoAcpi|0x0|BOOLEAN|0x00000003\r