]> git.proxmox.com Git - mirror_edk2.git/blame - IntelFrameworkPkg/Include/Protocol/LegacyBios.h
Remove IntelFrameworkModulePkg
[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / LegacyBios.h
CommitLineData
79964ac8 1/** @file\r
2 The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage\r
87d63447 3 under EFI and Legacy OS boot. This file also includes all the related\r
4 COMPATIBILIY16 structures and defintions.\r
79964ac8 5\r
6 Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow\r
7 well known naming conventions.\r
8\r
5259c97d 9 Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r
1c2f052d 10 environment. Reverse thunk is the code that does the opposite.\r
79964ac8 11\r
1c2f052d 12Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
22a69a5e 13SPDX-License-Identifier: BSD-2-Clause-Patent\r
79964ac8 14\r
79964ac8 15 @par Revision Reference:\r
16 This protocol is defined in Framework for EFI Compatibility Support Module spec\r
881644d7 17 Version 0.98.\r
79964ac8 18\r
19**/\r
20\r
21#ifndef _EFI_LEGACY_BIOS_H_\r
22#define _EFI_LEGACY_BIOS_H_\r
23\r
87d63447 24///\r
1c2f052d 25///\r
87d63447 26///\r
27#pragma pack(1)\r
28\r
29typedef UINT8 SERIAL_MODE;\r
30typedef UINT8 PARALLEL_MODE;\r
31\r
32#define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r
33\r
34///\r
35/// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r
36/// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r
37/// entry point for the Compatibility16 functions. These functions provide the platform-specific\r
38/// information that is required by the generic EfiCompatibility code. The functions are invoked via\r
39/// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r
40/// entry point.\r
41///\r
42typedef struct {\r
43 ///\r
44 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r
45 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
46 ///\r
47 UINT32 Signature;\r
1c2f052d 48\r
87d63447 49 ///\r
50 /// The value required such that byte checksum of TableLength equals zero.\r
51 ///\r
52 UINT8 TableChecksum;\r
1c2f052d 53\r
87d63447 54 ///\r
55 /// The length of this table.\r
56 ///\r
57 UINT8 TableLength;\r
1c2f052d 58\r
87d63447 59 ///\r
60 /// The major EFI revision for which this table was generated.\r
1c2f052d 61 ///\r
87d63447 62 UINT8 EfiMajorRevision;\r
1c2f052d 63\r
87d63447 64 ///\r
65 /// The minor EFI revision for which this table was generated.\r
66 ///\r
67 UINT8 EfiMinorRevision;\r
1c2f052d 68\r
87d63447 69 ///\r
70 /// The major revision of this table.\r
71 ///\r
72 UINT8 TableMajorRevision;\r
1c2f052d 73\r
87d63447 74 ///\r
75 /// The minor revision of this table.\r
76 ///\r
77 UINT8 TableMinorRevision;\r
1c2f052d 78\r
87d63447 79 ///\r
80 /// Reserved for future usage.\r
81 ///\r
82 UINT16 Reserved;\r
1c2f052d 83\r
87d63447 84 ///\r
85 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
86 ///\r
87 UINT16 Compatibility16CallSegment;\r
1c2f052d 88\r
87d63447 89 ///\r
90 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
91 ///\r
92 UINT16 Compatibility16CallOffset;\r
1c2f052d 93\r
87d63447 94 ///\r
1c2f052d 95 /// The segment of the entry point within the traditional BIOS for EfiCompatibility\r
f22f941e 96 /// to invoke the PnP installation check.\r
87d63447 97 ///\r
98 UINT16 PnPInstallationCheckSegment;\r
1c2f052d 99\r
87d63447 100 ///\r
1c2f052d 101 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility\r
f22f941e 102 /// to invoke the PnP installation check.\r
87d63447 103 ///\r
104 UINT16 PnPInstallationCheckOffset;\r
1c2f052d 105\r
87d63447 106 ///\r
1c2f052d 107 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform\r
f22f941e 108 ///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r
87d63447 109 ///\r
1c2f052d
LG
110 UINT32 EfiSystemTable;\r
111\r
87d63447 112 ///\r
113 /// The address of an OEM-provided identifier string. The string is null terminated.\r
114 ///\r
115 UINT32 OemIdStringPointer;\r
1c2f052d 116\r
87d63447 117 ///\r
118 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
119 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
120 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r
121 /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
122 ///\r
123 UINT32 AcpiRsdPtrPointer;\r
1c2f052d 124\r
87d63447 125 ///\r
126 /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
127 ///\r
128 UINT16 OemRevision;\r
1c2f052d 129\r
87d63447 130 ///\r
131 /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
132 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
133 /// data to the indicated area.\r
134 ///\r
135 UINT32 E820Pointer;\r
1c2f052d 136\r
87d63447 137 ///\r
138 /// The length of the E820 data and is filled in by the EfiCompatibility code.\r
139 ///\r
140 UINT32 E820Length;\r
1c2f052d 141\r
87d63447 142 ///\r
143 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
144 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
145 /// copy the data to the indicated area.\r
146 ///\r
147 UINT32 IrqRoutingTablePointer;\r
1c2f052d 148\r
87d63447 149 ///\r
150 /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
151 ///\r
152 UINT32 IrqRoutingTableLength;\r
1c2f052d 153\r
87d63447 154 ///\r
155 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
1c2f052d 156 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data\r
f22f941e 157 /// to the indicated area.\r
87d63447 158 ///\r
159 UINT32 MpTablePtr;\r
1c2f052d 160\r
87d63447 161 ///\r
162 /// The length of the MP table and is filled in by the EfiCompatibility code.\r
163 ///\r
164 UINT32 MpTableLength;\r
1c2f052d 165\r
87d63447 166 ///\r
167 /// The segment of the OEM-specific INT table/code.\r
1c2f052d 168 ///\r
87d63447 169 UINT16 OemIntSegment;\r
1c2f052d 170\r
87d63447 171 ///\r
172 /// The offset of the OEM-specific INT table/code.\r
173 ///\r
174 UINT16 OemIntOffset;\r
1c2f052d 175\r
87d63447 176 ///\r
177 /// The segment of the OEM-specific 32-bit table/code.\r
178 ///\r
179 UINT16 Oem32Segment;\r
1c2f052d 180\r
87d63447 181 ///\r
182 /// The offset of the OEM-specific 32-bit table/code.\r
183 ///\r
184 UINT16 Oem32Offset;\r
1c2f052d 185\r
87d63447 186 ///\r
187 /// The segment of the OEM-specific 16-bit table/code.\r
188 ///\r
189 UINT16 Oem16Segment;\r
1c2f052d 190\r
87d63447 191 ///\r
192 /// The offset of the OEM-specific 16-bit table/code.\r
193 ///\r
194 UINT16 Oem16Offset;\r
1c2f052d 195\r
87d63447 196 ///\r
197 /// The segment of the TPM binary passed to 16-bit CSM.\r
198 ///\r
199 UINT16 TpmSegment;\r
1c2f052d 200\r
87d63447 201 ///\r
202 /// The offset of the TPM binary passed to 16-bit CSM.\r
203 ///\r
204 UINT16 TpmOffset;\r
1c2f052d 205\r
87d63447 206 ///\r
207 /// A pointer to a string identifying the independent BIOS vendor.\r
208 ///\r
209 UINT32 IbvPointer;\r
1c2f052d 210\r
87d63447 211 ///\r
212 /// This field is NULL for all systems not supporting PCI Express. This field is the base\r
213 /// value of the start of the PCI Express memory-mapped configuration registers and\r
214 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r
215 /// Compatibility16InitializeYourself().\r
216 /// Compatibility16InitializeYourself() is defined in Compatability16\r
217 /// Functions.\r
218 ///\r
219 UINT32 PciExpressBase;\r
1c2f052d 220\r
87d63447 221 ///\r
222 /// Maximum PCI bus number assigned.\r
223 ///\r
224 UINT8 LastPciBus;\r
881644d7
DW
225\r
226 ///\r
227 /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r
228 /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r
ed6fde41 229 /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.\r
881644d7
DW
230 ///\r
231 UINT32 UmaAddress;\r
232\r
233 ///\r
234 /// Upper Memory Area size in bytes to be set as Read/Write. If zero, no UMA region\r
235 /// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only).\r
236 ///\r
237 UINT32 UmaSize;\r
238\r
239 ///\r
240 /// Start Address of high memory that can be used for permanent allocation. If zero,\r
241 /// high memory is not available for permanent allocation.\r
242 ///\r
243 UINT32 HiPermanentMemoryAddress;\r
244\r
245 ///\r
246 /// Size of high memory that can be used for permanent allocation in bytes. If zero,\r
247 /// high memory is not available for permanent allocation.\r
248 ///\r
249 UINT32 HiPermanentMemorySize;\r
87d63447 250} EFI_COMPATIBILITY16_TABLE;\r
251\r
252///\r
1c2f052d 253/// Functions provided by the CSM binary which communicate between the EfiCompatibility\r
87d63447 254/// and Compatability16 code.\r
255///\r
1c2f052d
LG
256/// Inconsistent with the specification here:\r
257/// The member's name started with "Compatibility16" [defined in Intel Framework\r
258/// Compatibility Support Module Specification / 0.97 version]\r
87d63447 259/// has been changed to "Legacy16" since keeping backward compatible.\r
260///\r
261typedef enum {\r
262 ///\r
263 /// Causes the Compatibility16 code to do any internal initialization required.\r
264 /// Input:\r
265 /// AX = Compatibility16InitializeYourself\r
266 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r
267 /// Return:\r
268 /// AX = Return Status codes\r
269 ///\r
270 Legacy16InitializeYourself = 0x0000,\r
1c2f052d 271\r
87d63447 272 ///\r
273 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
274 /// Input:\r
275 /// AX = Compatibility16UpdateBbs\r
276 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
277 /// Return:\r
278 /// AX = Returned status codes\r
279 ///\r
280 Legacy16UpdateBbs = 0x0001,\r
1c2f052d 281\r
87d63447 282 ///\r
283 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
284 /// code is read/write.\r
285 /// Input:\r
286 /// AX = Compatibility16PrepareToBoot\r
1c2f052d 287 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure\r
87d63447 288 /// Return:\r
289 /// AX = Returned status codes\r
290 ///\r
291 Legacy16PrepareToBoot = 0x0002,\r
1c2f052d 292\r
87d63447 293 ///\r
294 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
295 /// Input:\r
296 /// AX = Compatibility16Boot\r
297 /// Output:\r
298 /// AX = Returned status codes\r
299 ///\r
300 Legacy16Boot = 0x0003,\r
1c2f052d 301\r
87d63447 302 ///\r
303 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
304 /// stored in CMOS and is the priority number of the last attempted boot device.\r
305 /// Input:\r
306 /// AX = Compatibility16RetrieveLastBootDevice\r
307 /// Output:\r
308 /// AX = Returned status codes\r
309 /// BX = Priority number of the boot device.\r
310 ///\r
311 Legacy16RetrieveLastBootDevice = 0x0004,\r
1c2f052d 312\r
87d63447 313 ///\r
314 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
315 /// Input:\r
316 /// AX = Compatibility16DispatchOprom\r
317 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r
318 /// Output:\r
319 /// AX = Returned status codes\r
320 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
321 ///\r
322 Legacy16DispatchOprom = 0x0005,\r
1c2f052d 323\r
87d63447 324 ///\r
325 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
326 /// of that region.\r
327 /// Input:\r
328 /// AX = Compatibility16GetTableAddress\r
329 /// BX = Allocation region\r
330 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r
331 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r
332 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r
333 /// CX = Requested length in bytes.\r
334 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r
335 /// Output:\r
336 /// AX = Returned status codes\r
337 /// DS:BX = Address of the region\r
338 ///\r
339 Legacy16GetTableAddress = 0x0006,\r
1c2f052d 340\r
87d63447 341 ///\r
342 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
343 /// Input:\r
344 /// AX = Compatibility16SetKeyboardLeds\r
345 /// CL = LED status.\r
346 /// Bit 0 Scroll Lock 0 = Off\r
347 /// Bit 1 NumLock\r
348 /// Bit 2 Caps Lock\r
349 /// Output:\r
350 /// AX = Returned status codes\r
351 ///\r
352 Legacy16SetKeyboardLeds = 0x0007,\r
1c2f052d 353\r
87d63447 354 ///\r
355 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
356 /// do not have an OpROM associated with them. An example is SATA.\r
357 /// Input:\r
358 /// AX = Compatibility16InstallPciHandler\r
359 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r
360 /// Output:\r
361 /// AX = Returned status codes\r
362 ///\r
363 Legacy16InstallPciHandler = 0x0008\r
364} EFI_COMPATIBILITY_FUNCTIONS;\r
365\r
366\r
367///\r
368/// EFI_DISPATCH_OPROM_TABLE\r
369///\r
370typedef struct {\r
f22f941e 371 UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.\r
372 UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.\r
87d63447 373 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r
374 UINT8 PciBus; ///< The PCI bus.\r
375 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r
376 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r
377 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r
378 ///< OpROM BIOS Setup to be executed.\r
c5b900be 379 UINT32 BbsTablePointer; ///< A pointer to the BBS table.\r
87d63447 380 UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
381 ///< means that the relocation of this run time code is not supported.\r
1c2f052d
LG
382 ///< Inconsistent with specification here:\r
383 ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]\r
87d63447 384 ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
385\r
386} EFI_DISPATCH_OPROM_TABLE;\r
387\r
388///\r
389/// EFI_TO_COMPATIBILITY16_INIT_TABLE\r
390///\r
391typedef struct {\r
392 ///\r
393 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
394 ///\r
395 UINT32 BiosLessThan1MB;\r
1c2f052d 396\r
87d63447 397 ///\r
f22f941e 398 /// The starting address of the high memory block.\r
87d63447 399 ///\r
400 UINT32 HiPmmMemory;\r
1c2f052d 401\r
87d63447 402 ///\r
f22f941e 403 /// The length of high memory block.\r
87d63447 404 ///\r
405 UINT32 HiPmmMemorySizeInBytes;\r
1c2f052d 406\r
87d63447 407 ///\r
408 /// The segment of the reverse thunk call code.\r
409 ///\r
410 UINT16 ReverseThunkCallSegment;\r
1c2f052d 411\r
87d63447 412 ///\r
413 /// The offset of the reverse thunk call code.\r
414 ///\r
415 UINT16 ReverseThunkCallOffset;\r
1c2f052d 416\r
87d63447 417 ///\r
418 /// The number of E820 entries copied to the Compatibility16 BIOS.\r
419 ///\r
420 UINT32 NumberE820Entries;\r
1c2f052d 421\r
87d63447 422 ///\r
423 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
424 ///\r
425 UINT32 OsMemoryAbove1Mb;\r
1c2f052d 426\r
87d63447 427 ///\r
428 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
429 ///\r
430 UINT32 ThunkStart;\r
1c2f052d 431\r
87d63447 432 ///\r
433 /// The size of the thunk code.\r
434 ///\r
435 UINT32 ThunkSizeInBytes;\r
1c2f052d 436\r
87d63447 437 ///\r
438 /// Starting address of memory under 1 MB.\r
439 ///\r
440 UINT32 LowPmmMemory;\r
1c2f052d 441\r
87d63447 442 ///\r
f22f941e 443 /// The length of low Memory block.\r
87d63447 444 ///\r
445 UINT32 LowPmmMemorySizeInBytes;\r
446} EFI_TO_COMPATIBILITY16_INIT_TABLE;\r
447\r
448///\r
f22f941e 449/// DEVICE_PRODUCER_SERIAL.\r
87d63447 450///\r
451typedef struct {\r
f22f941e 452 UINT16 Address; ///< I/O address assigned to the serial port.\r
87d63447 453 UINT8 Irq; ///< IRQ assigned to the serial port.\r
454 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r
455} DEVICE_PRODUCER_SERIAL;\r
456\r
457///\r
f22f941e 458/// DEVICE_PRODUCER_SERIAL's modes.\r
87d63447 459///@{\r
460#define DEVICE_SERIAL_MODE_NORMAL 0x00\r
461#define DEVICE_SERIAL_MODE_IRDA 0x01\r
462#define DEVICE_SERIAL_MODE_ASK_IR 0x02\r
463#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r
464#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r
465///@)\r
466\r
467///\r
f22f941e 468/// DEVICE_PRODUCER_PARALLEL.\r
87d63447 469///\r
470typedef struct {\r
f22f941e 471 UINT16 Address; ///< I/O address assigned to the parallel port.\r
87d63447 472 UINT8 Irq; ///< IRQ assigned to the parallel port.\r
473 UINT8 Dma; ///< DMA assigned to the parallel port.\r
474 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r
475} DEVICE_PRODUCER_PARALLEL;\r
476\r
477///\r
f22f941e 478/// DEVICE_PRODUCER_PARALLEL's modes.\r
87d63447 479///@{\r
480#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r
481#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r
482#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r
483#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r
484///@}\r
485\r
486///\r
487/// DEVICE_PRODUCER_FLOPPY\r
488///\r
489typedef struct {\r
f22f941e 490 UINT16 Address; ///< I/O address assigned to the floppy.\r
87d63447 491 UINT8 Irq; ///< IRQ assigned to the floppy.\r
492 UINT8 Dma; ///< DMA assigned to the floppy.\r
493 UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r
494} DEVICE_PRODUCER_FLOPPY;\r
495\r
496///\r
497/// LEGACY_DEVICE_FLAGS\r
498///\r
499typedef struct {\r
500 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r
501 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r
502 UINT32 Reserved : 30; ///< Reserved for future usage.\r
503} LEGACY_DEVICE_FLAGS;\r
504\r
505///\r
506/// DEVICE_PRODUCER_DATA_HEADER\r
507///\r
508typedef struct {\r
509 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r
510 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r
511 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r
512 UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r
513 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r
514} DEVICE_PRODUCER_DATA_HEADER;\r
515\r
516///\r
517/// ATAPI_IDENTIFY\r
518///\r
519typedef struct {\r
520 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r
521} ATAPI_IDENTIFY;\r
522\r
523///\r
524/// HDD_INFO\r
525///\r
526typedef struct {\r
527 ///\r
528 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r
529 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
530 /// 1 is slave.\r
531 ///\r
1c2f052d
LG
532 UINT16 Status;\r
533\r
87d63447 534 ///\r
535 /// PCI bus of IDE controller.\r
536 ///\r
537 UINT32 Bus;\r
1c2f052d 538\r
87d63447 539 ///\r
540 /// PCI device of IDE controller.\r
541 ///\r
542 UINT32 Device;\r
1c2f052d 543\r
87d63447 544 ///\r
545 /// PCI function of IDE controller.\r
546 ///\r
547 UINT32 Function;\r
1c2f052d 548\r
87d63447 549 ///\r
550 /// Command ports base address.\r
551 ///\r
552 UINT16 CommandBaseAddress;\r
1c2f052d 553\r
87d63447 554 ///\r
555 /// Control ports base address.\r
556 ///\r
557 UINT16 ControlBaseAddress;\r
1c2f052d 558\r
87d63447 559 ///\r
f22f941e 560 /// Bus master address.\r
87d63447 561 ///\r
562 UINT16 BusMasterAddress;\r
1c2f052d 563\r
87d63447 564 UINT8 HddIrq;\r
1c2f052d 565\r
87d63447 566 ///\r
f22f941e 567 /// Data that identifies the drive data; one per possible attached drive.\r
87d63447 568 ///\r
569 ATAPI_IDENTIFY IdentifyDrive[2];\r
570} HDD_INFO;\r
571\r
572///\r
573/// HDD_INFO status bits\r
574///\r
575#define HDD_PRIMARY 0x01\r
576#define HDD_SECONDARY 0x02\r
577#define HDD_MASTER_ATAPI_CDROM 0x04\r
578#define HDD_SLAVE_ATAPI_CDROM 0x08\r
579#define HDD_MASTER_IDE 0x20\r
580#define HDD_SLAVE_IDE 0x40\r
581#define HDD_MASTER_ATAPI_ZIPDISK 0x10\r
582#define HDD_SLAVE_ATAPI_ZIPDISK 0x80\r
583\r
584///\r
f22f941e 585/// BBS_STATUS_FLAGS;\.\r
87d63447 586///\r
587typedef struct {\r
588 UINT16 OldPosition : 4; ///< Prior priority.\r
589 UINT16 Reserved1 : 4; ///< Reserved for future use.\r
590 UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
591 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
592 ///< 1 = Boot attempted failed.\r
1c2f052d 593\r
87d63447 594 ///\r
595 /// State of media present.\r
596 /// 00 = No bootable media is present in the device.\r
597 /// 01 = Unknown if a bootable media present.\r
598 /// 10 = Media is present and appears bootable.\r
599 /// 11 = Reserved.\r
600 ///\r
601 UINT16 MediaPresent : 2;\r
602 UINT16 Reserved2 : 4; ///< Reserved for future use.\r
603} BBS_STATUS_FLAGS;\r
604\r
605///\r
f22f941e 606/// BBS_TABLE, device type values & boot priority values.\r
87d63447 607///\r
608typedef struct {\r
609 ///\r
610 /// The boot priority for this boot device. Values are defined below.\r
611 ///\r
612 UINT16 BootPriority;\r
1c2f052d 613\r
87d63447 614 ///\r
615 /// The PCI bus for this boot device.\r
616 ///\r
617 UINT32 Bus;\r
1c2f052d 618\r
87d63447 619 ///\r
620 /// The PCI device for this boot device.\r
621 ///\r
622 UINT32 Device;\r
1c2f052d 623\r
87d63447 624 ///\r
625 /// The PCI function for the boot device.\r
626 ///\r
627 UINT32 Function;\r
1c2f052d 628\r
87d63447 629 ///\r
630 /// The PCI class for this boot device.\r
631 ///\r
632 UINT8 Class;\r
1c2f052d 633\r
87d63447 634 ///\r
635 /// The PCI Subclass for this boot device.\r
636 ///\r
637 UINT8 SubClass;\r
1c2f052d 638\r
87d63447 639 ///\r
640 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
641 ///\r
642 UINT16 MfgStringOffset;\r
1c2f052d 643\r
87d63447 644 ///\r
645 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
1c2f052d 646 ///\r
87d63447 647 UINT16 MfgStringSegment;\r
1c2f052d 648\r
87d63447 649 ///\r
650 /// BBS device type. BBS device types are defined below.\r
651 ///\r
652 UINT16 DeviceType;\r
1c2f052d 653\r
87d63447 654 ///\r
655 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
656 ///\r
657 BBS_STATUS_FLAGS StatusFlags;\r
1c2f052d 658\r
87d63447 659 ///\r
660 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
661 /// BCV devices.\r
662 ///\r
663 UINT16 BootHandlerOffset;\r
1c2f052d 664\r
87d63447 665 ///\r
666 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
667 /// BCV devices.\r
1c2f052d 668 ///\r
87d63447 669 UINT16 BootHandlerSegment;\r
1c2f052d 670\r
87d63447 671 ///\r
672 /// Segment:offset address of an ASCIIZ description string describing this device.\r
673 ///\r
674 UINT16 DescStringOffset;\r
675\r
676 ///\r
677 /// Segment:offset address of an ASCIIZ description string describing this device.\r
678 ///\r
679 UINT16 DescStringSegment;\r
1c2f052d 680\r
87d63447 681 ///\r
682 /// Reserved.\r
683 ///\r
684 UINT32 InitPerReserved;\r
1c2f052d 685\r
87d63447 686 ///\r
687 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
688 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
689 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
690 ///\r
691 UINT32 AdditionalIrq13Handler;\r
1c2f052d 692\r
87d63447 693 ///\r
694 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
695 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
696 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
1c2f052d 697 ///\r
87d63447 698 UINT32 AdditionalIrq18Handler;\r
1c2f052d 699\r
87d63447 700 ///\r
701 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
702 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
703 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
1c2f052d 704 ///\r
87d63447 705 UINT32 AdditionalIrq19Handler;\r
1c2f052d 706\r
87d63447 707 ///\r
708 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
709 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
710 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
1c2f052d 711 ///\r
87d63447 712 UINT32 AdditionalIrq40Handler;\r
713 UINT8 AssignedDriveNumber;\r
714 UINT32 AdditionalIrq41Handler;\r
715 UINT32 AdditionalIrq46Handler;\r
716 UINT32 IBV1;\r
717 UINT32 IBV2;\r
718} BBS_TABLE;\r
719\r
720///\r
721/// BBS device type values\r
722///@{\r
723#define BBS_FLOPPY 0x01\r
724#define BBS_HARDDISK 0x02\r
725#define BBS_CDROM 0x03\r
726#define BBS_PCMCIA 0x04\r
727#define BBS_USB 0x05\r
728#define BBS_EMBED_NETWORK 0x06\r
729#define BBS_BEV_DEVICE 0x80\r
730#define BBS_UNKNOWN 0xff\r
731///@}\r
732\r
733///\r
734/// BBS boot priority values\r
735///@{\r
736#define BBS_DO_NOT_BOOT_FROM 0xFFFC\r
737#define BBS_LOWEST_PRIORITY 0xFFFD\r
738#define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r
739#define BBS_IGNORE_ENTRY 0xFFFF\r
740///@}\r
741\r
742///\r
743/// SMM_ATTRIBUTES\r
744///\r
745typedef struct {\r
746 ///\r
747 /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r
748 /// values are reserved for future usage.\r
749 ///\r
750 UINT16 Type : 3;\r
1c2f052d 751\r
87d63447 752 ///\r
f22f941e 753 /// The size of "port" in bits. Defined values are below.\r
87d63447 754 ///\r
755 UINT16 PortGranularity : 3;\r
1c2f052d 756\r
87d63447 757 ///\r
f22f941e 758 /// The size of data in bits. Defined values are below.\r
87d63447 759 ///\r
760 UINT16 DataGranularity : 3;\r
1c2f052d 761\r
87d63447 762 ///\r
763 /// Reserved for future use.\r
764 ///\r
765 UINT16 Reserved : 7;\r
766} SMM_ATTRIBUTES;\r
767\r
768///\r
f22f941e 769/// SMM_ATTRIBUTES type values.\r
87d63447 770///@{\r
771#define STANDARD_IO 0x00\r
772#define STANDARD_MEMORY 0x01\r
773///@}\r
774\r
775///\r
f22f941e 776/// SMM_ATTRIBUTES port size constants.\r
87d63447 777///@{\r
778#define PORT_SIZE_8 0x00\r
779#define PORT_SIZE_16 0x01\r
780#define PORT_SIZE_32 0x02\r
781#define PORT_SIZE_64 0x03\r
782///@}\r
783\r
784///\r
f22f941e 785/// SMM_ATTRIBUTES data size constants.\r
87d63447 786///@{\r
787#define DATA_SIZE_8 0x00\r
788#define DATA_SIZE_16 0x01\r
789#define DATA_SIZE_32 0x02\r
790#define DATA_SIZE_64 0x03\r
791///@}\r
792\r
793///\r
f22f941e 794/// SMM_FUNCTION & relating constants.\r
87d63447 795///\r
796typedef struct {\r
797 UINT16 Function : 15;\r
798 UINT16 Owner : 1;\r
799} SMM_FUNCTION;\r
800\r
801///\r
f22f941e 802/// SMM_FUNCTION Function constants.\r
87d63447 803///@{\r
804#define INT15_D042 0x0000\r
805#define GET_USB_BOOT_INFO 0x0001\r
806#define DMI_PNP_50_57 0x0002\r
807///@}\r
808\r
809///\r
f22f941e 810/// SMM_FUNCTION Owner constants.\r
87d63447 811///@{\r
812#define STANDARD_OWNER 0x0\r
813#define OEM_OWNER 0x1\r
814///@}\r
815\r
050b79eb 816///\r
817/// This structure assumes both port and data sizes are 1. SmmAttribute must be\r
818/// properly to reflect that assumption.\r
819///\r
87d63447 820typedef struct {\r
821 ///\r
822 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r
823 /// SMM_ATTRIBUTES is defined below.\r
824 ///\r
825 SMM_ATTRIBUTES SmmAttributes;\r
1c2f052d 826\r
87d63447 827 ///\r
828 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
829 ///\r
830 SMM_FUNCTION SmmFunction;\r
1c2f052d 831\r
87d63447 832 ///\r
f22f941e 833 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
87d63447 834 ///\r
835 UINT8 SmmPort;\r
1c2f052d 836\r
87d63447 837 ///\r
f22f941e 838 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
87d63447 839 ///\r
840 UINT8 SmmData;\r
841} SMM_ENTRY;\r
842\r
843///\r
844/// SMM_TABLE\r
845///\r
846typedef struct {\r
847 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r
848 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r
849} SMM_TABLE;\r
850\r
851///\r
852/// UDC_ATTRIBUTES\r
853///\r
854typedef struct {\r
855 ///\r
856 /// This bit set indicates that the ServiceAreaData is valid.\r
857 ///\r
858 UINT8 DirectoryServiceValidity : 1;\r
1c2f052d 859\r
87d63447 860 ///\r
861 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
862 /// DirectoryServiceValidity is 0.\r
863 ///\r
864 UINT8 RabcaUsedFlag : 1;\r
1c2f052d 865\r
87d63447 866 ///\r
867 /// This bit set indicates to execute hard disk diagnostics.\r
868 ///\r
869 UINT8 ExecuteHddDiagnosticsFlag : 1;\r
1c2f052d 870\r
87d63447 871 ///\r
872 /// Reserved for future use. Set to 0.\r
873 ///\r
874 UINT8 Reserved : 5;\r
875} UDC_ATTRIBUTES;\r
876\r
877///\r
878/// UD_TABLE\r
879///\r
880typedef struct {\r
881 ///\r
882 /// This field contains the bit-mapped attributes of the PARTIES information. Type\r
883 /// UDC_ATTRIBUTES is defined below.\r
884 ///\r
885 UDC_ATTRIBUTES Attributes;\r
1c2f052d 886\r
87d63447 887 ///\r
888 /// This field contains the zero-based device on which the selected\r
1c2f052d 889 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.\r
87d63447 890 ///\r
891 UINT8 DeviceNumber;\r
1c2f052d 892\r
87d63447 893 ///\r
894 /// This field contains the zero-based index into the BbsTable for the parent device.\r
895 /// This index allows the user to reference the parent device information such as PCI\r
896 /// bus, device function.\r
897 ///\r
898 UINT8 BbsTableEntryNumberForParentDevice;\r
1c2f052d 899\r
87d63447 900 ///\r
901 /// This field contains the zero-based index into the BbsTable for the boot entry.\r
902 ///\r
903 UINT8 BbsTableEntryNumberForBoot;\r
1c2f052d 904\r
87d63447 905 ///\r
906 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
907 ///\r
908 UINT8 BbsTableEntryNumberForHddDiag;\r
1c2f052d 909\r
87d63447 910 ///\r
911 /// The raw Beer data.\r
912 ///\r
913 UINT8 BeerData[128];\r
1c2f052d 914\r
87d63447 915 ///\r
916 /// The raw data of selected service area.\r
917 ///\r
918 UINT8 ServiceAreaData[64];\r
919} UD_TABLE;\r
920\r
921#define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r
922#define EFI_TO_LEGACY_MINOR_VERSION 0x00\r
923#define MAX_IDE_CONTROLLER 8\r
924\r
925///\r
926/// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r
927///\r
928typedef struct {\r
929 UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r
930 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r
f22f941e 931 UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.\r
932 UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.\r
87d63447 933 UINT32 SmbiosTableLength;\r
934 //\r
935 // Legacy SIO state\r
936 //\r
937 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r
938 UINT16 DevicePathType; ///< The default boot type.\r
939 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r
940 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r
941 ///< Compatibility16InitializeYourself() function.\r
942 //\r
943 // Controller & Drive Identify[2] per controller information\r
944 //\r
945 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r
946 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r
f22f941e 947 UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.\r
948 UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.\r
87d63447 949 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r
950 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r
951 ///< memory may have been discovered.\r
952 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r
953 ///< UD_TABLE is defined below.\r
954} EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r
955\r
956///\r
957/// EFI_LEGACY_INSTALL_PCI_HANDLER\r
958///\r
959typedef struct {\r
960 UINT8 PciBus; ///< The PCI bus of the device.\r
961 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r
962 UINT8 PciSegment; ///< The PCI segment of the device.\r
963 UINT8 PciClass; ///< The PCI class code of the device.\r
964 UINT8 PciSubclass; ///< The PCI subclass code of the device.\r
965 UINT8 PciInterface; ///< The PCI interface code of the device.\r
966 //\r
967 // Primary section\r
968 //\r
969 UINT8 PrimaryIrq; ///< The primary device IRQ.\r
970 UINT8 PrimaryReserved; ///< Reserved.\r
971 UINT16 PrimaryControl; ///< The primary device control I/O base.\r
972 UINT16 PrimaryBase; ///< The primary device I/O base.\r
973 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r
974 //\r
975 // Secondary Section\r
976 //\r
977 UINT8 SecondaryIrq; ///< The secondary device IRQ.\r
978 UINT8 SecondaryReserved; ///< Reserved.\r
979 UINT16 SecondaryControl; ///< The secondary device control I/O base.\r
980 UINT16 SecondaryBase; ///< The secondary device I/O base.\r
981 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r
982} EFI_LEGACY_INSTALL_PCI_HANDLER;\r
983\r
984//\r
985// Restore default pack value\r
986//\r
987#pragma pack()\r
b80fbe85 988\r
79964ac8 989#define EFI_LEGACY_BIOS_PROTOCOL_GUID \\r
990 { \\r
991 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \\r
992 }\r
993\r
994typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;\r
995\r
050b79eb 996///\r
f22f941e 997/// Flags returned by CheckPciRom().\r
050b79eb 998///\r
9226e4ee 999#define NO_ROM 0x00\r
1000#define ROM_FOUND 0x01\r
1001#define VALID_LEGACY_ROM 0x02\r
f22f941e 1002#define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification.\r
9226e4ee 1003\r
050b79eb 1004///\r
1c2f052d
LG
1005/// The following macros do not appear in the Framework CSM Specification and\r
1006/// are kept for backward compatibility only. They convert 32-bit address (_Adr)\r
050b79eb 1007/// to Segment:Offset 16-bit form.\r
1008///\r
ce9b1e3a 1009///@{\r
79964ac8 1010#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)\r
1011#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)\r
ce9b1e3a 1012///@}\r
79964ac8 1013\r
1014#define CARRY_FLAG 0x01\r
1015\r
050b79eb 1016///\r
1017/// EFI_EFLAGS_REG\r
1018///\r
79964ac8 1019typedef struct {\r
1020 UINT32 CF:1;\r
1021 UINT32 Reserved1:1;\r
1022 UINT32 PF:1;\r
1023 UINT32 Reserved2:1;\r
1024 UINT32 AF:1;\r
1025 UINT32 Reserved3:1;\r
1026 UINT32 ZF:1;\r
1027 UINT32 SF:1;\r
1028 UINT32 TF:1;\r
1029 UINT32 IF:1;\r
1030 UINT32 DF:1;\r
1031 UINT32 OF:1;\r
1032 UINT32 IOPL:2;\r
1033 UINT32 NT:1;\r
1034 UINT32 Reserved4:2;\r
1035 UINT32 VM:1;\r
1036 UINT32 Reserved5:14;\r
1037} EFI_EFLAGS_REG;\r
1038\r
050b79eb 1039///\r
1040/// EFI_DWORD_REGS\r
1041///\r
79964ac8 1042typedef struct {\r
1043 UINT32 EAX;\r
1044 UINT32 EBX;\r
1045 UINT32 ECX;\r
1046 UINT32 EDX;\r
1047 UINT32 ESI;\r
1048 UINT32 EDI;\r
1049 EFI_EFLAGS_REG EFlags;\r
1050 UINT16 ES;\r
1051 UINT16 CS;\r
1052 UINT16 SS;\r
1053 UINT16 DS;\r
1054 UINT16 FS;\r
1055 UINT16 GS;\r
1056 UINT32 EBP;\r
1057 UINT32 ESP;\r
1058} EFI_DWORD_REGS;\r
1059\r
050b79eb 1060///\r
1061/// EFI_FLAGS_REG\r
1062///\r
79964ac8 1063typedef struct {\r
1064 UINT16 CF:1;\r
1065 UINT16 Reserved1:1;\r
1066 UINT16 PF:1;\r
1067 UINT16 Reserved2:1;\r
1068 UINT16 AF:1;\r
1069 UINT16 Reserved3:1;\r
1070 UINT16 ZF:1;\r
1071 UINT16 SF:1;\r
1072 UINT16 TF:1;\r
1073 UINT16 IF:1;\r
1074 UINT16 DF:1;\r
1075 UINT16 OF:1;\r
1076 UINT16 IOPL:2;\r
1077 UINT16 NT:1;\r
1078 UINT16 Reserved4:1;\r
1079} EFI_FLAGS_REG;\r
1080\r
050b79eb 1081///\r
1082/// EFI_WORD_REGS\r
1083///\r
79964ac8 1084typedef struct {\r
1085 UINT16 AX;\r
1086 UINT16 ReservedAX;\r
1087 UINT16 BX;\r
1088 UINT16 ReservedBX;\r
1089 UINT16 CX;\r
1090 UINT16 ReservedCX;\r
1091 UINT16 DX;\r
1092 UINT16 ReservedDX;\r
1093 UINT16 SI;\r
1094 UINT16 ReservedSI;\r
1095 UINT16 DI;\r
1096 UINT16 ReservedDI;\r
1097 EFI_FLAGS_REG Flags;\r
1098 UINT16 ReservedFlags;\r
1099 UINT16 ES;\r
1100 UINT16 CS;\r
1101 UINT16 SS;\r
1102 UINT16 DS;\r
1103 UINT16 FS;\r
1104 UINT16 GS;\r
1105 UINT16 BP;\r
1106 UINT16 ReservedBP;\r
1107 UINT16 SP;\r
1108 UINT16 ReservedSP;\r
1109} EFI_WORD_REGS;\r
1110\r
050b79eb 1111///\r
1112/// EFI_BYTE_REGS\r
1113///\r
79964ac8 1114typedef struct {\r
1115 UINT8 AL, AH;\r
1116 UINT16 ReservedAX;\r
1117 UINT8 BL, BH;\r
1118 UINT16 ReservedBX;\r
1119 UINT8 CL, CH;\r
1120 UINT16 ReservedCX;\r
1121 UINT8 DL, DH;\r
1122 UINT16 ReservedDX;\r
1123} EFI_BYTE_REGS;\r
1124\r
050b79eb 1125///\r
1126/// EFI_IA32_REGISTER_SET\r
1127///\r
79964ac8 1128typedef union {\r
1129 EFI_DWORD_REGS E;\r
1130 EFI_WORD_REGS X;\r
1131 EFI_BYTE_REGS H;\r
1132} EFI_IA32_REGISTER_SET;\r
1133\r
1134/**\r
1135 Thunk to 16-bit real mode and execute a software interrupt with a vector\r
1136 of BiosInt. Regs will contain the 16-bit register context on entry and\r
1137 exit.\r
1138\r
f22f941e 1139 @param[in] This The protocol instance pointer.\r
1140 @param[in] BiosInt The processor interrupt vector to invoke.\r
050b79eb 1141 @param[in,out] Reg Register contexted passed into (and returned) from thunk to\r
f22f941e 1142 16-bit mode.\r
79964ac8 1143\r
1c2f052d 1144 @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status.\r
5259c97d 1145 @retval FALSE There was a BIOS error in the target code.\r
79964ac8 1146**/\r
1147typedef\r
1148BOOLEAN\r
69686d56 1149(EFIAPI *EFI_LEGACY_BIOS_INT86)(\r
050b79eb 1150 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1151 IN UINT8 BiosInt,\r
1152 IN OUT EFI_IA32_REGISTER_SET *Regs\r
79964ac8 1153 );\r
1154\r
1155/**\r
1156 Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the\r
1157 16-bit register context on entry and exit. Arguments can be passed on\r
1158 the Stack argument\r
1159\r
f22f941e 1160 @param[in] This The protocol instance pointer.\r
1161 @param[in] Segment The segemnt of 16-bit mode call.\r
1162 @param[in] Offset The offset of 16-bit mdoe call.\r
050b79eb 1163 @param[in] Reg Register contexted passed into (and returned) from thunk to\r
f22f941e 1164 16-bit mode.\r
1165 @param[in] Stack The caller allocated stack used to pass arguments.\r
1166 @param[in] StackSize The size of Stack in bytes.\r
79964ac8 1167\r
5259c97d 1168 @retval FALSE Thunk completed with no BIOS errors in the target code. See Regs for status. @retval TRUE There was a BIOS error in the target code.\r
79964ac8 1169**/\r
1170typedef\r
1171BOOLEAN\r
69686d56 1172(EFIAPI *EFI_LEGACY_BIOS_FARCALL86)(\r
050b79eb 1173 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1174 IN UINT16 Segment,\r
1175 IN UINT16 Offset,\r
1176 IN EFI_IA32_REGISTER_SET *Regs,\r
1177 IN VOID *Stack,\r
1178 IN UINTN StackSize\r
79964ac8 1179 );\r
1180\r
1181/**\r
1182 Test to see if a legacy PCI ROM exists for this device. Optionally return\r
1183 the Legacy ROM instance for this PCI device.\r
1184\r
f22f941e 1185 @param[in] This The protocol instance pointer.\r
050b79eb 1186 @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded\r
f22f941e 1187 @param[out] RomImage Return the legacy PCI ROM for this device.\r
1188 @param[out] RomSize The size of ROM Image.\r
050b79eb 1189 @param[out] Flags Indicates if ROM found and if PC-AT. Multiple bits can be set as follows:\r
f22f941e 1190 - 00 = No ROM.\r
1191 - 01 = ROM Found.\r
1192 - 02 = ROM is a valid legacy ROM.\r
79964ac8 1193\r
d6a1c70d 1194 @retval EFI_SUCCESS The Legacy Option ROM available for this device\r
f22f941e 1195 @retval EFI_UNSUPPORTED The Legacy Option ROM is not supported.\r
79964ac8 1196\r
1197**/\r
1198typedef\r
1199EFI_STATUS\r
69686d56 1200(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM)(\r
050b79eb 1201 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1202 IN EFI_HANDLE PciHandle,\r
1203 OUT VOID **RomImage, OPTIONAL\r
1204 OUT UINTN *RomSize, OPTIONAL\r
1205 OUT UINTN *Flags\r
79964ac8 1206 );\r
1207\r
1208/**\r
1209 Load a legacy PC-AT OPROM on the PciHandle device. Return information\r
1210 about how many disks were added by the OPROM and the shadow address and\r
1211 size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:\r
1212\r
f22f941e 1213 @param[in] This The protocol instance pointer.\r
050b79eb 1214 @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.\r
1215 This value is NULL if RomImage is non-NULL. This is the normal\r
1216 case.\r
1217 @param[in] RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is\r
1218 no hardware associated with the ROM and thus no PciHandle,\r
1219 otherwise is must be NULL.\r
1220 Example is PXE base code.\r
1221 @param[out] Flags The type of ROM discovered. Multiple bits can be set, as follows:\r
1222 - 00 = No ROM.\r
1223 - 01 = ROM found.\r
1224 - 02 = ROM is a valid legacy ROM.\r
f22f941e 1225 @param[out] DiskStart The disk number of first device hooked by the ROM. If DiskStart\r
050b79eb 1226 is the same as DiskEnd no disked were hooked.\r
1227 @param[out] DiskEnd disk number of the last device hooked by the ROM.\r
f22f941e 1228 @param[out] RomShadowAddress Shadow address of PC-AT ROM.\r
1229 @param[out] RomShadowSize Size of RomShadowAddress in bytes.\r
050b79eb 1230\r
1231 @retval EFI_SUCCESS Thunk completed, see Regs for status.\r
1232 @retval EFI_INVALID_PARAMETER PciHandle not found\r
79964ac8 1233\r
1234**/\r
1235typedef\r
1236EFI_STATUS\r
69686d56 1237(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM)(\r
050b79eb 1238 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1239 IN EFI_HANDLE PciHandle,\r
1240 IN VOID **RomImage,\r
1241 OUT UINTN *Flags,\r
1242 OUT UINT8 *DiskStart, OPTIONAL\r
1243 OUT UINT8 *DiskEnd, OPTIONAL\r
1244 OUT VOID **RomShadowAddress, OPTIONAL\r
1245 OUT UINT32 *ShadowedRomSize OPTIONAL\r
79964ac8 1246 );\r
1247\r
1248/**\r
ef1ac015 1249 This function attempts to traditionally boot the specified BootOption. If the EFI context has\r
5259c97d 1250 been compromised, this function will not return. This procedure is not used for loading an EFI-aware\r
ef1ac015 1251 OS off a traditional device. The following actions occur:\r
1252 - Get EFI SMBIOS data structures, convert them to a traditional format, and copy to\r
1253 Compatibility16.\r
1254 - Get a pointer to ACPI data structures and copy the Compatibility16 RSD PTR to F0000 block.\r
1255 - Find the traditional SMI handler from a firmware volume and register the traditional SMI\r
1256 handler with the EFI SMI handler.\r
1257 - Build onboard IDE information and pass this information to the Compatibility16 code.\r
1258 - Make sure all PCI Interrupt Line registers are programmed to match 8259.\r
1259 - Reconfigure SIO devices from EFI mode (polled) into traditional mode (interrupt driven).\r
1260 - Shadow all PCI ROMs.\r
1261 - Set up BDA and EBDA standard areas before the legacy boot.\r
1262 - Construct the Compatibility16 boot memory map and pass it to the Compatibility16 code.\r
1263 - Invoke the Compatibility16 table function Compatibility16PrepareToBoot(). This\r
1264 invocation causes a thunk into the Compatibility16 code, which sets all appropriate internal\r
1265 data structures. The boot device list is a parameter.\r
1266 - Invoke the Compatibility16 Table function Compatibility16Boot(). This invocation\r
1267 causes a thunk into the Compatibility16 code, which does an INT19.\r
1268 - If the Compatibility16Boot() function returns, then the boot failed in a graceful\r
5259c97d 1269 manner--meaning that the EFI code is still valid. An ungraceful boot failure causes a reset because the state\r
ef1ac015 1270 of EFI code is unknown.\r
79964ac8 1271\r
f22f941e 1272 @param[in] This The protocol instance pointer.\r
1273 @param[in] BootOption The EFI Device Path from BootXXXX variable.\r
1274 @param[in] LoadOptionSize The size of LoadOption in size.\r
1275 @param[in] LoadOption LThe oadOption from BootXXXX variable.\r
79964ac8 1276\r
5259c97d 1277 @retval EFI_DEVICE_ERROR Failed to boot from any boot device and memory is uncorrupted. Note: This function normally does not returns. It will either boot the OS or reset the system if memory has been "corrupted" by loading a boot sector and passing control to it.\r
79964ac8 1278**/\r
1279typedef\r
1280EFI_STATUS\r
69686d56 1281(EFIAPI *EFI_LEGACY_BIOS_BOOT)(\r
050b79eb 1282 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1283 IN BBS_BBS_DEVICE_PATH *BootOption,\r
1284 IN UINT32 LoadOptionsSize,\r
1285 IN VOID *LoadOptions\r
79964ac8 1286 );\r
1287\r
1288/**\r
1c2f052d
LG
1289 This function takes the Leds input parameter and sets/resets the BDA accordingly.\r
1290 Leds is also passed to Compatibility16 code, in case any special processing is required.\r
5259c97d 1291 This function is normally called from EFI Setup drivers that handle user-selectable\r
ef1ac015 1292 keyboard options such as boot with NUM LOCK on/off. This function does not\r
1293 touch the keyboard or keyboard LEDs but only the BDA.\r
79964ac8 1294\r
f22f941e 1295 @param[in] This The protocol instance pointer.\r
1296 @param[in] Leds The status of current Scroll, Num & Cap lock LEDS:\r
1297 - Bit 0 is Scroll Lock 0 = Not locked.\r
1298 - Bit 1 is Num Lock.\r
1299 - Bit 2 is Caps Lock.\r
79964ac8 1300\r
050b79eb 1301 @retval EFI_SUCCESS The BDA was updated successfully.\r
79964ac8 1302\r
1303**/\r
1304typedef\r
1305EFI_STATUS\r
69686d56 1306(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS)(\r
050b79eb 1307 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1308 IN UINT8 Leds\r
79964ac8 1309 );\r
1310\r
1311/**\r
1312 Retrieve legacy BBS info and assign boot priority.\r
1313\r
f22f941e 1314 @param[in] This The protocol instance pointer.\r
1315 @param[out] HddCount The number of HDD_INFO structures.\r
1316 @param[out] HddInfo Onboard IDE controller information.\r
1317 @param[out] BbsCount The number of BBS_TABLE structures.\r
1318 @param[in,out] BbsTable Points to List of BBS_TABLE.\r
79964ac8 1319\r
f22f941e 1320 @retval EFI_SUCCESS Tables were returned.\r
79964ac8 1321\r
1322**/\r
1323typedef\r
1324EFI_STATUS\r
69686d56 1325(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO)(\r
050b79eb 1326 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1327 OUT UINT16 *HddCount,\r
1328 OUT HDD_INFO **HddInfo,\r
1329 OUT UINT16 *BbsCount,\r
1330 IN OUT BBS_TABLE **BbsTable\r
79964ac8 1331 );\r
1332\r
1333/**\r
1334 Assign drive number to legacy HDD drives prior to booting an EFI\r
1335 aware OS so the OS can access drives without an EFI driver.\r
1336\r
f22f941e 1337 @param[in] This The protocol instance pointer.\r
1338 @param[out] BbsCount The number of BBS_TABLE structures\r
1339 @param[out] BbsTable List of BBS entries\r
79964ac8 1340\r
f22f941e 1341 @retval EFI_SUCCESS Drive numbers assigned.\r
79964ac8 1342\r
1343**/\r
1344typedef\r
1345EFI_STATUS\r
69686d56 1346(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI)(\r
050b79eb 1347 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1348 OUT UINT16 *BbsCount,\r
1349 OUT BBS_TABLE **BbsTable\r
79964ac8 1350 );\r
1351\r
1352/**\r
1353 To boot from an unconventional device like parties and/or execute\r
1354 HDD diagnostics.\r
1355\r
f22f941e 1356 @param[in] This The protocol instance pointer.\r
1357 @param[in] Attributes How to interpret the other input parameters.\r
050b79eb 1358 @param[in] BbsEntry The 0-based index into the BbsTable for the parent\r
79964ac8 1359 device.\r
f22f941e 1360 @param[in] BeerData A pointer to the 128 bytes of ram BEER data.\r
1361 @param[in] ServiceAreaData A pointer to the 64 bytes of raw Service Area data. The\r
79964ac8 1362 caller must provide a pointer to the specific Service\r
1363 Area and not the start all Service Areas.\r
1364\r
050b79eb 1365 @retval EFI_INVALID_PARAMETER If error. Does NOT return if no error.\r
79964ac8 1366\r
1367**/\r
1368typedef\r
1369EFI_STATUS\r
69686d56 1370(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE)(\r
050b79eb 1371 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1372 IN UDC_ATTRIBUTES Attributes,\r
1373 IN UINTN BbsEntry,\r
1374 IN VOID *BeerData,\r
1375 IN VOID *ServiceAreaData\r
79964ac8 1376 );\r
1377\r
1378/**\r
1379 Shadow all legacy16 OPROMs that haven't been shadowed.\r
1380 Warning: Use this with caution. This routine disconnects all EFI\r
f22f941e 1381 drivers. If used externally, then the caller must re-connect EFI\r
79964ac8 1382 drivers.\r
1c2f052d 1383\r
f22f941e 1384 @param[in] This The protocol instance pointer.\r
1c2f052d 1385\r
f22f941e 1386 @retval EFI_SUCCESS OPROMs were shadowed.\r
79964ac8 1387\r
1388**/\r
1389typedef\r
1390EFI_STATUS\r
69686d56 1391(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS)(\r
050b79eb 1392 IN EFI_LEGACY_BIOS_PROTOCOL *This\r
79964ac8 1393 );\r
1394\r
1395/**\r
1396 Get a region from the LegacyBios for S3 usage.\r
1397\r
f22f941e 1398 @param[in] This The protocol instance pointer.\r
1399 @param[in] LegacyMemorySize The size of required region.\r
1400 @param[in] Region The region to use.\r
1401 00 = Either 0xE0000 or 0xF0000 block.\r
1402 - Bit0 = 1 0xF0000 block.\r
1403 - Bit1 = 1 0xE0000 block.\r
1404 @param[in] Alignment Address alignment. Bit mapped. The first non-zero\r
050b79eb 1405 bit from right is alignment.\r
f22f941e 1406 @param[out] LegacyMemoryAddress The Region Assigned\r
79964ac8 1407\r
f22f941e 1408 @retval EFI_SUCCESS The Region was assigned.\r
ef1ac015 1409 @retval EFI_ACCESS_DENIED The function was previously invoked.\r
f22f941e 1410 @retval Other The Region was not assigned.\r
79964ac8 1411\r
1412**/\r
1413typedef\r
1414EFI_STATUS\r
69686d56 1415(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION)(\r
050b79eb 1416 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1417 IN UINTN LegacyMemorySize,\r
1418 IN UINTN Region,\r
1419 IN UINTN Alignment,\r
1420 OUT VOID **LegacyMemoryAddress\r
79964ac8 1421 );\r
1422\r
1423/**\r
1424 Get a region from the LegacyBios for Tiano usage. Can only be invoked once.\r
1425\r
f22f941e 1426 @param[in] This The protocol instance pointer.\r
1427 @param[in] LegacyMemorySize The size of data to copy.\r
1428 @param[in] LegacyMemoryAddress The Legacy Region destination address.\r
050b79eb 1429 Note: must be in region assigned by\r
f22f941e 1430 LegacyBiosGetLegacyRegion.\r
1431 @param[in] LegacyMemorySourceAddress The source of the data to copy.\r
79964ac8 1432\r
f22f941e 1433 @retval EFI_SUCCESS The Region assigned.\r
1434 @retval EFI_ACCESS_DENIED Destination was outside an assigned region.\r
79964ac8 1435\r
1436**/\r
1437typedef\r
1438EFI_STATUS\r
69686d56 1439(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION)(\r
050b79eb 1440 IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
1441 IN UINTN LegacyMemorySize,\r
1442 IN VOID *LegacyMemoryAddress,\r
1443 IN VOID *LegacyMemorySourceAddress\r
79964ac8 1444 );\r
1445\r
050b79eb 1446///\r
1447/// Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()\r
1448/// member function allows the BDS to support booting a traditional OS.\r
1449/// EFI thunks drivers that make EFI bindings for BIOS INT services use\r
1450/// all the other member functions.\r
1451///\r
79964ac8 1452struct _EFI_LEGACY_BIOS_PROTOCOL {\r
2bbaeb0d 1453 ///\r
1454 /// Performs traditional software INT. See the Int86() function description.\r
1455 ///\r
79964ac8 1456 EFI_LEGACY_BIOS_INT86 Int86;\r
1c2f052d 1457\r
2bbaeb0d 1458 ///\r
1459 /// Performs a far call into Compatibility16 or traditional OpROM code.\r
1460 ///\r
79964ac8 1461 EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r
1c2f052d 1462\r
2bbaeb0d 1463 ///\r
1464 /// Checks if a traditional OpROM exists for this device.\r
1465 ///\r
79964ac8 1466 EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r
1c2f052d 1467\r
2bbaeb0d 1468 ///\r
1469 /// Loads a traditional OpROM in traditional OpROM address space.\r
1470 ///\r
79964ac8 1471 EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r
1c2f052d 1472\r
2bbaeb0d 1473 ///\r
1474 /// Boots a traditional OS.\r
1475 ///\r
79964ac8 1476 EFI_LEGACY_BIOS_BOOT LegacyBoot;\r
1c2f052d 1477\r
2bbaeb0d 1478 ///\r
1479 /// Updates BDA to reflect the current EFI keyboard LED status.\r
1480 ///\r
79964ac8 1481 EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r
1c2f052d 1482\r
2bbaeb0d 1483 ///\r
1484 /// Allows an external agent, such as BIOS Setup, to get the BBS data.\r
1485 ///\r
79964ac8 1486 EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r
1c2f052d 1487\r
2bbaeb0d 1488 ///\r
1489 /// Causes all legacy OpROMs to be shadowed.\r
1490 ///\r
79964ac8 1491 EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r
1c2f052d 1492\r
2bbaeb0d 1493 ///\r
1494 /// Performs all actions prior to boot. Used when booting an EFI-aware OS\r
1c2f052d 1495 /// rather than a legacy OS.\r
2bbaeb0d 1496 ///\r
79964ac8 1497 EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r
1c2f052d 1498\r
2bbaeb0d 1499 ///\r
1500 /// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r
1501 ///\r
79964ac8 1502 EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r
1c2f052d 1503\r
2bbaeb0d 1504 ///\r
1505 /// Allows EFI to copy data to the area specified by GetLegacyRegion.\r
1506 ///\r
79964ac8 1507 EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r
1c2f052d 1508\r
2bbaeb0d 1509 ///\r
1510 /// Allows the user to boot off an unconventional device such as a PARTIES partition.\r
1511 ///\r
79964ac8 1512 EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r
1513};\r
1514\r
7619eed8
JW
1515//\r
1516// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if\r
1517// NULL pointer detection feature is enabled. Following macro can be used to\r
1518// enable/disable page 0 before/after accessing it.\r
1519//\r
1520#define ACCESS_PAGE0_CODE(statements) \\r
1521 do { \\r
1522 EFI_STATUS Status_; \\r
1523 EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \\r
1524 \\r
1525 Desc_.Attributes = 0; \\r
1526 Status_ = gDS->GetMemorySpaceDescriptor (0, &Desc_); \\r
1527 ASSERT_EFI_ERROR (Status_); \\r
1528 if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r
1529 Status_ = gDS->SetMemorySpaceAttributes ( \\r
1530 0, \\r
1531 EFI_PAGES_TO_SIZE(1), \\r
1532 Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \\r
1533 ); \\r
1534 ASSERT_EFI_ERROR (Status_); \\r
1535 } \\r
1536 \\r
1537 { \\r
1538 statements; \\r
1539 } \\r
1540 \\r
1541 if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r
1542 Status_ = gDS->SetMemorySpaceAttributes ( \\r
1543 0, \\r
1544 EFI_PAGES_TO_SIZE(1), \\r
1545 Desc_.Attributes \\r
1546 ); \\r
1547 ASSERT_EFI_ERROR (Status_); \\r
1548 } \\r
1549 } while (FALSE)\r
1550\r
79964ac8 1551extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r
1552\r
1553#endif\r