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1 | ;; @file\r |
2 | ; SEC CAR function\r | |
3 | ;\r | |
4 | ; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>\r | |
5 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
6 | ;;\r | |
7 | \r | |
8 | ;\r | |
9 | ; Define assembler characteristics\r | |
10 | ;\r | |
11 | \r | |
12 | %macro RET_RSI 0\r | |
13 | \r | |
14 | movd rsi, mm7 ; move ReturnAddress from MM7 to RSI\r | |
15 | jmp rsi\r | |
16 | \r | |
17 | %endmacro\r | |
18 | \r | |
19 | SECTION .text\r | |
20 | \r | |
21 | ;-----------------------------------------------------------------------------\r | |
22 | ;\r | |
23 | ; Section: SecCarInit\r | |
24 | ;\r | |
25 | ; Description: This function initializes the Cache for Data, Stack, and Code\r | |
26 | ;\r | |
27 | ;-----------------------------------------------------------------------------\r | |
28 | global ASM_PFX(SecCarInit)\r | |
29 | ASM_PFX(SecCarInit):\r | |
30 | \r | |
31 | ;\r | |
32 | ; Set up CAR\r | |
33 | ;\r | |
34 | \r | |
35 | xor rax, rax\r | |
36 | \r | |
37 | SecCarInitExit:\r | |
38 | \r | |
39 | RET_RSI\r | |
40 | \r |