DynamicTablesPkg: Add dynamic PPTT table generation support

[mirror_edk2.git] / IntelFspWrapperPkg / IntelFspWrapperPkg.dec

## @file\r
# Provides drivers and definitions to support fsp in EDKII bios.\r
#\r
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
##\r
\r
[Defines]\r
  DEC_SPECIFICATION              = 0x00010005\r
  PACKAGE_NAME                   = IntelFspWrapperPkg\r
  PACKAGE_GUID                   = 99101BB6-6DE1-4537-85A3-FD6B594F7468\r
  PACKAGE_VERSION                = 0.1\r
\r
[Includes]\r
  Include\r
\r
[LibraryClasses]\r
  ##  @libraryclass  Provide FSP API related function.\r
  FspApiLib|Include/Library/FspApiLib.h\r
\r
  ##  @libraryclass  Provide FSP hob process related function.\r
  FspHobProcessLib|Include/Library/FspHobProcessLib.h\r
\r
  ##  @libraryclass  Provide FSP platform information related function.\r
  FspPlatformInfoLib|Include/Library/FspPlatformInfoLib.h\r
\r
  ##  @libraryclass  Provide FSP wrapper platform sec related function.\r
  FspPlatformSecLib|Include/Library/FspPlatformSecLib.h\r
\r
[Guids]\r
  #\r
  # GUID defined in package\r
  #\r
  gFspWrapperTokenSpaceGuid             = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }\r
\r
[Ppis]\r
  gFspInitDonePpiGuid       = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }\r
  gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }\r
\r
[Protocols]\r
\r
################################################################################\r
#\r
# PCD Declarations section - list of all PCDs Declared by this Package\r
#                            Only this package should be providing the\r
#                            declaration, other packages should not.\r
#\r
################################################################################\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
  ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.\r
  gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001\r
  ## Provides the size of the BIOS Flash Device.\r
  gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002\r
\r
  ## Indicates the base address of the factory FSP binary.\r
  gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003\r
  ## Indicates the base address of the updatable FSP binary to support Dual FSP.\r
  #  There could be two FSP images at different locations in a flash - \r
  #  one factory version (default) and updatable version (updatable).\r
  #  TempRamInit, FspMemoryInit and TempRamExit are always executed from factory version.\r
  #  FspSiliconInit and NotifyPhase can be executed from updatable version if it is available,\r
  #  FspSiliconInit and NotifyPhase are executed from factory version if there is no updateable version,\r
  #  PcdFlashFvFspBase is base address of factory FSP, and PcdFlashFvSecondFspBase\r
  #  is base address of updatable FSP. If PcdFlashFvSecondFspBase is 0, that means\r
  #  there is no updatable FSP.\r
  gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspBase|0x00000000|UINT32|0x10000008\r
  ## Provides the size of the factory FSP binary.\r
  gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004\r
  ## Provides the size of the updatable FSP binary to support Dual FSP.\r
  gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspSize|0x00000000|UINT32|0x10000009\r
\r
  ## Indicates the base address of the first Microcode Patch in the Microcode Region\r
  gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005\r
  gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006\r
  ## Indicates the offset of the Cpu Microcode.\r
  gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x90|UINT32|0x10000007\r
\r
  ##\r
  #  Maximum number of Ppi is provided by SecCore.\r
  ##\r
  gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x20000001\r
\r
  # This is MAX UPD region size\r
  gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize|0x200|UINT32|0x30000001\r
\r
  ## Stack size in the temporary RAM.\r
  #   0 means half of TemporaryRamSize.\r
  gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x40000001\r
\r
  # This is temporary DRAM base and size for StackTop in FspInit\r
  gFspWrapperTokenSpaceGuid.PcdTemporaryRamBase|0x00080000|UINT32|0x40000002\r
  gFspWrapperTokenSpaceGuid.PcdTemporaryRamSize|0x00010000|UINT32|0x40000003\r
\r
  ## Indicate the PEI memory size platform want to report\r
  gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004\r
  ## Indicate the PEI memory size platform want to report\r
  gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r
\r
  ## PcdFspApiVersion is to determine wrapper calling mechanism\r
  # - FSP_API_REVISION_1     1\r
  # - FSP_API_REVISION_2     2\r
  gFspWrapperTokenSpaceGuid.PcdFspApiVersion|0x02|UINT8|0x00001000\r