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913cb9dc 1/** @file\r
2\r
78c2ffb5 3 Provides some data struct used by EHCI controller driver.\r
4\r
d1102dba 5Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
e33d3e7f 6Copyright (c) Microsoft Corporation.<BR>\r
9d510e61 7SPDX-License-Identifier: BSD-2-Clause-Patent\r
913cb9dc 8\r
913cb9dc 9**/\r
10\r
11#ifndef _EFI_EHCI_H_\r
12#define _EFI_EHCI_H_\r
13\r
ed7748fe 14\r
60c93673 15#include <Uefi.h>\r
ed7748fe 16\r
913cb9dc 17#include <Protocol/Usb2HostController.h>\r
18#include <Protocol/PciIo.h>\r
ed7748fe 19\r
0428a6cb 20#include <Guid/EventGroup.h>\r
21\r
913cb9dc 22#include <Library/DebugLib.h>\r
23#include <Library/BaseMemoryLib.h>\r
24#include <Library/UefiDriverEntryPoint.h>\r
25#include <Library/UefiBootServicesTableLib.h>\r
26#include <Library/UefiLib.h>\r
27#include <Library/BaseLib.h>\r
28#include <Library/MemoryAllocationLib.h>\r
dd4047a5 29#include <Library/PcdLib.h>\r
37623a5c 30#include <Library/ReportStatusCodeLib.h>\r
913cb9dc 31\r
a261044c 32#include <IndustryStandard/Pci.h>\r
913cb9dc 33\r
34typedef struct _USB2_HC_DEV USB2_HC_DEV;\r
35\r
36#include "UsbHcMem.h"\r
37#include "EhciReg.h"\r
38#include "EhciUrb.h"\r
39#include "EhciSched.h"\r
40#include "EhciDebug.h"\r
aa79b0b3 41#include "ComponentName.h"\r
913cb9dc 42\r
1ccdbf2a 43//\r
44// EHC timeout experience values\r
45//\r
46\r
47#define EHC_1_MICROSECOND 1\r
48#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)\r
49#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)\r
50\r
51//\r
52// EHCI register operation timeout, set by experience\r
53//\r
54#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)\r
55#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)\r
78c2ffb5 56\r
1ccdbf2a 57//\r
58// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]\r
59//\r
60#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)\r
61\r
62//\r
63// Sync and Async transfer polling interval, set by experience,\r
d525ec10 64// and the unit of Async is 100us, means 1ms as interval.\r
1ccdbf2a 65//\r
66#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)\r
d525ec10 67#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r
41e8ff27 68\r
09943f5e 69//\r
70// EHCI debug port control status register bit definition\r
71//\r
72#define USB_DEBUG_PORT_IN_USE BIT10\r
73#define USB_DEBUG_PORT_ENABLE BIT28\r
74#define USB_DEBUG_PORT_OWNER BIT30\r
b48ec0e8
LE
75#define USB_DEBUG_PORT_IN_USE_MASK (USB_DEBUG_PORT_IN_USE | \\r
76 USB_DEBUG_PORT_OWNER)\r
09943f5e 77\r
597f4ee2 78//\r
79// EHC raises TPL to TPL_NOTIFY to serialize all its operations\r
80// to protect shared data structures.\r
81//\r
09943f5e 82#define EHC_TPL TPL_NOTIFY\r
41e8ff27 83\r
50d7ebad 84#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)\r
913cb9dc 85\r
86\r
87#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r
88#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
89#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r
90\r
91#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r
92 (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r
93\r
597f4ee2 94#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')\r
95#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r
913cb9dc 96\r
c52fa98c 97struct _USB2_HC_DEV {\r
913cb9dc 98 UINTN Signature;\r
99 EFI_USB2_HC_PROTOCOL Usb2Hc;\r
100\r
101 EFI_PCI_IO_PROTOCOL *PciIo;\r
37623a5c 102 EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
68246fa8 103 UINT64 OriginalPciAttributes;\r
913cb9dc 104 USBHC_MEM_POOL *MemPool;\r
105\r
106 //\r
107 // Schedule data shared between asynchronous and periodic\r
108 // transfers:\r
109 // ShortReadStop, as its name indicates, is used to terminate\r
110 // the short read except the control transfer. EHCI follows\r
111 // the alternative next QTD point when a short read happens.\r
112 // For control transfer, even the short read happens, try the\r
113 // status stage.\r
114 //\r
115 EHC_QTD *ShortReadStop;\r
116 EFI_EVENT PollTimer;\r
117\r
0428a6cb 118 //\r
d1102dba 119 // ExitBootServicesEvent is used to stop the EHC DMA operation\r
0428a6cb 120 // after exit boot service.\r
121 //\r
122 EFI_EVENT ExitBootServiceEvent;\r
123\r
913cb9dc 124 //\r
125 // Asynchronous(bulk and control) transfer schedule data:\r
126 // ReclaimHead is used as the head of the asynchronous transfer\r
127 // list. It acts as the reclamation header.\r
128 //\r
129 EHC_QH *ReclaimHead;\r
130\r
131 //\r
ed356b9e 132 // Periodic (interrupt) transfer schedule data:\r
913cb9dc 133 //\r
592b87a4 134 VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r
135 VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r
913cb9dc 136 VOID *PeriodFrameMap;\r
137\r
138 EHC_QH *PeriodOne;\r
139 LIST_ENTRY AsyncIntTransfers;\r
140\r
141 //\r
142 // EHCI configuration data\r
143 //\r
144 UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET\r
145 UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS\r
146 UINT32 CapLen; // Capability length\r
913cb9dc 147\r
148 //\r
149 // Misc\r
150 //\r
151 EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
09943f5e 152\r
153 //\r
154 // EHCI debug port info\r
155 //\r
156 UINT16 DebugPortOffset; // The offset of debug port mmio register\r
157 UINT8 DebugPortBarNum; // The bar number of debug port mmio register\r
158 UINT8 DebugPortNum; // The port number of usb debug port\r
167c3fb4
AB
159\r
160 BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device\r
c52fa98c 161};\r
913cb9dc 162\r
163\r
f527bce3 164extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;\r
165extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;\r
166extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;\r
913cb9dc 167\r
aa79b0b3 168/**\r
169 Test to see if this driver supports ControllerHandle. Any\r
170 ControllerHandle that has Usb2HcProtocol installed will\r
171 be supported.\r
172\r
173 @param This Protocol instance pointer.\r
174 @param Controller Handle of device to test.\r
175 @param RemainingDevicePath Not used.\r
176\r
177 @return EFI_SUCCESS This driver supports this device.\r
178 @return EFI_UNSUPPORTED This driver does not support this device.\r
179\r
180**/\r
181EFI_STATUS\r
182EFIAPI\r
183EhcDriverBindingSupported (\r
184 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
185 IN EFI_HANDLE Controller,\r
186 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
187 );\r
188\r
189/**\r
190 Starting the Usb EHCI Driver.\r
191\r
192 @param This Protocol instance pointer.\r
193 @param Controller Handle of device to test.\r
194 @param RemainingDevicePath Not used.\r
195\r
196 @return EFI_SUCCESS supports this device.\r
197 @return EFI_UNSUPPORTED do not support this device.\r
198 @return EFI_DEVICE_ERROR cannot be started due to device Error.\r
199 @return EFI_OUT_OF_RESOURCES cannot allocate resources.\r
200\r
201**/\r
202EFI_STATUS\r
203EFIAPI\r
204EhcDriverBindingStart (\r
205 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
206 IN EFI_HANDLE Controller,\r
207 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
208 );\r
209\r
210/**\r
ed356b9e 211 Stop this driver on ControllerHandle. Support stopping any child handles\r
aa79b0b3 212 created by this driver.\r
213\r
214 @param This Protocol instance pointer.\r
215 @param Controller Handle of device to stop driver on.\r
216 @param NumberOfChildren Number of Children in the ChildHandleBuffer.\r
217 @param ChildHandleBuffer List of handles for the children we need to stop.\r
218\r
219 @return EFI_SUCCESS Success.\r
220 @return EFI_DEVICE_ERROR Fail.\r
221\r
222**/\r
223EFI_STATUS\r
224EFIAPI\r
225EhcDriverBindingStop (\r
226 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
227 IN EFI_HANDLE Controller,\r
228 IN UINTN NumberOfChildren,\r
229 IN EFI_HANDLE *ChildHandleBuffer\r
230 );\r
231\r
913cb9dc 232#endif\r
aa79b0b3 233\r