]> git.proxmox.com Git - mirror_edk2.git/blame - MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h
MdeModulePkg/Pci: Fixed Asserts in SCT PCIIO Protocol Test.
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / NonDiscoverablePciDeviceDxe / NonDiscoverablePciDeviceIo.h
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1/** @file\r
2\r
3 Copyright (C) 2016, Linaro Ltd. All rights reserved.<BR>\r
4\r
9d510e61 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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6\r
7**/\r
8\r
9#ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__\r
10#define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__\r
11\r
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12#include <PiDxe.h>\r
13\r
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14#include <Library/BaseMemoryLib.h>\r
15#include <Library/DebugLib.h>\r
16#include <Library/MemoryAllocationLib.h>\r
17#include <Library/UefiBootServicesTableLib.h>\r
18#include <Library/UefiLib.h>\r
19\r
20#include <IndustryStandard/Pci.h>\r
21\r
22#include <Protocol/ComponentName.h>\r
23#include <Protocol/NonDiscoverableDevice.h>\r
16296a12 24#include <Protocol/Cpu.h>\r
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25#include <Protocol/PciIo.h>\r
26\r
27#define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')\r
28\r
29#define NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(PciIoPointer) \\r
30 CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \\r
31 NON_DISCOVERABLE_PCI_DEVICE_SIG)\r
32\r
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33#define DEV_SUPPORTED_ATTRIBUTES \\r
34 (EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
35\r
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36#define PCI_ID_VENDOR_UNKNOWN 0xffff\r
37#define PCI_ID_DEVICE_DONTCARE 0x0000\r
38\r
39#define PCI_MAX_BARS 6\r
40\r
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41extern EFI_CPU_ARCH_PROTOCOL *mCpu;\r
42\r
43typedef struct {\r
44 //\r
45 // The linked-list next pointer\r
46 //\r
47 LIST_ENTRY List;\r
48 //\r
49 // The address of the uncached allocation\r
50 //\r
51 VOID *HostAddress;\r
52 //\r
53 // The number of pages in the allocation\r
54 //\r
55 UINTN NumPages;\r
56 //\r
57 // The attributes of the allocation\r
58 //\r
59 UINT64 Attributes;\r
60} NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION;\r
61\r
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62typedef struct {\r
63 UINT32 Signature;\r
64 //\r
65 // The bound non-discoverable device protocol instance\r
66 //\r
67 NON_DISCOVERABLE_DEVICE *Device;\r
68 //\r
69 // The exposed PCI I/O protocol instance.\r
70 //\r
71 EFI_PCI_IO_PROTOCOL PciIo;\r
72 //\r
73 // The emulated PCI config space of the device. Only the minimally required\r
74 // items are assigned.\r
75 //\r
76 PCI_TYPE00 ConfigSpace;\r
77 //\r
78 // The first virtual BAR to assign based on the resources described\r
79 // by the non-discoverable device.\r
80 //\r
81 UINT32 BarOffset;\r
82 //\r
83 // The number of virtual BARs we expose based on the number of\r
84 // resources\r
85 //\r
86 UINT32 BarCount;\r
87 //\r
88 // The PCI I/O attributes for this device\r
89 //\r
90 UINT64 Attributes;\r
91 //\r
92 // Whether this device has been enabled\r
93 //\r
94 BOOLEAN Enabled;\r
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95 //\r
96 // Linked list to keep track of uncached allocations performed\r
97 // on behalf of this device\r
98 //\r
99 LIST_ENTRY UncachedAllocationList;\r
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100 //\r
101 // Unique ID for this device instance: needed so that we can report unique\r
102 // segment/bus/device number for each device instance. Note that this number\r
103 // may change when disconnecting/reconnecting the driver.\r
104 //\r
105 UINTN UniqueId;\r
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106} NON_DISCOVERABLE_PCI_DEVICE;\r
107\r
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108/**\r
109 Initialize PciIo Protocol.\r
110\r
111 @param Device Point to NON_DISCOVERABLE_PCI_DEVICE instance.\r
112\r
113**/\r
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114VOID\r
115InitializePciIoProtocol (\r
116 NON_DISCOVERABLE_PCI_DEVICE *Device\r
117 );\r
118\r
119extern EFI_COMPONENT_NAME_PROTOCOL gComponentName;\r
120extern EFI_COMPONENT_NAME2_PROTOCOL gComponentName2;\r
121\r
122#endif\r