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42eedea9 | 1 | /** @file \r |
568eb0cb | 2 | ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r |
3 | \r | |
2b1cf49a | 4 | Copyright (c) 2006 - 2008, Intel Corporation\r |
568eb0cb | 5 | All rights reserved. This program and the accompanying materials \r |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | **/\r | |
13 | \r | |
14 | #ifndef _ACPI_2_0_H_\r | |
15 | #define _ACPI_2_0_H_\r | |
16 | \r | |
732fb201 | 17 | #include <IndustryStandard/Acpi10.h>\r |
568eb0cb | 18 | \r |
19 | //\r | |
20 | // Ensure proper structure formats\r | |
21 | //\r | |
22 | #pragma pack(1)\r | |
568eb0cb | 23 | \r |
1bc5d021 | 24 | ///\r |
25 | /// ACPI 2.0 Generic Address Space definition\r | |
26 | ///\r | |
568eb0cb | 27 | typedef struct {\r |
28 | UINT8 AddressSpaceId;\r | |
29 | UINT8 RegisterBitWidth;\r | |
30 | UINT8 RegisterBitOffset;\r | |
31 | UINT8 Reserved;\r | |
32 | UINT64 Address;\r | |
33 | } EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r | |
34 | \r | |
55c11cc8 | 35 | #pragma pack()\r |
36 | \r | |
568eb0cb | 37 | //\r |
38 | // Generic Address Space Address IDs\r | |
39 | //\r | |
40 | #define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r | |
41 | #define EFI_ACPI_2_0_SYSTEM_IO 1\r | |
42 | #define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r | |
43 | #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r | |
44 | #define EFI_ACPI_2_0_SMBUS 4\r | |
45 | #define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r | |
46 | \r | |
47 | //\r | |
48 | // ACPI 2.0 table structures\r | |
49 | //\r | |
1bc5d021 | 50 | \r |
51 | ///\r | |
52 | /// Root System Description Pointer Structure\r | |
53 | ///\r | |
568eb0cb | 54 | typedef struct {\r |
55 | UINT64 Signature;\r | |
56 | UINT8 Checksum;\r | |
57 | UINT8 OemId[6];\r | |
58 | UINT8 Revision;\r | |
59 | UINT32 RsdtAddress;\r | |
60 | UINT32 Length;\r | |
61 | UINT64 XsdtAddress;\r | |
62 | UINT8 ExtendedChecksum;\r | |
63 | UINT8 Reserved[3];\r | |
64 | } EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r | |
65 | \r | |
1bc5d021 | 66 | ///\r |
67 | /// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r | |
68 | ///\r | |
568eb0cb | 69 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r |
70 | \r | |
1bc5d021 | 71 | ///\r |
72 | /// Common table header, this prefaces all ACPI tables, including FACS, but\r | |
73 | /// excluding the RSD PTR structure\r | |
74 | ///\r | |
568eb0cb | 75 | typedef struct {\r |
76 | UINT32 Signature;\r | |
77 | UINT32 Length;\r | |
78 | } EFI_ACPI_2_0_COMMON_HEADER;\r | |
79 | \r | |
80 | //\r | |
81 | // Root System Description Table\r | |
2b1cf49a | 82 | // No definition needed as it is a common description table header, the same with \r |
83 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r | |
568eb0cb | 84 | //\r |
1bc5d021 | 85 | \r |
86 | ///\r | |
87 | /// RSDT Revision (as defined in ACPI 2.0 spec.)\r | |
88 | ///\r | |
568eb0cb | 89 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r |
90 | \r | |
91 | //\r | |
92 | // Extended System Description Table\r | |
2b1cf49a | 93 | // No definition needed as it is a common description table header, the same with \r |
94 | // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r | |
568eb0cb | 95 | //\r |
1bc5d021 | 96 | \r |
97 | ///\r | |
98 | /// XSDT Revision (as defined in ACPI 2.0 spec.)\r | |
99 | ///\r | |
568eb0cb | 100 | #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r |
101 | \r | |
4f1afaac | 102 | // \r |
103 | // Ensure proper structure formats\r | |
104 | // \r | |
105 | #pragma pack(1)\r | |
1bc5d021 | 106 | ///\r |
107 | /// Fixed ACPI Description Table Structure (FADT)\r | |
108 | ///\r | |
568eb0cb | 109 | typedef struct {\r |
110 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
111 | UINT32 FirmwareCtrl;\r | |
112 | UINT32 Dsdt;\r | |
113 | UINT8 Reserved0;\r | |
114 | UINT8 PreferredPmProfile;\r | |
115 | UINT16 SciInt;\r | |
116 | UINT32 SmiCmd;\r | |
117 | UINT8 AcpiEnable;\r | |
118 | UINT8 AcpiDisable;\r | |
119 | UINT8 S4BiosReq;\r | |
120 | UINT8 PstateCnt;\r | |
121 | UINT32 Pm1aEvtBlk;\r | |
122 | UINT32 Pm1bEvtBlk;\r | |
123 | UINT32 Pm1aCntBlk;\r | |
124 | UINT32 Pm1bCntBlk;\r | |
125 | UINT32 Pm2CntBlk;\r | |
126 | UINT32 PmTmrBlk;\r | |
127 | UINT32 Gpe0Blk;\r | |
128 | UINT32 Gpe1Blk;\r | |
129 | UINT8 Pm1EvtLen;\r | |
130 | UINT8 Pm1CntLen;\r | |
131 | UINT8 Pm2CntLen;\r | |
132 | UINT8 PmTmrLen;\r | |
133 | UINT8 Gpe0BlkLen;\r | |
134 | UINT8 Gpe1BlkLen;\r | |
135 | UINT8 Gpe1Base;\r | |
136 | UINT8 CstCnt;\r | |
137 | UINT16 PLvl2Lat;\r | |
138 | UINT16 PLvl3Lat;\r | |
139 | UINT16 FlushSize;\r | |
140 | UINT16 FlushStride;\r | |
141 | UINT8 DutyOffset;\r | |
142 | UINT8 DutyWidth;\r | |
143 | UINT8 DayAlrm;\r | |
144 | UINT8 MonAlrm;\r | |
145 | UINT8 Century;\r | |
146 | UINT16 IaPcBootArch;\r | |
147 | UINT8 Reserved1;\r | |
148 | UINT32 Flags;\r | |
149 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r | |
150 | UINT8 ResetValue;\r | |
151 | UINT8 Reserved2[3];\r | |
152 | UINT64 XFirmwareCtrl;\r | |
153 | UINT64 XDsdt;\r | |
154 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r | |
155 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r | |
156 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r | |
157 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r | |
158 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r | |
159 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r | |
160 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r | |
161 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r | |
162 | } EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r | |
4f1afaac | 163 | #pragma pack()\r |
568eb0cb | 164 | \r |
1bc5d021 | 165 | ///\r |
166 | /// FADT Version (as defined in ACPI 2.0 spec.)\r | |
167 | ///\r | |
568eb0cb | 168 | #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r |
169 | \r | |
55c11cc8 | 170 | //\r |
171 | // Fixed ACPI Description Table Boot Architecture Flags\r | |
172 | // All other bits are reserved and must be set to 0.\r | |
173 | //\r | |
174 | #define EFI_ACPI_2_0_LEGACY_DEVICES BIT0\r | |
175 | #define EFI_ACPI_2_0_8042 BIT1\r | |
568eb0cb | 176 | \r |
177 | //\r | |
178 | // Fixed ACPI Description Table Fixed Feature Flags\r | |
179 | // All other bits are reserved and must be set to 0.\r | |
180 | //\r | |
55c11cc8 | 181 | #define EFI_ACPI_2_0_WBINVD BIT0\r |
182 | #define EFI_ACPI_2_0_WBINVD_FLUSH BIT1\r | |
183 | #define EFI_ACPI_2_0_PROC_C1 BIT2\r | |
184 | #define EFI_ACPI_2_0_P_LVL2_UP BIT3\r | |
185 | #define EFI_ACPI_2_0_PWR_BUTTON BIT4\r | |
186 | #define EFI_ACPI_2_0_SLP_BUTTON BIT5\r | |
187 | #define EFI_ACPI_2_0_FIX_RTC BIT6\r | |
188 | #define EFI_ACPI_2_0_RTC_S4 BIT7\r | |
189 | #define EFI_ACPI_2_0_TMR_VAL_EXT BIT8\r | |
190 | #define EFI_ACPI_2_0_DCK_CAP BIT9\r | |
191 | #define EFI_ACPI_2_0_RESET_REG_SUP BIT10\r | |
192 | #define EFI_ACPI_2_0_SEALED_CASE BIT11\r | |
193 | #define EFI_ACPI_2_0_HEADLESS BIT12\r | |
194 | #define EFI_ACPI_2_0_CPU_SW_SLP BIT13\r | |
568eb0cb | 195 | \r |
1bc5d021 | 196 | ///\r |
197 | /// Firmware ACPI Control Structure\r | |
198 | ///\r | |
568eb0cb | 199 | typedef struct {\r |
200 | UINT32 Signature;\r | |
201 | UINT32 Length;\r | |
202 | UINT32 HardwareSignature;\r | |
203 | UINT32 FirmwareWakingVector;\r | |
204 | UINT32 GlobalLock;\r | |
205 | UINT32 Flags;\r | |
206 | UINT64 XFirmwareWakingVector;\r | |
207 | UINT8 Version;\r | |
208 | UINT8 Reserved[31];\r | |
209 | } EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r | |
210 | \r | |
1bc5d021 | 211 | ///\r |
212 | /// FACS Version (as defined in ACPI 2.0 spec.)\r | |
213 | ///\r | |
568eb0cb | 214 | #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r |
215 | \r | |
1bc5d021 | 216 | ///\r |
217 | /// Firmware Control Structure Feature Flags\r | |
218 | /// All other bits are reserved and must be set to 0.\r | |
219 | ///\r | |
55c11cc8 | 220 | #define EFI_ACPI_2_0_S4BIOS_F BIT0\r |
568eb0cb | 221 | \r |
1bc5d021 | 222 | ///\r |
223 | /// Multiple APIC Description Table header definition. The rest of the table\r | |
224 | /// must be defined in a platform specific manner.\r | |
225 | ///\r | |
568eb0cb | 226 | typedef struct {\r |
227 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
228 | UINT32 LocalApicAddress;\r | |
229 | UINT32 Flags;\r | |
230 | } EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r | |
231 | \r | |
1bc5d021 | 232 | ///\r |
233 | /// MADT Revision (as defined in ACPI 2.0 spec.)\r | |
234 | ///\r | |
568eb0cb | 235 | #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r |
236 | \r | |
1bc5d021 | 237 | ///\r |
238 | /// Multiple APIC Flags\r | |
239 | /// All other bits are reserved and must be set to 0.\r | |
240 | ///\r | |
55c11cc8 | 241 | #define EFI_ACPI_2_0_PCAT_COMPAT BIT0\r |
568eb0cb | 242 | \r |
243 | //\r | |
244 | // Multiple APIC Description Table APIC structure types\r | |
245 | // All other values between 0x09 an 0xFF are reserved and\r | |
246 | // will be ignored by OSPM.\r | |
247 | //\r | |
248 | #define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r | |
249 | #define EFI_ACPI_2_0_IO_APIC 0x01\r | |
250 | #define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r | |
251 | #define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r | |
252 | #define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r | |
253 | #define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r | |
254 | #define EFI_ACPI_2_0_IO_SAPIC 0x06\r | |
255 | #define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r | |
256 | #define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r | |
257 | \r | |
258 | //\r | |
259 | // APIC Structure Definitions\r | |
260 | //\r | |
1bc5d021 | 261 | \r |
262 | ///\r | |
263 | /// Processor Local APIC Structure Definition\r | |
264 | ///\r | |
568eb0cb | 265 | typedef struct {\r |
266 | UINT8 Type;\r | |
267 | UINT8 Length;\r | |
268 | UINT8 AcpiProcessorId;\r | |
269 | UINT8 ApicId;\r | |
270 | UINT32 Flags;\r | |
271 | } EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r | |
272 | \r | |
1bc5d021 | 273 | ///\r |
274 | /// Local APIC Flags. All other bits are reserved and must be 0.\r | |
275 | ///\r | |
55c11cc8 | 276 | #define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0\r |
568eb0cb | 277 | \r |
1bc5d021 | 278 | ///\r |
279 | /// IO APIC Structure\r | |
280 | ///\r | |
568eb0cb | 281 | typedef struct {\r |
282 | UINT8 Type;\r | |
283 | UINT8 Length;\r | |
284 | UINT8 IoApicId;\r | |
285 | UINT8 Reserved;\r | |
286 | UINT32 IoApicAddress;\r | |
287 | UINT32 GlobalSystemInterruptBase;\r | |
288 | } EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r | |
289 | \r | |
1bc5d021 | 290 | ///\r |
291 | /// Interrupt Source Override Structure\r | |
292 | ///\r | |
568eb0cb | 293 | typedef struct {\r |
294 | UINT8 Type;\r | |
295 | UINT8 Length;\r | |
296 | UINT8 Bus;\r | |
297 | UINT8 Source;\r | |
298 | UINT32 GlobalSystemInterrupt;\r | |
299 | UINT16 Flags;\r | |
300 | } EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r | |
301 | \r | |
1bc5d021 | 302 | ///\r |
303 | /// Non-Maskable Interrupt Source Structure\r | |
304 | ///\r | |
568eb0cb | 305 | typedef struct {\r |
306 | UINT8 Type;\r | |
307 | UINT8 Length;\r | |
308 | UINT16 Flags;\r | |
309 | UINT32 GlobalSystemInterrupt;\r | |
310 | } EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r | |
311 | \r | |
55c11cc8 | 312 | //\r |
313 | // Ensure proper structure formats\r | |
314 | //\r | |
315 | #pragma pack(1)\r | |
316 | \r | |
1bc5d021 | 317 | ///\r |
318 | /// Local APIC NMI Structure\r | |
319 | ///\r | |
568eb0cb | 320 | typedef struct {\r |
321 | UINT8 Type;\r | |
322 | UINT8 Length;\r | |
323 | UINT8 AcpiProcessorId;\r | |
324 | UINT16 Flags;\r | |
325 | UINT8 LocalApicLint;\r | |
326 | } EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r | |
327 | \r | |
1bc5d021 | 328 | ///\r |
329 | /// Local APIC Address Override Structure\r | |
330 | ///\r | |
568eb0cb | 331 | typedef struct {\r |
332 | UINT8 Type;\r | |
333 | UINT8 Length;\r | |
334 | UINT16 Reserved;\r | |
335 | UINT64 LocalApicAddress;\r | |
336 | } EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r | |
337 | \r | |
55c11cc8 | 338 | #pragma pack()\r |
339 | \r | |
1bc5d021 | 340 | ///\r |
341 | /// IO SAPIC Structure\r | |
342 | ///\r | |
568eb0cb | 343 | typedef struct {\r |
344 | UINT8 Type;\r | |
345 | UINT8 Length;\r | |
346 | UINT8 IoApicId;\r | |
347 | UINT8 Reserved;\r | |
348 | UINT32 GlobalSystemInterruptBase;\r | |
349 | UINT64 IoSapicAddress;\r | |
350 | } EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r | |
351 | \r | |
1bc5d021 | 352 | ///\r |
353 | /// Local SAPIC Structure\r | |
354 | ///\r | |
568eb0cb | 355 | typedef struct {\r |
356 | UINT8 Type;\r | |
357 | UINT8 Length;\r | |
358 | UINT8 AcpiProcessorId;\r | |
359 | UINT8 LocalSapicId;\r | |
360 | UINT8 LocalSapicEid;\r | |
361 | UINT8 Reserved[3];\r | |
362 | UINT32 Flags;\r | |
363 | } EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r | |
364 | \r | |
1bc5d021 | 365 | ///\r |
366 | /// Platform Interrupt Sources Structure\r | |
367 | ///\r | |
568eb0cb | 368 | typedef struct {\r |
369 | UINT8 Type;\r | |
370 | UINT8 Length;\r | |
371 | UINT16 Flags;\r | |
372 | UINT8 InterruptType;\r | |
373 | UINT8 ProcessorId;\r | |
374 | UINT8 ProcessorEid;\r | |
375 | UINT8 IoSapicVector;\r | |
376 | UINT32 GlobalSystemInterrupt;\r | |
377 | UINT32 Reserved;\r | |
378 | } EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r | |
379 | \r | |
1bc5d021 | 380 | ///\r |
381 | /// Smart Battery Description Table (SBST)\r | |
382 | ///\r | |
568eb0cb | 383 | typedef struct {\r |
384 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
385 | UINT32 WarningEnergyLevel;\r | |
386 | UINT32 LowEnergyLevel;\r | |
387 | UINT32 CriticalEnergyLevel;\r | |
388 | } EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r | |
389 | \r | |
1bc5d021 | 390 | ///\r |
391 | /// SBST Version (as defined in ACPI 2.0 spec.)\r | |
392 | ///\r | |
568eb0cb | 393 | #define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r |
394 | \r | |
1bc5d021 | 395 | ///\r |
396 | /// Embedded Controller Boot Resources Table (ECDT)\r | |
397 | /// The table is followed by a null terminated ASCII string that contains\r | |
398 | /// a fully qualified reference to the name space object.\r | |
399 | ///\r | |
568eb0cb | 400 | typedef struct {\r |
401 | EFI_ACPI_DESCRIPTION_HEADER Header;\r | |
402 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r | |
403 | EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r | |
404 | UINT32 Uid;\r | |
405 | UINT8 GpeBit;\r | |
406 | } EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r | |
407 | \r | |
1bc5d021 | 408 | ///\r |
409 | /// ECDT Version (as defined in ACPI 2.0 spec.)\r | |
410 | ///\r | |
568eb0cb | 411 | #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r |
412 | \r | |
413 | //\r | |
414 | // Known table signatures\r | |
415 | //\r | |
1bc5d021 | 416 | \r |
417 | ///\r | |
418 | /// "RSD PTR " Root System Description Pointer\r | |
419 | ///\r | |
13c31065 | 420 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r |
568eb0cb | 421 | \r |
1bc5d021 | 422 | ///\r |
423 | /// "SPIC" Multiple SAPIC Description Table\r | |
424 | ///\r | |
425 | /// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r | |
426 | /// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r | |
427 | ///\r | |
13c31065 | 428 | #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'I', 'C')\r |
568eb0cb | 429 | \r |
1bc5d021 | 430 | ///\r |
431 | /// "BOOT" MS Simple Boot Spec\r | |
432 | ///\r | |
13c31065 | 433 | #define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r |
568eb0cb | 434 | \r |
1bc5d021 | 435 | ///\r |
436 | /// "DBGP" MS Bebug Port Spec\r | |
437 | ///\r | |
13c31065 | 438 | #define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r |
568eb0cb | 439 | \r |
1bc5d021 | 440 | ///\r |
441 | /// "DSDT" Differentiated System Description Table\r | |
442 | ///\r | |
13c31065 | 443 | #define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r |
568eb0cb | 444 | \r |
1bc5d021 | 445 | ///\r |
446 | /// "ECDT" Embedded Controller Boot Resources Table\r | |
447 | ///\r | |
13c31065 | 448 | #define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r |
568eb0cb | 449 | \r |
1bc5d021 | 450 | ///\r |
451 | /// "ETDT" Event Timer Description Table\r | |
452 | ///\r | |
13c31065 | 453 | #define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r |
568eb0cb | 454 | \r |
1bc5d021 | 455 | ///\r |
456 | /// "FACS" Firmware ACPI Control Structure\r | |
457 | ///\r | |
13c31065 | 458 | #define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r |
568eb0cb | 459 | \r |
1bc5d021 | 460 | ///\r |
461 | /// "FACP" Fixed ACPI Description Table\r | |
462 | ///\r | |
13c31065 | 463 | #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r |
568eb0cb | 464 | \r |
1bc5d021 | 465 | ///\r |
466 | /// "APIC" Multiple APIC Description Table\r | |
467 | ///\r | |
13c31065 | 468 | #define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r |
568eb0cb | 469 | \r |
1bc5d021 | 470 | ///\r |
471 | /// "PSDT" Persistent System Description Table\r | |
472 | ///\r | |
13c31065 | 473 | #define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r |
568eb0cb | 474 | \r |
1bc5d021 | 475 | ///\r |
476 | /// "RSDT" Root System Description Table\r | |
477 | ///\r | |
13c31065 | 478 | #define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r |
568eb0cb | 479 | \r |
1bc5d021 | 480 | ///\r |
481 | /// "SBST" Smart Battery Specification Table\r | |
482 | ///\r | |
13c31065 | 483 | #define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r |
568eb0cb | 484 | \r |
1bc5d021 | 485 | ///\r |
486 | /// "SLIT" System Locality Information Table\r | |
487 | ///\r | |
13c31065 | 488 | #define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r |
568eb0cb | 489 | \r |
1bc5d021 | 490 | ///\r |
491 | /// "SPCR" Serial Port Concole Redirection Table\r | |
492 | ///\r | |
13c31065 | 493 | #define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r |
568eb0cb | 494 | \r |
1bc5d021 | 495 | ///\r |
496 | /// "SRAT" Static Resource Affinity Table\r | |
497 | ///\r | |
13c31065 | 498 | #define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r |
568eb0cb | 499 | \r |
1bc5d021 | 500 | ///\r |
501 | /// "SSDT" Secondary System Description Table\r | |
502 | ///\r | |
13c31065 | 503 | #define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r |
568eb0cb | 504 | \r |
1bc5d021 | 505 | ///\r |
506 | /// "SPMI" Server Platform Management Interface Table\r | |
507 | ///\r | |
13c31065 | 508 | #define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r |
568eb0cb | 509 | \r |
1bc5d021 | 510 | ///\r |
511 | /// "XSDT" Extended System Description Table\r | |
512 | ///\r | |
13c31065 | 513 | #define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r |
568eb0cb | 514 | \r |
1bc5d021 | 515 | ///\r |
516 | /// "MCFG" Static Resource Affinity Table\r | |
517 | ///\r | |
13c31065 | 518 | #define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r |
3431f363 | 519 | \r |
568eb0cb | 520 | #endif\r |