[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Atapi.h

/** @file\r
  This file contains just some basic definitions that are needed by drivers\r
  that dealing with ATA/ATAPI interface.\r
\r
Copyright (c) 2007 - 2008, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef _ATAPI_H_\r
#define _ATAPI_H_\r
\r
///\r
/// ATAPI_IDENTIFY_DATA is defined in ATA-6\r
///\r
typedef struct {\r
    UINT16  config;             ///< General Configuration\r
    UINT16  obsolete_1;\r
    UINT16  specific_config;\r
    UINT16  obsolete_3;\r
    UINT16  retired_4_5[2];\r
    UINT16  obsolete_6;\r
    UINT16  cfa_reserved_7_8[2];\r
    UINT16  retired_9;\r
    CHAR8   SerialNo[20];       ///< ASCII\r
    UINT16  retired_20_21[2];\r
    UINT16  obsolete_22;\r
    CHAR8   FirmwareVer[8];     ///< ASCII\r
    CHAR8   ModelName[40];      ///< ASCII\r
    UINT16  multi_sector_cmd_max_sct_cnt;\r
    UINT16  reserved_48;\r
    UINT16  capabilities_49;\r
    UINT16  capabilities_50;\r
    UINT16  obsolete_51_52[2];\r
    UINT16  field_validity;\r
    UINT16  obsolete_54_58[5];\r
    UINT16  mutil_sector_setting;\r
    UINT16  user_addressable_sectors_lo;\r
    UINT16  user_addressable_sectors_hi;\r
    UINT16  obsolete_62;\r
    UINT16  multi_word_dma_mode;\r
    UINT16  advanced_pio_modes;\r
    UINT16  min_multi_word_dma_cycle_time;\r
    UINT16  rec_multi_word_dma_cycle_time;\r
    UINT16  min_pio_cycle_time_without_flow_control;\r
    UINT16  min_pio_cycle_time_with_flow_control;\r
    UINT16  reserved_69_74[6];\r
    UINT16  queue_depth;\r
    UINT16  reserved_76_79[4];\r
    UINT16  major_version_no;\r
    UINT16  minor_version_no;\r
    UINT16  cmd_set_support_82;\r
    UINT16  cmd_set_support_83;\r
    UINT16  cmd_feature_support;\r
    UINT16  cmd_feature_enable_85;\r
    UINT16  cmd_feature_enable_86;\r
    UINT16  cmd_feature_default;\r
    UINT16  ultra_dma_select;\r
    UINT16  time_required_for_sec_erase;\r
    UINT16  time_required_for_enhanced_sec_erase;\r
    UINT16  current_advanced_power_mgmt_value;\r
    UINT16  master_pwd_revison_code;\r
    UINT16  hardware_reset_result;\r
    UINT16  current_auto_acoustic_mgmt_value;\r
    UINT16  reserved_95_99[5];\r
    UINT16  max_user_lba_for_48bit_addr[4];\r
    UINT16  reserved_104_126[23];\r
    UINT16  removable_media_status_notification_support;\r
    UINT16  security_status;\r
    UINT16  vendor_data_129_159[31];\r
    UINT16  cfa_power_mode;\r
    UINT16  cfa_reserved_161_175[15];\r
    UINT16  current_media_serial_no[30];\r
    UINT16  reserved_206_254[49];\r
    UINT16  integrity_word;\r
} ATAPI_IDENTIFY_DATA;\r
\r
///\r
/// Standard Quiry Data format, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
  UINT8 peripheral_type;\r
  UINT8 RMB;\r
  UINT8 version;\r
  UINT8 response_data_format;\r
  UINT8 addnl_length;     ///< n - 4, Numbers of bytes following this one\r
  UINT8 reserved_5;\r
  UINT8 reserved_6;\r
  UINT8 reserved_7;\r
  UINT8 vendor_info[8];\r
  UINT8 product_id[16];\r
  UINT8 product_revision_level[4];\r
  UINT8 vendor_specific_36_55[55 - 36 + 1];\r
  UINT8 reserved_56_95[95 - 56 + 1];\r
  ///\r
  /// Vendor specific parameters fields, the sizeof (ATAPI_INQUIRY_DATA) is 254\r
  /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
  ///\r
  UINT8 vendor_specific_96_253[253 - 96 + 1];\r
} ATAPI_INQUIRY_DATA;\r
\r
///\r
/// Request Sense Standard Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
  UINT8 error_code : 7;\r
  UINT8 valid : 1;\r
  UINT8 reserved_1;\r
  UINT8 sense_key : 4;\r
  UINT8 reserved_2 : 1;\r
  UINT8 Vendor_specifc_1 : 3;\r
  UINT8 vendor_specific_3;\r
  UINT8 vendor_specific_4;\r
  UINT8 vendor_specific_5;\r
  UINT8 vendor_specific_6;\r
  UINT8 addnl_sense_length;           ///< n - 7\r
  UINT8 vendor_specific_8;\r
  UINT8 vendor_specific_9;\r
  UINT8 vendor_specific_10;\r
  UINT8 vendor_specific_11;\r
  UINT8 addnl_sense_code;             ///< mandatory\r
  UINT8 addnl_sense_code_qualifier;   ///< mandatory\r
  UINT8 field_replaceable_unit_code;  ///< optional\r
  UINT8 sense_key_specific_15 : 7;\r
  UINT8 SKSV : 1;\r
  UINT8 sense_key_specific_16;\r
  UINT8 sense_key_specific_17;\r
  ///\r
  /// Followed by additional sense bytes.\r
  /// the sizeof (ATAPI_REQUEST_SENSE_DATA) is 254, \r
  /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
  ///\r
  UINT8 additional_sense_bytes_18_253[253 - 18 + 1];\r
} ATAPI_REQUEST_SENSE_DATA;\r
\r
//\r
// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
//\r
\r
///\r
/// READ CAPACITY Data \r
///\r
typedef struct {\r
  UINT8 LastLba3;\r
  UINT8 LastLba2;\r
  UINT8 LastLba1;\r
  UINT8 LastLba0;\r
  UINT8 BlockSize3;\r
  UINT8 BlockSize2;\r
  UINT8 BlockSize1;\r
  UINT8 BlockSize0;\r
} ATAPI_READ_CAPACITY_DATA;\r
\r
///\r
/// Capacity List Header + Current/Maximum Capacity Descriptor,\r
///\r
typedef struct {\r
  UINT8 reserved_0;\r
  UINT8 reserved_1;\r
  UINT8 reserved_2;\r
  UINT8 Capacity_Length;\r
  UINT8 LastLba3;\r
  UINT8 LastLba2;\r
  UINT8 LastLba1;\r
  UINT8 LastLba0;\r
  UINT8 DesCode : 2;\r
  UINT8 reserved_9 : 6;\r
  UINT8 BlockSize2;\r
  UINT8 BlockSize1;\r
  UINT8 BlockSize0;\r
} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
\r
///\r
/// Test Unit Ready Command\r
///\r
typedef struct {\r
  UINT8 opcode;\r
  UINT8 reserved_1;\r
  UINT8 reserved_2;\r
  UINT8 reserved_3;\r
  UINT8 reserved_4;\r
  UINT8 reserved_5;\r
  UINT8 reserved_6;\r
  UINT8 reserved_7;\r
  UINT8 reserved_8;\r
  UINT8 reserved_9;\r
  UINT8 reserved_10;\r
  UINT8 reserved_11;\r
} ATAPI_TEST_UNIT_READY_CMD;\r
\r
///\r
/// INQUIRY Command\r
///\r
typedef struct {\r
  UINT8 opcode;\r
  UINT8 reserved_1 : 5;\r
  UINT8 lun : 3;\r
  UINT8 page_code;        ///< defined in SFF8090i, V6\r
  UINT8 reserved_3;\r
  UINT8 allocation_length;\r
  UINT8 reserved_5;\r
  UINT8 reserved_6;\r
  UINT8 reserved_7;\r
  UINT8 reserved_8;\r
  UINT8 reserved_9;\r
  UINT8 reserved_10;\r
  UINT8 reserved_11;\r
} ATAPI_INQUIRY_CMD;\r
\r
///\r
/// REQUEST SENSE Command\r
///\r
typedef struct {\r
  UINT8 opcode;\r
  UINT8 reserved_1 : 5;\r
  UINT8 lun : 3;\r
  UINT8 reserved_2;\r
  UINT8 reserved_3;\r
  UINT8 allocation_length;\r
  UINT8 reserved_5;\r
  UINT8 reserved_6;\r
  UINT8 reserved_7;\r
  UINT8 reserved_8;\r
  UINT8 reserved_9;\r
  UINT8 reserved_10;\r
  UINT8 reserved_11;\r
} ATAPI_REQUEST_SENSE_CMD;\r
\r
///\r
/// READ (10) Command\r
///\r
typedef struct {\r
  UINT8 opcode;\r
  UINT8 reserved_1 : 5;\r
  UINT8 lun : 3;\r
  UINT8 Lba0;\r
  UINT8 Lba1;\r
  UINT8 Lba2;\r
  UINT8 Lba3;\r
  UINT8 reserved_6;\r
  UINT8 TranLen0;\r
  UINT8 TranLen1;\r
  UINT8 reserved_9;\r
  UINT8 reserved_10;\r
  UINT8 reserved_11;\r
} ATAPI_READ10_CMD;\r
\r
///\r
/// READ Format Capacity Command\r
///\r
typedef struct {\r
  UINT8 opcode;\r
  UINT8 reserved_1 : 5;\r
  UINT8 lun : 3;\r
  UINT8 reserved_2;\r
  UINT8 reserved_3;\r
  UINT8 reserved_4;\r
  UINT8 reserved_5;\r
  UINT8 reserved_6;\r
  UINT8 allocation_length_hi;\r
  UINT8 allocation_length_lo;\r
  UINT8 reserved_9;\r
  UINT8 reserved_10;\r
  UINT8 reserved_11;\r
} ATAPI_READ_FORMAT_CAP_CMD;\r
\r
///\r
/// MODE SENSE Command\r
///\r
typedef struct {\r
  UINT8 opcode;\r
  UINT8 reserved_1 : 5;\r
  UINT8 lun : 3;\r
  UINT8 page_code : 6;\r
  UINT8 page_control : 2;\r
  UINT8 reserved_3;\r
  UINT8 reserved_4;\r
  UINT8 reserved_5;\r
  UINT8 reserved_6;\r
  UINT8 parameter_list_length_hi;\r
  UINT8 parameter_list_length_lo;\r
  UINT8 reserved_9;\r
  UINT8 reserved_10;\r
  UINT8 reserved_11;\r
} ATAPI_MODE_SENSE_CMD;\r
\r
///\r
/// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r
/// We add it here for the convenience for ATA/ATAPI module writer. \r
///\r
typedef union {\r
  UINT16                    Data16[6];\r
  ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r
  ATAPI_READ10_CMD          Read10;\r
  ATAPI_REQUEST_SENSE_CMD   RequestSence;\r
  ATAPI_INQUIRY_CMD         Inquiry;\r
  ATAPI_MODE_SENSE_CMD      ModeSense;\r
  ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
} ATAPI_PACKET_COMMAND;\r
\r
\r
#define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r
#define ATAPI_MAX_DMA_CMD_SECTORS     0x100\r
\r
//\r
// ATA Packet Command Code\r
//\r
#define ATA_CMD_SOFT_RESET                  0x08   ///< defined in ATA-6\r
#define ATA_CMD_PACKET                      0xA0   ///< defined in ATA-6\r
#define ATA_CMD_IDENTIFY_DEVICE             0xA1   ///< defined in ATA-6\r
#define ATA_CMD_SERVICE                     0xA2   ///< defined in ATA-6\r
#define ATA_CMD_TEST_UNIT_READY             0x00   ///< defined in ATA-6\r
#define ATA_CMD_REQUEST_SENSE               0x03   ///< defined in ATA-6\r
#define ATA_CMD_INQUIRY                     0x12   ///< defined in ATAPI Removable Rewritable Media Devcies\r
#define ATA_CMD_READ_FORMAT_CAPACITY        0x23   ///< defined in ATAPI Removable Rewritable Media Devcies\r
#define ATA_CMD_READ_CAPACITY               0x25   ///< defined in ATAPI Removable Rewritable Media Devcies\r
#define ATA_CMD_READ_10                     0x28   ///< defined in ATAPI Removable Rewritable Media Devcies\r
#define ATA_CMD_WRITE_10                    0x2A   ///< defined in ATAPI Removable Rewritable Media Devcies\r
\r
//\r
// ATA Commands Code\r
//\r
\r
//\r
// Class 1: PIO Data-In Commands\r
//\r
#define ATA_CMD_IDENTIFY_DRIVE          0xec\r
#define ATA_CMD_READ_BUFFER             0xe4\r
#define ATA_CMD_READ_SECTORS            0x20   ///< defined in ATA-5     \r
#define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21   ///< defined in ATA-5\r
#define ATA_CMD_READ_LONG               0x22   ///< defined in ATA-5\r
#define ATA_CMD_READ_LONG_WITH_RETRY    0x23   ///< defined in ATA-5\r
#define ATA_CMD_READ_SECTORS_EXT        0x24   ///< defined in ATA-6\r
\r
//\r
// Class 2: PIO Data-Out Commands\r
//\r
#define ATA_CMD_FORMAT_TRACK              0x50  ///< defined in ATA-3\r
#define ATA_CMD_WRITE_BUFFER              0xe8  ///< defined in ATA-6  \r
#define ATA_CMD_WRITE_SECTORS             0x30  ///< defined in ATA-6\r
#define ATA_CMD_WRITE_SECTORS_WITH_RETRY  0x31  ///< defined in ATA-4\r
#define ATA_CMD_WRITE_LONG                0x32  ///< defined in ATA-3\r
#define ATA_CMD_WRITE_LONG_WITH_RETRY     0x33  ///< defined in ATA-3\r
#define ATA_CMD_WRITE_VERIFY              0x3c  ///< defined in ATA-3\r
#define ATA_CMD_WRITE_SECTORS_EXT         0x34  ///< defined in ATA-6\r
\r
//\r
// Class 3 No Data Command\r
//\r
#define ATA_CMD_ACK_MEDIA_CHANGE        0xdb  ///< defined in ATA-2\r
#define ATA_CMD_BOOT_POST_BOOT          0xdc  ///< defined in ATA-2\r
#define ATA_CMD_BOOT_PRE_BOOT           0xdd  ///< defined in ATA-2\r
#define ATA_CMD_CHECK_POWER_MODE        0x98  ///< defined in ATA-3\r
#define ATA_CMD_CHECK_POWER_MODE_ALIAS  0xe5  ///< defined in ATA-6\r
#define ATA_CMD_DOOR_LOCK               0xde  ///< defined in ATA-6\r
#define ATA_CMD_DOOR_UNLOCK             0xdf  ///< defined in ATA-6\r
#define ATA_CMD_EXEC_DRIVE_DIAG         0x90  ///< defined in ATA-6\r
#define ATA_CMD_IDLE_ALIAS              0x97  ///< defined in ATA-3\r
#define ATA_CMD_IDLE                    0xe3  ///< defined in ATA-6\r
#define ATA_CMD_IDLE_IMMEDIATE          0x95  ///< defined in ATA-3\r
#define ATA_CMD_IDLE_IMMEDIATE_ALIAS    0xe1  ///< defined in ATA-6\r
#define ATA_CMD_INIT_DRIVE_PARAM        0x91  ///< defined in ATA-5\r
#define ATA_CMD_RECALIBRATE             0x10  ///< defined in ATA-3\r
#define ATA_CMD_READ_DRIVE_STATE        0xe9  ///< defined in ATA-2\r
#define ATA_CMD_SET_MULTIPLE_MODE       0xC6  ///< defined in ATA-6\r
#define ATA_CMD_READ_VERIFY             0x40  ///< defined in ATA-6\r
#define ATA_CMD_READ_VERIFY_WITH_RETRY  0x41  ///< defined in ATA-4\r
#define ATA_CMD_SEEK                    0x70  ///< defined in ATA-6\r
#define ATA_CMD_SET_FEATURES            0xef  ///< defined in ATA-6\r
#define ATA_CMD_STANDBY                 0x96  ///< defined in ATA-3\r
#define ATA_CMD_STANDBY_ALIAS           0xe2  ///< defined in ATA-6\r
#define ATA_CMD_STANDBY_IMMEDIATE       0x94  ///< defined in ATA-3\r
#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0  ///< defined in ATA-6\r
///\r
/// S.M.A.R.T\r
///\r
#define ATA_CMD_SMART               0xb0\r
#define ATA_CONSTANT_C2             0xc2\r
#define ATA_CONSTANT_4F             0x4f\r
#define ATA_SMART_ENABLE_OPERATION  0xd8\r
#define ATA_SMART_RETURN_STATUS     0xda\r
\r
///\r
/// Class 4: DMA Command\r
///\r
#define ATA_CMD_READ_DMA              0xc8   ///< defined in ATA-6\r
#define ATA_CMD_READ_DMA_WITH_RETRY   0xc9   ///< defined in ATA-4\r
#define ATA_CMD_READ_DMA_EXT          0x25   ///< defined in ATA-6\r
#define ATA_CMD_WRITE_DMA             0xca   ///< defined in ATA-6\r
#define ATA_CMD_WRITE_DMA_WITH_RETRY  0xcb   ///< defined in ATA-4\r
#define ATA_CMD_WRITE_DMA_EXT         0x35   ///< defined in ATA-6\r
        \r
///\r
/// default content of device control register, disable INT,\r
/// Bit3 is set to 1 according ATA-1\r
///\r
#define ATA_DEFAULT_CTL           (0x0a)  \r
///\r
/// default context of Device/Head Register,\r
/// Bit7 and Bit5 are set to 1 for back-compatibilities\r
///\r
#define ATA_DEFAULT_CMD           (0xa0)\r
\r
#define ATAPI_MAX_BYTE_COUNT  (0xfffe)\r
\r
#define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i\r
\r
//\r
// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
// defined in MultiMedia Commands (MMC, MMC-2) \r
//\r
// Sense Key \r
//\r
#define ATA_SK_NO_SENSE         (0x0)\r
#define ATA_SK_RECOVERY_ERROR   (0x1)\r
#define ATA_SK_NOT_READY        (0x2)\r
#define ATA_SK_MEDIUM_ERROR     (0x3)\r
#define ATA_SK_HARDWARE_ERROR   (0x4)\r
#define ATA_SK_ILLEGAL_REQUEST  (0x5)\r
#define ATA_SK_UNIT_ATTENTION   (0x6)\r
#define ATA_SK_DATA_PROTECT     (0x7)\r
#define ATA_SK_BLANK_CHECK      (0x8)\r
#define ATA_SK_VENDOR_SPECIFIC  (0x9)\r
#define ATA_SK_RESERVED_A       (0xA)\r
#define ATA_SK_ABORT            (0xB)\r
#define ATA_SK_RESERVED_C       (0xC)\r
#define ATA_SK_OVERFLOW         (0xD)\r
#define ATA_SK_MISCOMPARE       (0xE)\r
#define ATA_SK_RESERVED_F       (0xF)\r
\r
//\r
// Additional Sense Codes\r
//\r
#define ATA_ASC_NOT_READY                   (0x04)\r
#define ATA_ASC_MEDIA_ERR1                  (0x10)\r
#define ATA_ASC_MEDIA_ERR2                  (0x11)\r
#define ATA_ASC_MEDIA_ERR3                  (0x14)\r
#define ATA_ASC_MEDIA_ERR4                  (0x30)\r
#define ATA_ASC_MEDIA_UPSIDE_DOWN           (0x06)\r
#define ATA_ASC_INVALID_CMD                 (0x20)\r
#define ATA_ASC_LBA_OUT_OF_RANGE            (0x21)\r
#define ATA_ASC_INVALID_FIELD               (0x24)\r
#define ATA_ASC_WRITE_PROTECTED             (0x27)\r
#define ATA_ASC_MEDIA_CHANGE                (0x28)\r
#define ATA_ASC_RESET                       (0x29)  ///< Power On Reset or Bus Reset occurred\r
#define ATA_ASC_ILLEGAL_FIELD               (0x26)\r
#define ATA_ASC_NO_MEDIA                    (0x3A)\r
#define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
\r
//\r
// Additional Sense Code Qualifier\r
//\r
#define ATA_ASCQ_IN_PROGRESS  (0x01)\r
\r
//\r
// Error Register\r
//\r
#define ATA_ERRREG_BBK   BIT7  ///< Bad block detected      defined in ATA-1\r
#define ATA_ERRREG_UNC   BIT6  ///< Uncorrectable Data      defined in ATA-3\r
#define ATA_ERRREG_MC    BIT5  ///< Media Change            defined in ATA-3\r
#define ATA_ERRREG_IDNF  BIT4  ///< ID Not Found            defined in ATA-3\r
#define ATA_ERRREG_MCR   BIT3  ///< Media Change Requested  defined in ATA-3\r
#define ATA_ERRREG_ABRT  BIT2  ///< Aborted Command         defined in ATA-6\r
#define ATA_ERRREG_TK0NF BIT1  ///< Track 0 Not Found       defined in ATA-3\r
#define ATA_ERRREG_AMNF  BIT0  ///< Address Mark Not Found  defined in ATA-3\r
\r
//\r
// Status Register\r
//\r
#define ATA_STSREG_BSY   BIT7  ///< Controller Busy         defined in ATA-6\r
#define ATA_STSREG_DRDY  BIT6  ///< Drive Ready             defined in ATA-6\r
#define ATA_STSREG_DWF   BIT5  ///< Drive Write Fault       defined in ATA-6\r
#define ATA_STSREG_DSC   BIT4  ///< Disk Seek Complete      defined in ATA-3\r
#define ATA_STSREG_DRQ   BIT3  ///< Data Request            defined in ATA-6\r
#define ATA_STSREG_CORR  BIT2  ///< Corrected Data          defined in ATA-3\r
#define ATA_STSREG_IDX   BIT1  ///< Index                   defined in ATA-3\r
#define ATA_STSREG_ERR   BIT0  ///< Error                   defined in ATA-6\r
\r
//\r
// Device Control Register\r
//\r
#define ATA_CTLREG_SRST  BIT2  ///< Software Reset\r
#define ATA_CTLREG_IEN_L BIT1  ///< Interrupt Enable #\r
\r
#endif\r
\r
Commit	Line	Data
8bdadcc8	1	/** @file\r
37640ed3	2	This file contains just some basic definitions that are needed by drivers\r
37640ed3	3	that dealing with ATA/ATAPI interface.\r
8bdadcc8	4	\r
37640ed3	5	Copyright (c) 2007 - 2008, Intel Corporation\r
8bdadcc8	6	All rights reserved. This program and the accompanying materials\r
	7	are licensed and made available under the terms and conditions of the BSD License\r
	8	which accompanies this distribution. The full text of the license may be found at\r
	9	http://opensource.org/licenses/bsd-license.php\r
	10	\r
	11	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	12	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	13	\r
	14	**/\r
	15	\r
42eedea9	16	#ifndef _ATAPI_H_\r
42eedea9	17	#define _ATAPI_H_\r
8bdadcc8	18	\r
1bc5d021	19	///\r
	20	/// ATAPI_IDENTIFY_DATA is defined in ATA-6\r
	21	///\r
8bdadcc8	22	typedef struct {\r
37640ed3	23	UINT16 config; ///< General Configuration\r
8bdadcc8	24	UINT16 obsolete_1;\r
	25	UINT16 specific_config;\r
	26	UINT16 obsolete_3;\r
	27	UINT16 retired_4_5[2];\r
	28	UINT16 obsolete_6;\r
	29	UINT16 cfa_reserved_7_8[2];\r
	30	UINT16 retired_9;\r
37640ed3	31	CHAR8 SerialNo[20]; ///< ASCII\r
8bdadcc8	32	UINT16 retired_20_21[2];\r
8bdadcc8	33	UINT16 obsolete_22;\r
37640ed3	34	CHAR8 FirmwareVer[8]; ///< ASCII\r
37640ed3	35	CHAR8 ModelName[40]; ///< ASCII\r
8bdadcc8	36	UINT16 multi_sector_cmd_max_sct_cnt;\r
	37	UINT16 reserved_48;\r
	38	UINT16 capabilities_49;\r
	39	UINT16 capabilities_50;\r
	40	UINT16 obsolete_51_52[2];\r
	41	UINT16 field_validity;\r
	42	UINT16 obsolete_54_58[5];\r
	43	UINT16 mutil_sector_setting;\r
	44	UINT16 user_addressable_sectors_lo;\r
	45	UINT16 user_addressable_sectors_hi;\r
	46	UINT16 obsolete_62;\r
	47	UINT16 multi_word_dma_mode;\r
	48	UINT16 advanced_pio_modes;\r
	49	UINT16 min_multi_word_dma_cycle_time;\r
	50	UINT16 rec_multi_word_dma_cycle_time;\r
	51	UINT16 min_pio_cycle_time_without_flow_control;\r
	52	UINT16 min_pio_cycle_time_with_flow_control;\r
	53	UINT16 reserved_69_74[6];\r
	54	UINT16 queue_depth;\r
	55	UINT16 reserved_76_79[4];\r
	56	UINT16 major_version_no;\r
	57	UINT16 minor_version_no;\r
	58	UINT16 cmd_set_support_82;\r
	59	UINT16 cmd_set_support_83;\r
	60	UINT16 cmd_feature_support;\r
	61	UINT16 cmd_feature_enable_85;\r
	62	UINT16 cmd_feature_enable_86;\r
	63	UINT16 cmd_feature_default;\r
	64	UINT16 ultra_dma_select;\r
	65	UINT16 time_required_for_sec_erase;\r
	66	UINT16 time_required_for_enhanced_sec_erase;\r
	67	UINT16 current_advanced_power_mgmt_value;\r
	68	UINT16 master_pwd_revison_code;\r
	69	UINT16 hardware_reset_result;\r
	70	UINT16 current_auto_acoustic_mgmt_value;\r
	71	UINT16 reserved_95_99[5];\r
	72	UINT16 max_user_lba_for_48bit_addr[4];\r
	73	UINT16 reserved_104_126[23];\r
	74	UINT16 removable_media_status_notification_support;\r
	75	UINT16 security_status;\r
	76	UINT16 vendor_data_129_159[31];\r
	77	UINT16 cfa_power_mode;\r
	78	UINT16 cfa_reserved_161_175[15];\r
	79	UINT16 current_media_serial_no[30];\r
	80	UINT16 reserved_206_254[49];\r
	81	UINT16 integrity_word;\r
	82	} ATAPI_IDENTIFY_DATA;\r
	83	\r
37640ed3	84	///\r
53bbea41	85	/// Standard Quiry Data format, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
37640ed3	86	///\r
8bdadcc8	87	typedef struct {\r
	88	UINT8 peripheral_type;\r
	89	UINT8 RMB;\r
	90	UINT8 version;\r
	91	UINT8 response_data_format;\r
53bbea41	92	UINT8 addnl_length; ///< n - 4, Numbers of bytes following this one\r
8bdadcc8	93	UINT8 reserved_5;\r
	94	UINT8 reserved_6;\r
	95	UINT8 reserved_7;\r
	96	UINT8 vendor_info[8];\r
	97	UINT8 product_id[16];\r
	98	UINT8 product_revision_level[4];\r
37640ed3	99	UINT8 vendor_specific_36_55[55 - 36 + 1];\r
	100	UINT8 reserved_56_95[95 - 56 + 1];\r
	101	///\r
53bbea41	102	/// Vendor specific parameters fields, the sizeof (ATAPI_INQUIRY_DATA) is 254\r
37640ed3	103	/// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
37640ed3	104	///\r
53bbea41	105	UINT8 vendor_specific_96_253[253 - 96 + 1];\r
37640ed3	106	} ATAPI_INQUIRY_DATA;\r
37640ed3	107	\r
db835e01	108	///\r
	109	/// Request Sense Standard Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
	110	///\r
8bdadcc8	111	typedef struct {\r
	112	UINT8 error_code : 7;\r
	113	UINT8 valid : 1;\r
	114	UINT8 reserved_1;\r
	115	UINT8 sense_key : 4;\r
37640ed3	116	UINT8 reserved_2 : 1;\r
37640ed3	117	UINT8 Vendor_specifc_1 : 3;\r
8bdadcc8	118	UINT8 vendor_specific_3;\r
	119	UINT8 vendor_specific_4;\r
	120	UINT8 vendor_specific_5;\r
	121	UINT8 vendor_specific_6;\r
37640ed3	122	UINT8 addnl_sense_length; ///< n - 7\r
8bdadcc8	123	UINT8 vendor_specific_8;\r
	124	UINT8 vendor_specific_9;\r
	125	UINT8 vendor_specific_10;\r
	126	UINT8 vendor_specific_11;\r
37640ed3	127	UINT8 addnl_sense_code; ///< mandatory\r
	128	UINT8 addnl_sense_code_qualifier; ///< mandatory\r
	129	UINT8 field_replaceable_unit_code; ///< optional\r
	130	UINT8 sense_key_specific_15 : 7;\r
	131	UINT8 SKSV : 1;\r
	132	UINT8 sense_key_specific_16;\r
	133	UINT8 sense_key_specific_17;\r
	134	///\r
	135	/// Followed by additional sense bytes.\r
53bbea41	136	/// the sizeof (ATAPI_REQUEST_SENSE_DATA) is 254, \r
37640ed3	137	/// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
37640ed3	138	///\r
53bbea41	139	UINT8 additional_sense_bytes_18_253[253 - 18 + 1];\r
8bdadcc8	140	} ATAPI_REQUEST_SENSE_DATA;\r
8bdadcc8	141	\r
55c11cc8	142	//\r
	143	// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
	144	//\r
db835e01	145	\r
	146	///\r
	147	/// READ CAPACITY Data \r
37640ed3	148	///\r
8bdadcc8	149	typedef struct {\r
	150	UINT8 LastLba3;\r
	151	UINT8 LastLba2;\r
	152	UINT8 LastLba1;\r
	153	UINT8 LastLba0;\r
	154	UINT8 BlockSize3;\r
	155	UINT8 BlockSize2;\r
	156	UINT8 BlockSize1;\r
	157	UINT8 BlockSize0;\r
	158	} ATAPI_READ_CAPACITY_DATA;\r
	159	\r
37640ed3	160	///\r
db835e01	161	/// Capacity List Header + Current/Maximum Capacity Descriptor,\r
37640ed3	162	///\r
8bdadcc8	163	typedef struct {\r
	164	UINT8 reserved_0;\r
	165	UINT8 reserved_1;\r
	166	UINT8 reserved_2;\r
	167	UINT8 Capacity_Length;\r
	168	UINT8 LastLba3;\r
	169	UINT8 LastLba2;\r
	170	UINT8 LastLba1;\r
	171	UINT8 LastLba0;\r
	172	UINT8 DesCode : 2;\r
	173	UINT8 reserved_9 : 6;\r
	174	UINT8 BlockSize2;\r
	175	UINT8 BlockSize1;\r
	176	UINT8 BlockSize0;\r
	177	} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
	178	\r
37640ed3	179	///\r
	180	/// Test Unit Ready Command\r
	181	///\r
8bdadcc8	182	typedef struct {\r
	183	UINT8 opcode;\r
	184	UINT8 reserved_1;\r
	185	UINT8 reserved_2;\r
	186	UINT8 reserved_3;\r
	187	UINT8 reserved_4;\r
	188	UINT8 reserved_5;\r
	189	UINT8 reserved_6;\r
	190	UINT8 reserved_7;\r
	191	UINT8 reserved_8;\r
	192	UINT8 reserved_9;\r
	193	UINT8 reserved_10;\r
	194	UINT8 reserved_11;\r
	195	} ATAPI_TEST_UNIT_READY_CMD;\r
	196	\r
37640ed3	197	///\r
	198	/// INQUIRY Command\r
	199	///\r
8bdadcc8	200	typedef struct {\r
8bdadcc8	201	UINT8 opcode;\r
37640ed3	202	UINT8 reserved_1 : 5;\r
	203	UINT8 lun : 3;\r
	204	UINT8 page_code; ///< defined in SFF8090i, V6\r
8bdadcc8	205	UINT8 reserved_3;\r
	206	UINT8 allocation_length;\r
	207	UINT8 reserved_5;\r
	208	UINT8 reserved_6;\r
	209	UINT8 reserved_7;\r
	210	UINT8 reserved_8;\r
	211	UINT8 reserved_9;\r
	212	UINT8 reserved_10;\r
	213	UINT8 reserved_11;\r
	214	} ATAPI_INQUIRY_CMD;\r
	215	\r
37640ed3	216	///\r
	217	/// REQUEST SENSE Command\r
	218	///\r
8bdadcc8	219	typedef struct {\r
8bdadcc8	220	UINT8 opcode;\r
37640ed3	221	UINT8 reserved_1 : 5;\r
37640ed3	222	UINT8 lun : 3;\r
8bdadcc8	223	UINT8 reserved_2;\r
	224	UINT8 reserved_3;\r
	225	UINT8 allocation_length;\r
	226	UINT8 reserved_5;\r
	227	UINT8 reserved_6;\r
	228	UINT8 reserved_7;\r
	229	UINT8 reserved_8;\r
	230	UINT8 reserved_9;\r
	231	UINT8 reserved_10;\r
	232	UINT8 reserved_11;\r
	233	} ATAPI_REQUEST_SENSE_CMD;\r
	234	\r
37640ed3	235	///\r
	236	/// READ (10) Command\r
	237	///\r
8bdadcc8	238	typedef struct {\r
	239	UINT8 opcode;\r
	240	UINT8 reserved_1 : 5;\r
	241	UINT8 lun : 3;\r
	242	UINT8 Lba0;\r
	243	UINT8 Lba1;\r
	244	UINT8 Lba2;\r
	245	UINT8 Lba3;\r
	246	UINT8 reserved_6;\r
	247	UINT8 TranLen0;\r
	248	UINT8 TranLen1;\r
	249	UINT8 reserved_9;\r
	250	UINT8 reserved_10;\r
	251	UINT8 reserved_11;\r
	252	} ATAPI_READ10_CMD;\r
	253	\r
37640ed3	254	///\r
	255	/// READ Format Capacity Command\r
	256	///\r
8bdadcc8	257	typedef struct {\r
8bdadcc8	258	UINT8 opcode;\r
37640ed3	259	UINT8 reserved_1 : 5;\r
37640ed3	260	UINT8 lun : 3;\r
8bdadcc8	261	UINT8 reserved_2;\r
	262	UINT8 reserved_3;\r
	263	UINT8 reserved_4;\r
	264	UINT8 reserved_5;\r
	265	UINT8 reserved_6;\r
	266	UINT8 allocation_length_hi;\r
	267	UINT8 allocation_length_lo;\r
	268	UINT8 reserved_9;\r
	269	UINT8 reserved_10;\r
	270	UINT8 reserved_11;\r
	271	} ATAPI_READ_FORMAT_CAP_CMD;\r
	272	\r
37640ed3	273	///\r
	274	/// MODE SENSE Command\r
	275	///\r
8bdadcc8	276	typedef struct {\r
8bdadcc8	277	UINT8 opcode;\r
37640ed3	278	UINT8 reserved_1 : 5;\r
	279	UINT8 lun : 3;\r
	280	UINT8 page_code : 6;\r
	281	UINT8 page_control : 2;\r
8bdadcc8	282	UINT8 reserved_3;\r
	283	UINT8 reserved_4;\r
	284	UINT8 reserved_5;\r
	285	UINT8 reserved_6;\r
	286	UINT8 parameter_list_length_hi;\r
	287	UINT8 parameter_list_length_lo;\r
	288	UINT8 reserved_9;\r
	289	UINT8 reserved_10;\r
	290	UINT8 reserved_11;\r
	291	} ATAPI_MODE_SENSE_CMD;\r
	292	\r
1bc5d021	293	///\r
	294	/// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r
	295	/// We add it here for the convenience for ATA/ATAPI module writer. \r
	296	///\r
8bdadcc8	297	typedef union {\r
	298	UINT16 Data16[6];\r
	299	ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r
	300	ATAPI_READ10_CMD Read10;\r
	301	ATAPI_REQUEST_SENSE_CMD RequestSence;\r
	302	ATAPI_INQUIRY_CMD Inquiry;\r
	303	ATAPI_MODE_SENSE_CMD ModeSense;\r
	304	ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
	305	} ATAPI_PACKET_COMMAND;\r
	306	\r
8bdadcc8	307	\r
	308	#define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r
	309	#define ATAPI_MAX_DMA_CMD_SECTORS 0x100\r
	310	\r
	311	//\r
	312	// ATA Packet Command Code\r
	313	//\r
37640ed3	314	#define ATA_CMD_SOFT_RESET 0x08 ///< defined in ATA-6\r
	315	#define ATA_CMD_PACKET 0xA0 ///< defined in ATA-6\r
	316	#define ATA_CMD_IDENTIFY_DEVICE 0xA1 ///< defined in ATA-6\r
	317	#define ATA_CMD_SERVICE 0xA2 ///< defined in ATA-6\r
	318	#define ATA_CMD_TEST_UNIT_READY 0x00 ///< defined in ATA-6\r
	319	#define ATA_CMD_REQUEST_SENSE 0x03 ///< defined in ATA-6\r
	320	#define ATA_CMD_INQUIRY 0x12 ///< defined in ATAPI Removable Rewritable Media Devcies\r
	321	#define ATA_CMD_READ_FORMAT_CAPACITY 0x23 ///< defined in ATAPI Removable Rewritable Media Devcies\r
	322	#define ATA_CMD_READ_CAPACITY 0x25 ///< defined in ATAPI Removable Rewritable Media Devcies\r
	323	#define ATA_CMD_READ_10 0x28 ///< defined in ATAPI Removable Rewritable Media Devcies\r
	324	#define ATA_CMD_WRITE_10 0x2A ///< defined in ATAPI Removable Rewritable Media Devcies\r
8bdadcc8	325	\r
	326	//\r
	327	// ATA Commands Code\r
	328	//\r
	329	\r
	330	//\r
	331	// Class 1: PIO Data-In Commands\r
	332	//\r
	333	#define ATA_CMD_IDENTIFY_DRIVE 0xec\r
	334	#define ATA_CMD_READ_BUFFER 0xe4\r
37640ed3	335	#define ATA_CMD_READ_SECTORS 0x20 ///< defined in ATA-5 \r
	336	#define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21 ///< defined in ATA-5\r
	337	#define ATA_CMD_READ_LONG 0x22 ///< defined in ATA-5\r
	338	#define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined in ATA-5\r
	339	#define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined in ATA-6\r
8bdadcc8	340	\r
8bdadcc8	341	//\r
	342	// Class 2: PIO Data-Out Commands\r
	343	//\r
37640ed3	344	#define ATA_CMD_FORMAT_TRACK 0x50 ///< defined in ATA-3\r
	345	#define ATA_CMD_WRITE_BUFFER 0xe8 ///< defined in ATA-6 \r
	346	#define ATA_CMD_WRITE_SECTORS 0x30 ///< defined in ATA-6\r
	347	#define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31 ///< defined in ATA-4\r
	348	#define ATA_CMD_WRITE_LONG 0x32 ///< defined in ATA-3\r
	349	#define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33 ///< defined in ATA-3\r
	350	#define ATA_CMD_WRITE_VERIFY 0x3c ///< defined in ATA-3\r
	351	#define ATA_CMD_WRITE_SECTORS_EXT 0x34 ///< defined in ATA-6\r
8bdadcc8	352	\r
	353	//\r
	354	// Class 3 No Data Command\r
	355	//\r
37640ed3	356	#define ATA_CMD_ACK_MEDIA_CHANGE 0xdb ///< defined in ATA-2\r
	357	#define ATA_CMD_BOOT_POST_BOOT 0xdc ///< defined in ATA-2\r
	358	#define ATA_CMD_BOOT_PRE_BOOT 0xdd ///< defined in ATA-2\r
	359	#define ATA_CMD_CHECK_POWER_MODE 0x98 ///< defined in ATA-3\r
	360	#define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5 ///< defined in ATA-6\r
	361	#define ATA_CMD_DOOR_LOCK 0xde ///< defined in ATA-6\r
	362	#define ATA_CMD_DOOR_UNLOCK 0xdf ///< defined in ATA-6\r
	363	#define ATA_CMD_EXEC_DRIVE_DIAG 0x90 ///< defined in ATA-6\r
	364	#define ATA_CMD_IDLE_ALIAS 0x97 ///< defined in ATA-3\r
	365	#define ATA_CMD_IDLE 0xe3 ///< defined in ATA-6\r
	366	#define ATA_CMD_IDLE_IMMEDIATE 0x95 ///< defined in ATA-3\r
	367	#define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1 ///< defined in ATA-6\r
	368	#define ATA_CMD_INIT_DRIVE_PARAM 0x91 ///< defined in ATA-5\r
	369	#define ATA_CMD_RECALIBRATE 0x10 ///< defined in ATA-3\r
	370	#define ATA_CMD_READ_DRIVE_STATE 0xe9 ///< defined in ATA-2\r
	371	#define ATA_CMD_SET_MULTIPLE_MODE 0xC6 ///< defined in ATA-6\r
	372	#define ATA_CMD_READ_VERIFY 0x40 ///< defined in ATA-6\r
	373	#define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41 ///< defined in ATA-4\r
	374	#define ATA_CMD_SEEK 0x70 ///< defined in ATA-6\r
	375	#define ATA_CMD_SET_FEATURES 0xef ///< defined in ATA-6\r
	376	#define ATA_CMD_STANDBY 0x96 ///< defined in ATA-3\r
	377	#define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined in ATA-6\r
	378	#define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined in ATA-3\r
	379	#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined in ATA-6\r
	380	///\r
	381	/// S.M.A.R.T\r
	382	///\r
8bdadcc8	383	#define ATA_CMD_SMART 0xb0\r
	384	#define ATA_CONSTANT_C2 0xc2\r
	385	#define ATA_CONSTANT_4F 0x4f\r
	386	#define ATA_SMART_ENABLE_OPERATION 0xd8\r
	387	#define ATA_SMART_RETURN_STATUS 0xda\r
	388	\r
37640ed3	389	///\r
	390	/// Class 4: DMA Command\r
	391	///\r
	392	#define ATA_CMD_READ_DMA 0xc8 ///< defined in ATA-6\r
	393	#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined in ATA-4\r
	394	#define ATA_CMD_READ_DMA_EXT 0x25 ///< defined in ATA-6\r
	395	#define ATA_CMD_WRITE_DMA 0xca ///< defined in ATA-6\r
	396	#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined in ATA-4\r
	397	#define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined in ATA-6\r
55c11cc8	398	\r
37640ed3	399	///\r
	400	/// default content of device control register, disable INT,\r
	401	/// Bit3 is set to 1 according ATA-1\r
	402	///\r
	403	#define ATA_DEFAULT_CTL (0x0a) \r
	404	///\r
	405	/// default context of Device/Head Register,\r
	406	/// Bit7 and Bit5 are set to 1 for back-compatibilities\r
	407	///\r
8bdadcc8	408	#define ATA_DEFAULT_CMD (0xa0)\r
	409	\r
	410	#define ATAPI_MAX_BYTE_COUNT (0xfffe)\r
	411	\r
53bbea41	412	#define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i\r
53bbea41	413	\r
55c11cc8	414	//\r
	415	// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
	416	// defined in MultiMedia Commands (MMC, MMC-2) \r
	417	//\r
	418	// Sense Key \r
	419	//\r
8bdadcc8	420	#define ATA_SK_NO_SENSE (0x0)\r
	421	#define ATA_SK_RECOVERY_ERROR (0x1)\r
	422	#define ATA_SK_NOT_READY (0x2)\r
	423	#define ATA_SK_MEDIUM_ERROR (0x3)\r
	424	#define ATA_SK_HARDWARE_ERROR (0x4)\r
	425	#define ATA_SK_ILLEGAL_REQUEST (0x5)\r
	426	#define ATA_SK_UNIT_ATTENTION (0x6)\r
	427	#define ATA_SK_DATA_PROTECT (0x7)\r
	428	#define ATA_SK_BLANK_CHECK (0x8)\r
	429	#define ATA_SK_VENDOR_SPECIFIC (0x9)\r
	430	#define ATA_SK_RESERVED_A (0xA)\r
	431	#define ATA_SK_ABORT (0xB)\r
	432	#define ATA_SK_RESERVED_C (0xC)\r
	433	#define ATA_SK_OVERFLOW (0xD)\r
	434	#define ATA_SK_MISCOMPARE (0xE)\r
	435	#define ATA_SK_RESERVED_F (0xF)\r
	436	\r
55c11cc8	437	//\r
	438	// Additional Sense Codes\r
	439	//\r
8bdadcc8	440	#define ATA_ASC_NOT_READY (0x04)\r
	441	#define ATA_ASC_MEDIA_ERR1 (0x10)\r
	442	#define ATA_ASC_MEDIA_ERR2 (0x11)\r
	443	#define ATA_ASC_MEDIA_ERR3 (0x14)\r
	444	#define ATA_ASC_MEDIA_ERR4 (0x30)\r
	445	#define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)\r
	446	#define ATA_ASC_INVALID_CMD (0x20)\r
	447	#define ATA_ASC_LBA_OUT_OF_RANGE (0x21)\r
	448	#define ATA_ASC_INVALID_FIELD (0x24)\r
	449	#define ATA_ASC_WRITE_PROTECTED (0x27)\r
	450	#define ATA_ASC_MEDIA_CHANGE (0x28)\r
37640ed3	451	#define ATA_ASC_RESET (0x29) ///< Power On Reset or Bus Reset occurred\r
8bdadcc8	452	#define ATA_ASC_ILLEGAL_FIELD (0x26)\r
	453	#define ATA_ASC_NO_MEDIA (0x3A)\r
	454	#define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
	455	\r
	456	//\r
	457	// Additional Sense Code Qualifier\r
	458	//\r
	459	#define ATA_ASCQ_IN_PROGRESS (0x01)\r
	460	\r
55c11cc8	461	//\r
	462	// Error Register\r
	463	//\r
37640ed3	464	#define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined in ATA-1\r
	465	#define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined in ATA-3\r
	466	#define ATA_ERRREG_MC BIT5 ///< Media Change defined in ATA-3\r
	467	#define ATA_ERRREG_IDNF BIT4 ///< ID Not Found defined in ATA-3\r
	468	#define ATA_ERRREG_MCR BIT3 ///< Media Change Requested defined in ATA-3\r
	469	#define ATA_ERRREG_ABRT BIT2 ///< Aborted Command defined in ATA-6\r
	470	#define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined in ATA-3\r
	471	#define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined in ATA-3\r
8bdadcc8	472	\r
55c11cc8	473	//\r
	474	// Status Register\r
	475	//\r
37640ed3	476	#define ATA_STSREG_BSY BIT7 ///< Controller Busy defined in ATA-6\r
	477	#define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined in ATA-6\r
	478	#define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined in ATA-6\r
	479	#define ATA_STSREG_DSC BIT4 ///< Disk Seek Complete defined in ATA-3\r
	480	#define ATA_STSREG_DRQ BIT3 ///< Data Request defined in ATA-6\r
	481	#define ATA_STSREG_CORR BIT2 ///< Corrected Data defined in ATA-3\r
	482	#define ATA_STSREG_IDX BIT1 ///< Index defined in ATA-3\r
	483	#define ATA_STSREG_ERR BIT0 ///< Error defined in ATA-6\r
8bdadcc8	484	\r
55c11cc8	485	//\r
	486	// Device Control Register\r
	487	//\r
37640ed3	488	#define ATA_CTLREG_SRST BIT2 ///< Software Reset\r
37640ed3	489	#define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #\r
8bdadcc8	490	\r
	491	#endif\r
	492	\r