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MdePkg: Add ProcessorUpgradeSocketLGA4677 from SMBIOS 3.5.0
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
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a7ed1e2e 1/** @file\r
f06c92a6 2 Industry Standard Definitions of SMBIOS Table Specification v3.3.0.\r
a7ed1e2e 3\r
782d0187 4Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
713e4b00 5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
f06c92a6 6(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>\r
9344f092 7SPDX-License-Identifier: BSD-2-Clause-Patent\r
a7ed1e2e 8\r
a7ed1e2e 9**/\r
10\r
11#ifndef __SMBIOS_STANDARD_H__\r
12#define __SMBIOS_STANDARD_H__\r
98cb9ae8 13\r
f2d0889f 14///\r
15/// Reference SMBIOS 2.6, chapter 3.1.2.\r
16/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
17/// use by this specification.\r
18///\r
19#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
20\r
7ddba202
SZ		 21///\r
22/// Reference SMBIOS 2.7, chapter 6.1.2.\r
23/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
24/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
25/// This number is not used for any other purpose by the SMBIOS specification.\r
26///\r
27#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
28\r
f2d0889f 29///\r
af2dc6a7 30/// Reference SMBIOS 2.6, chapter 3.1.3.\r
31/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
7ddba202
SZ		 32/// Reference SMBIOS 2.7, chapter 6.1.3.\r
33/// It will have no limit on the length of each individual text string.\r
f2d0889f 34///\r
35#define SMBIOS_STRING_MAX_LENGTH 64\r
36\r
7254d134
JY		 37//\r
38// The length of the entire structure table (including all strings) must be reported\r
39// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
40// which is a WORD field limited to 65,535 bytes.\r
41//\r
42#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
43\r
44//\r
45// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
46//\r
47#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
48\r
bb7051eb 49//\r
f06c92a6 50// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.\r
bb7051eb
MH		 51//\r
52#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
53#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
54#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
55#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
56#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
57#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
58#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
59#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
60#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
61#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
62#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
63#define SMBIOS_TYPE_OEM_STRINGS 11\r
64#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
65#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
66#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
67#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
68#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
69#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
70#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
71#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
72#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
73#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
74#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
75#define SMBIOS_TYPE_SYSTEM_RESET 23\r
76#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
77#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
78#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
79#define SMBIOS_TYPE_COOLING_DEVICE 27\r
80#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
81#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
82#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
83#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
84#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
85#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
86#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
87#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
88#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
89#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
90#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
91#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
92#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
93#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
94#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
713e4b00 95#define SMBIOS_TYPE_TPM_DEVICE 43\r
f06c92a6 96#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44\r
bb7051eb 97\r
f2d0889f 98///\r
99/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
9095d37b 100/// Upper-level software that interprets the SMBIOS structure-table should bypass an\r
f2d0889f 101/// Inactive structure just like a structure type that the software does not recognize.\r
102///\r
9095d37b 103#define SMBIOS_TYPE_INACTIVE 0x007E\r
f2d0889f 104\r
105///\r
106/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
107/// The end-of-table indicator is used in the last physical structure in a table\r
108///\r
109#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
110\r
bb7051eb
MH		 111#define SMBIOS_OEM_BEGIN 128\r
112#define SMBIOS_OEM_END 255\r
113\r
114///\r
115/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
9095d37b 116/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r
bb7051eb
MH		 117///\r
118typedef UINT8 SMBIOS_TYPE;\r
119\r
120///\r
121/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
122/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
123/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
124/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
125/// use by this specification.\r
126/// If the system configuration changes, a previously assigned handle might no longer exist.\r
127/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
128/// number to another structure.\r
129///\r
130typedef UINT16 SMBIOS_HANDLE;\r
131\r
4135253b 132///\r
af2dc6a7 133/// Smbios Table Entry Point Structure.\r
4135253b 134///\r
766f4bc1 135#pragma pack(1)\r
a7ed1e2e 136typedef struct {\r
137 UINT8 AnchorString[4];\r
138 UINT8 EntryPointStructureChecksum;\r
139 UINT8 EntryPointLength;\r
140 UINT8 MajorVersion;\r
141 UINT8 MinorVersion;\r
142 UINT16 MaxStructureSize;\r
143 UINT8 EntryPointRevision;\r
144 UINT8 FormattedArea[5];\r
145 UINT8 IntermediateAnchorString[5];\r
146 UINT8 IntermediateChecksum;\r
147 UINT16 TableLength;\r
148 UINT32 TableAddress;\r
149 UINT16 NumberOfSmbiosStructures;\r
150 UINT8 SmbiosBcdRevision;\r
151} SMBIOS_TABLE_ENTRY_POINT;\r
152\r
6cd35c62
EL		 153typedef struct {\r
154 UINT8 AnchorString[5];\r
155 UINT8 EntryPointStructureChecksum;\r
156 UINT8 EntryPointLength;\r
157 UINT8 MajorVersion;\r
158 UINT8 MinorVersion;\r
159 UINT8 DocRev;\r
160 UINT8 EntryPointRevision;\r
161 UINT8 Reserved;\r
162 UINT32 TableMaximumSize;\r
163 UINT64 TableAddress;\r
164} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
165\r
ec8432e5 166///\r
af2dc6a7 167/// The Smbios structure header.\r
ec8432e5 168///\r
a7ed1e2e 169typedef struct {\r
bb7051eb
MH		 170 SMBIOS_TYPE Type;\r
171 UINT8 Length;\r
172 SMBIOS_HANDLE Handle;\r
a7ed1e2e 173} SMBIOS_STRUCTURE;\r
174\r
bf7ea009 175///\r
bb7051eb
MH		 176/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
177/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
178/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
179/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
180/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
181/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
182/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
183/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
184/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
bf7ea009 185///\r
61ce5861 186typedef UINT8 SMBIOS_TABLE_STRING;\r
187\r
98cb9ae8 188///\r
7ddba202
SZ		 189/// BIOS Characteristics\r
190/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
98cb9ae8 191///\r
192typedef struct {\r
af2dc6a7 193 UINT32 Reserved :2; ///< Bits 0-1.\r
7ddba202
SZ		 194 UINT32 Unknown :1;\r
195 UINT32 BiosCharacteristicsNotSupported :1;\r
196 UINT32 IsaIsSupported :1;\r
98cb9ae8 197 UINT32 McaIsSupported :1;\r
198 UINT32 EisaIsSupported :1;\r
199 UINT32 PciIsSupported :1;\r
200 UINT32 PcmciaIsSupported :1;\r
201 UINT32 PlugAndPlayIsSupported :1;\r
202 UINT32 ApmIsSupported :1;\r
203 UINT32 BiosIsUpgradable :1;\r
204 UINT32 BiosShadowingAllowed :1;\r
205 UINT32 VlVesaIsSupported :1;\r
206 UINT32 EscdSupportIsAvailable :1;\r
207 UINT32 BootFromCdIsSupported :1;\r
208 UINT32 SelectableBootIsSupported :1;\r
209 UINT32 RomBiosIsSocketed :1;\r
210 UINT32 BootFromPcmciaIsSupported :1;\r
211 UINT32 EDDSpecificationIsSupported :1;\r
212 UINT32 JapaneseNecFloppyIsSupported :1;\r
213 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
214 UINT32 Floppy525_360IsSupported :1;\r
215 UINT32 Floppy525_12IsSupported :1;\r
216 UINT32 Floppy35_720IsSupported :1;\r
217 UINT32 Floppy35_288IsSupported :1;\r
218 UINT32 PrintScreenIsSupported :1;\r
219 UINT32 Keyboard8042IsSupported :1;\r
220 UINT32 SerialIsSupported :1;\r
221 UINT32 PrinterIsSupported :1;\r
222 UINT32 CgaMonoIsSupported :1;\r
223 UINT32 NecPc98 :1;\r
9095d37b
LG		 224 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
225 ///< and bits 48-63 reserved for System Vendor.\r
98cb9ae8 226} MISC_BIOS_CHARACTERISTICS;\r
227\r
228///\r
7ddba202
SZ		 229/// BIOS Characteristics Extension Byte 1.\r
230/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
231/// within the BIOS Information structure.\r
98cb9ae8 232///\r
233typedef struct {\r
234 UINT8 AcpiIsSupported :1;\r
7ddba202
SZ		 235 UINT8 UsbLegacyIsSupported :1;\r
236 UINT8 AgpIsSupported :1;\r
119c1688 237 UINT8 I2OBootIsSupported :1;\r
98cb9ae8 238 UINT8 Ls120BootIsSupported :1;\r
239 UINT8 AtapiZipDriveBootIsSupported :1;\r
240 UINT8 Boot1394IsSupported :1;\r
241 UINT8 SmartBatteryIsSupported :1;\r
242} MBCE_BIOS_RESERVED;\r
243\r
244///\r
af2dc6a7 245/// BIOS Characteristics Extension Byte 2.\r
7ddba202 246/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
98cb9ae8 247/// within the BIOS Information structure.\r
248///\r
249typedef struct {\r
250 UINT8 BiosBootSpecIsSupported :1;\r
7ddba202
SZ		 251 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
252 UINT8 TargetContentDistributionEnabled :1;\r
253 UINT8 UefiSpecificationSupported :1;\r
254 UINT8 VirtualMachineSupported :1;\r
255 UINT8 ExtensionByte2Reserved :3;\r
98cb9ae8 256} MBCE_SYSTEM_RESERVED;\r
257\r
258///\r
af2dc6a7 259/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 260///\r
261typedef struct {\r
262 MBCE_BIOS_RESERVED BiosReserved;\r
263 MBCE_SYSTEM_RESERVED SystemReserved;\r
98cb9ae8 264} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
265\r
ff6a1f32
SZ		 266///\r
267/// Extended BIOS ROM size.\r
268///\r
269typedef struct {\r
270 UINT16 Size :14;\r
271 UINT16 Unit :2;\r
272} EXTENDED_BIOS_ROM_SIZE;\r
273\r
4135253b 274///\r
af2dc6a7 275/// BIOS Information (Type 0).\r
4135253b 276///\r
61ce5861 277typedef struct {\r
98cb9ae8 278 SMBIOS_STRUCTURE Hdr;\r
279 SMBIOS_TABLE_STRING Vendor;\r
280 SMBIOS_TABLE_STRING BiosVersion;\r
281 UINT16 BiosSegment;\r
282 SMBIOS_TABLE_STRING BiosReleaseDate;\r
283 UINT8 BiosSize;\r
284 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
285 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
286 UINT8 SystemBiosMajorRelease;\r
287 UINT8 SystemBiosMinorRelease;\r
288 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
289 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
ff6a1f32
SZ		 290 //\r
291 // Add for smbios 3.1.0\r
292 //\r
293 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
61ce5861 294} SMBIOS_TABLE_TYPE0;\r
295\r
98cb9ae8 296///\r
af2dc6a7 297/// System Wake-up Type.\r
98cb9ae8 298///\r
9095d37b 299typedef enum {\r
98cb9ae8 300 SystemWakeupTypeReserved = 0x00,\r
301 SystemWakeupTypeOther = 0x01,\r
302 SystemWakeupTypeUnknown = 0x02,\r
303 SystemWakeupTypeApmTimer = 0x03,\r
304 SystemWakeupTypeModemRing = 0x04,\r
305 SystemWakeupTypeLanRemote = 0x05,\r
306 SystemWakeupTypePowerSwitch = 0x06,\r
307 SystemWakeupTypePciPme = 0x07,\r
308 SystemWakeupTypeAcPowerRestored = 0x08\r
309} MISC_SYSTEM_WAKEUP_TYPE;\r
310\r
4135253b 311///\r
af2dc6a7 312/// System Information (Type 1).\r
9095d37b
LG		 313///\r
314/// The information in this structure defines attributes of the overall system and is\r
98cb9ae8 315/// intended to be associated with the Component ID group of the system's MIF.\r
9095d37b 316/// An SMBIOS implementation is associated with a single system instance and contains\r
98cb9ae8 317/// one and only one System Information (Type 1) structure.\r
4135253b 318///\r
61ce5861 319typedef struct {\r
98cb9ae8 320 SMBIOS_STRUCTURE Hdr;\r
321 SMBIOS_TABLE_STRING Manufacturer;\r
322 SMBIOS_TABLE_STRING ProductName;\r
323 SMBIOS_TABLE_STRING Version;\r
324 SMBIOS_TABLE_STRING SerialNumber;\r
325 GUID Uuid;\r
af2dc6a7 326 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
98cb9ae8 327 SMBIOS_TABLE_STRING SKUNumber;\r
328 SMBIOS_TABLE_STRING Family;\r
61ce5861 329} SMBIOS_TABLE_TYPE1;\r
330\r
98cb9ae8 331///\r
9095d37b 332/// Base Board - Feature Flags.\r
98cb9ae8 333///\r
334typedef struct {\r
335 UINT8 Motherboard :1;\r
336 UINT8 RequiresDaughterCard :1;\r
337 UINT8 Removable :1;\r
338 UINT8 Replaceable :1;\r
339 UINT8 HotSwappable :1;\r
340 UINT8 Reserved :3;\r
341} BASE_BOARD_FEATURE_FLAGS;\r
342\r
343///\r
af2dc6a7 344/// Base Board - Board Type.\r
98cb9ae8 345///\r
9095d37b 346typedef enum {\r
98cb9ae8 347 BaseBoardTypeUnknown = 0x1,\r
348 BaseBoardTypeOther = 0x2,\r
349 BaseBoardTypeServerBlade = 0x3,\r
350 BaseBoardTypeConnectivitySwitch = 0x4,\r
351 BaseBoardTypeSystemManagementModule = 0x5,\r
352 BaseBoardTypeProcessorModule = 0x6,\r
353 BaseBoardTypeIOModule = 0x7,\r
354 BaseBoardTypeMemoryModule = 0x8,\r
355 BaseBoardTypeDaughterBoard = 0x9,\r
356 BaseBoardTypeMotherBoard = 0xA,\r
357 BaseBoardTypeProcessorMemoryModule = 0xB,\r
358 BaseBoardTypeProcessorIOModule = 0xC,\r
359 BaseBoardTypeInterconnectBoard = 0xD\r
360} BASE_BOARD_TYPE;\r
361\r
4135253b 362///\r
af2dc6a7 363/// Base Board (or Module) Information (Type 2).\r
4135253b 364///\r
9095d37b 365/// The information in this structure defines attributes of a system baseboard -\r
98cb9ae8 366/// for example a motherboard, planar, or server blade or other standard system module.\r
367///\r
61ce5861 368typedef struct {\r
98cb9ae8 369 SMBIOS_STRUCTURE Hdr;\r
370 SMBIOS_TABLE_STRING Manufacturer;\r
371 SMBIOS_TABLE_STRING ProductName;\r
372 SMBIOS_TABLE_STRING Version;\r
373 SMBIOS_TABLE_STRING SerialNumber;\r
374 SMBIOS_TABLE_STRING AssetTag;\r
375 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
376 SMBIOS_TABLE_STRING LocationInChassis;\r
377 UINT16 ChassisHandle;\r
af2dc6a7 378 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
98cb9ae8 379 UINT8 NumberOfContainedObjectHandles;\r
380 UINT16 ContainedObjectHandles[1];\r
61ce5861 381} SMBIOS_TABLE_TYPE2;\r
382\r
98cb9ae8 383///\r
384/// System Enclosure or Chassis Types\r
385///\r
9095d37b 386typedef enum {\r
98cb9ae8 387 MiscChassisTypeOther = 0x01,\r
388 MiscChassisTypeUnknown = 0x02,\r
389 MiscChassisTypeDeskTop = 0x03,\r
390 MiscChassisTypeLowProfileDesktop = 0x04,\r
391 MiscChassisTypePizzaBox = 0x05,\r
392 MiscChassisTypeMiniTower = 0x06,\r
393 MiscChassisTypeTower = 0x07,\r
394 MiscChassisTypePortable = 0x08,\r
395 MiscChassisTypeLapTop = 0x09,\r
396 MiscChassisTypeNotebook = 0x0A,\r
397 MiscChassisTypeHandHeld = 0x0B,\r
398 MiscChassisTypeDockingStation = 0x0C,\r
399 MiscChassisTypeAllInOne = 0x0D,\r
400 MiscChassisTypeSubNotebook = 0x0E,\r
401 MiscChassisTypeSpaceSaving = 0x0F,\r
402 MiscChassisTypeLunchBox = 0x10,\r
403 MiscChassisTypeMainServerChassis = 0x11,\r
404 MiscChassisTypeExpansionChassis = 0x12,\r
405 MiscChassisTypeSubChassis = 0x13,\r
406 MiscChassisTypeBusExpansionChassis = 0x14,\r
407 MiscChassisTypePeripheralChassis = 0x15,\r
408 MiscChassisTypeRaidChassis = 0x16,\r
409 MiscChassisTypeRackMountChassis = 0x17,\r
410 MiscChassisTypeSealedCasePc = 0x18,\r
411 MiscChassisMultiSystemChassis = 0x19,\r
412 MiscChassisCompactPCI = 0x1A,\r
413 MiscChassisAdvancedTCA = 0x1B,\r
414 MiscChassisBlade = 0x1C,\r
6cd35c62
EL		 415 MiscChassisBladeEnclosure = 0x1D,\r
416 MiscChassisTablet = 0x1E,\r
417 MiscChassisConvertible = 0x1F,\r
ff6a1f32
SZ		 418 MiscChassisDetachable = 0x20,\r
419 MiscChassisIoTGateway = 0x21,\r
420 MiscChassisEmbeddedPc = 0x22,\r
421 MiscChassisMiniPc = 0x23,\r
422 MiscChassisStickPc = 0x24\r
98cb9ae8 423} MISC_CHASSIS_TYPE;\r
424\r
425///\r
af2dc6a7 426/// System Enclosure or Chassis States .\r
98cb9ae8 427///\r
9095d37b 428typedef enum {\r
98cb9ae8 429 ChassisStateOther = 0x01,\r
430 ChassisStateUnknown = 0x02,\r
431 ChassisStateSafe = 0x03,\r
432 ChassisStateWarning = 0x04,\r
433 ChassisStateCritical = 0x05,\r
434 ChassisStateNonRecoverable = 0x06\r
435} MISC_CHASSIS_STATE;\r
436\r
437///\r
af2dc6a7 438/// System Enclosure or Chassis Security Status.\r
98cb9ae8 439///\r
9095d37b 440typedef enum {\r
98cb9ae8 441 ChassisSecurityStatusOther = 0x01,\r
442 ChassisSecurityStatusUnknown = 0x02,\r
443 ChassisSecurityStatusNone = 0x03,\r
444 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
445 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
446} MISC_CHASSIS_SECURITY_STATE;\r
447\r
bf7ea009 448///\r
449/// Contained Element record\r
450///\r
61ce5861 451typedef struct {\r
452 UINT8 ContainedElementType;\r
453 UINT8 ContainedElementMinimum;\r
454 UINT8 ContainedElementMaximum;\r
455} CONTAINED_ELEMENT;\r
456\r
98cb9ae8 457\r
4135253b 458///\r
af2dc6a7 459/// System Enclosure or Chassis (Type 3).\r
4135253b 460///\r
9095d37b
LG		 461/// The information in this structure defines attributes of the system's mechanical enclosure(s).\r
462/// For example, if a system included a separate enclosure for its peripheral devices,\r
98cb9ae8 463/// two structures would be returned: one for the main, system enclosure and the second for\r
464/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
9095d37b 465/// support the population of the CIM_Chassis class.\r
98cb9ae8 466///\r
61ce5861 467typedef struct {\r
98cb9ae8 468 SMBIOS_STRUCTURE Hdr;\r
469 SMBIOS_TABLE_STRING Manufacturer;\r
470 UINT8 Type;\r
471 SMBIOS_TABLE_STRING Version;\r
472 SMBIOS_TABLE_STRING SerialNumber;\r
473 SMBIOS_TABLE_STRING AssetTag;\r
af2dc6a7 474 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
475 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
476 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
477 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
98cb9ae8 478 UINT8 OemDefined[4];\r
479 UINT8 Height;\r
480 UINT8 NumberofPowerCords;\r
481 UINT8 ContainedElementCount;\r
482 UINT8 ContainedElementRecordLength;\r
f15908aa
CP		 483 //\r
484 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
485 //\r
98cb9ae8 486 CONTAINED_ELEMENT ContainedElements[1];\r
f15908aa
CP		 487 //\r
488 // Add for smbios 2.7\r
489 //\r
490 // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
491 // the structure. Need to reference it by starting at offset 0x15 and adding\r
492 // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
493 //\r
494 // SMBIOS_TABLE_STRING SKUNumber;\r
61ce5861 495} SMBIOS_TABLE_TYPE3;\r
496\r
98cb9ae8 497///\r
af2dc6a7 498/// Processor Information - Processor Type.\r
98cb9ae8 499///\r
500typedef enum {\r
501 ProcessorOther = 0x01,\r
502 ProcessorUnknown = 0x02,\r
503 CentralProcessor = 0x03,\r
504 MathProcessor = 0x04,\r
505 DspProcessor = 0x05,\r
506 VideoProcessor = 0x06\r
507} PROCESSOR_TYPE_DATA;\r
508\r
509///\r
af2dc6a7 510/// Processor Information - Processor Family.\r
98cb9ae8 511///\r
512typedef enum {\r
9095d37b 513 ProcessorFamilyOther = 0x01,\r
98cb9ae8 514 ProcessorFamilyUnknown = 0x02,\r
9095d37b 515 ProcessorFamily8086 = 0x03,\r
98cb9ae8 516 ProcessorFamily80286 = 0x04,\r
9095d37b 517 ProcessorFamilyIntel386 = 0x05,\r
98cb9ae8 518 ProcessorFamilyIntel486 = 0x06,\r
519 ProcessorFamily8087 = 0x07,\r
520 ProcessorFamily80287 = 0x08,\r
9095d37b 521 ProcessorFamily80387 = 0x09,\r
98cb9ae8 522 ProcessorFamily80487 = 0x0A,\r
9095d37b 523 ProcessorFamilyPentium = 0x0B,\r
98cb9ae8 524 ProcessorFamilyPentiumPro = 0x0C,\r
525 ProcessorFamilyPentiumII = 0x0D,\r
526 ProcessorFamilyPentiumMMX = 0x0E,\r
527 ProcessorFamilyCeleron = 0x0F,\r
528 ProcessorFamilyPentiumIIXeon = 0x10,\r
9095d37b 529 ProcessorFamilyPentiumIII = 0x11,\r
98cb9ae8 530 ProcessorFamilyM1 = 0x12,\r
531 ProcessorFamilyM2 = 0x13,\r
119c1688
SZ		 532 ProcessorFamilyIntelCeleronM = 0x14,\r
533 ProcessorFamilyIntelPentium4Ht = 0x15,\r
98cb9ae8 534 ProcessorFamilyAmdDuron = 0x18,\r
9095d37b 535 ProcessorFamilyK5 = 0x19,\r
98cb9ae8 536 ProcessorFamilyK6 = 0x1A,\r
537 ProcessorFamilyK6_2 = 0x1B,\r
538 ProcessorFamilyK6_3 = 0x1C,\r
539 ProcessorFamilyAmdAthlon = 0x1D,\r
540 ProcessorFamilyAmd29000 = 0x1E,\r
541 ProcessorFamilyK6_2Plus = 0x1F,\r
542 ProcessorFamilyPowerPC = 0x20,\r
543 ProcessorFamilyPowerPC601 = 0x21,\r
544 ProcessorFamilyPowerPC603 = 0x22,\r
545 ProcessorFamilyPowerPC603Plus = 0x23,\r
546 ProcessorFamilyPowerPC604 = 0x24,\r
547 ProcessorFamilyPowerPC620 = 0x25,\r
548 ProcessorFamilyPowerPCx704 = 0x26,\r
549 ProcessorFamilyPowerPC750 = 0x27,\r
3507ab19 550 ProcessorFamilyIntelCoreDuo = 0x28,\r
551 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
552 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
553 ProcessorFamilyIntelAtom = 0x2B,\r
6cd35c62 554 ProcessorFamilyIntelCoreM = 0x2C,\r
ff6a1f32
SZ		 555 ProcessorFamilyIntelCorem3 = 0x2D,\r
556 ProcessorFamilyIntelCorem5 = 0x2E,\r
557 ProcessorFamilyIntelCorem7 = 0x2F,\r
4a228334 558 ProcessorFamilyAlpha = 0x30,\r
98cb9ae8 559 ProcessorFamilyAlpha21064 = 0x31,\r
560 ProcessorFamilyAlpha21066 = 0x32,\r
561 ProcessorFamilyAlpha21164 = 0x33,\r
562 ProcessorFamilyAlpha21164PC = 0x34,\r
563 ProcessorFamilyAlpha21164a = 0x35,\r
564 ProcessorFamilyAlpha21264 = 0x36,\r
565 ProcessorFamilyAlpha21364 = 0x37,\r
7ddba202
SZ		 566 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
567 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
568 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
569 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
570 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
571 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
572 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
4a228334 573 ProcessorFamilyAmdFxSeries = 0x3F,\r
98cb9ae8 574 ProcessorFamilyMips = 0x40,\r
575 ProcessorFamilyMIPSR4000 = 0x41,\r
576 ProcessorFamilyMIPSR4200 = 0x42,\r
577 ProcessorFamilyMIPSR4400 = 0x43,\r
578 ProcessorFamilyMIPSR4600 = 0x44,\r
579 ProcessorFamilyMIPSR10000 = 0x45,\r
7ddba202
SZ		 580 ProcessorFamilyAmdCSeries = 0x46,\r
581 ProcessorFamilyAmdESeries = 0x47,\r
4a228334 582 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202 583 ProcessorFamilyAmdGSeries = 0x49,\r
4a228334
EL		 584 ProcessorFamilyAmdZSeries = 0x4A,\r
585 ProcessorFamilyAmdRSeries = 0x4B,\r
586 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
587 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
588 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
589 ProcessorFamilyAmdFireProSeries = 0x4F,\r
98cb9ae8 590 ProcessorFamilySparc = 0x50,\r
591 ProcessorFamilySuperSparc = 0x51,\r
592 ProcessorFamilymicroSparcII = 0x52,\r
593 ProcessorFamilymicroSparcIIep = 0x53,\r
594 ProcessorFamilyUltraSparc = 0x54,\r
595 ProcessorFamilyUltraSparcII = 0x55,\r
4a228334 596 ProcessorFamilyUltraSparcIii = 0x56,\r
98cb9ae8 597 ProcessorFamilyUltraSparcIII = 0x57,\r
598 ProcessorFamilyUltraSparcIIIi = 0x58,\r
599 ProcessorFamily68040 = 0x60,\r
600 ProcessorFamily68xxx = 0x61,\r
601 ProcessorFamily68000 = 0x62,\r
602 ProcessorFamily68010 = 0x63,\r
603 ProcessorFamily68020 = 0x64,\r
604 ProcessorFamily68030 = 0x65,\r
6cd35c62
EL		 605 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
606 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
607 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
ff6a1f32
SZ		 608 ProcessorFamilyAmdOpteronASeries = 0x69,\r
609 ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
043026ac 610 ProcessorFamilyAmdZen = 0x6B,\r
98cb9ae8 611 ProcessorFamilyHobbit = 0x70,\r
612 ProcessorFamilyCrusoeTM5000 = 0x78,\r
613 ProcessorFamilyCrusoeTM3000 = 0x79,\r
614 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
615 ProcessorFamilyWeitek = 0x80,\r
616 ProcessorFamilyItanium = 0x82,\r
617 ProcessorFamilyAmdAthlon64 = 0x83,\r
618 ProcessorFamilyAmdOpteron = 0x84,\r
619 ProcessorFamilyAmdSempron = 0x85,\r
620 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
621 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
622 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
623 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
3507ab19 624 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
625 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
626 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
627 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
628 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
9095d37b 629 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r
98cb9ae8 630 ProcessorFamilyPARISC = 0x90,\r
631 ProcessorFamilyPaRisc8500 = 0x91,\r
632 ProcessorFamilyPaRisc8000 = 0x92,\r
633 ProcessorFamilyPaRisc7300LC = 0x93,\r
634 ProcessorFamilyPaRisc7200 = 0x94,\r
635 ProcessorFamilyPaRisc7100LC = 0x95,\r
636 ProcessorFamilyPaRisc7100 = 0x96,\r
637 ProcessorFamilyV30 = 0xA0,\r
3507ab19 638 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
639 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
640 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
641 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
642 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
643 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
644 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
645 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
646 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
647 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
648 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
649 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
650 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
651 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
652 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
98cb9ae8 653 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
654 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
655 ProcessorFamilyPentium4 = 0xB2,\r
656 ProcessorFamilyIntelXeon = 0xB3,\r
657 ProcessorFamilyAS400 = 0xB4,\r
658 ProcessorFamilyIntelXeonMP = 0xB5,\r
659 ProcessorFamilyAMDAthlonXP = 0xB6,\r
660 ProcessorFamilyAMDAthlonMP = 0xB7,\r
661 ProcessorFamilyIntelItanium2 = 0xB8,\r
662 ProcessorFamilyIntelPentiumM = 0xB9,\r
663 ProcessorFamilyIntelCeleronD = 0xBA,\r
664 ProcessorFamilyIntelPentiumD = 0xBB,\r
665 ProcessorFamilyIntelPentiumEx = 0xBC,\r
4a228334 666 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
98cb9ae8 667 ProcessorFamilyReserved = 0xBE,\r
668 ProcessorFamilyIntelCore2 = 0xBF,\r
3507ab19 669 ProcessorFamilyIntelCore2Solo = 0xC0,\r
670 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
671 ProcessorFamilyIntelCore2Quad = 0xC2,\r
672 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
673 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
674 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
675 ProcessorFamilyIntelCoreI7 = 0xC6,\r
9095d37b 676 ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r
98cb9ae8 677 ProcessorFamilyIBM390 = 0xC8,\r
678 ProcessorFamilyG4 = 0xC9,\r
679 ProcessorFamilyG5 = 0xCA,\r
680 ProcessorFamilyG6 = 0xCB,\r
4a228334 681 ProcessorFamilyzArchitecture = 0xCC,\r
7ddba202
SZ		 682 ProcessorFamilyIntelCoreI5 = 0xCD,\r
683 ProcessorFamilyIntelCoreI3 = 0xCE,\r
cfcca3c2 684 ProcessorFamilyIntelCoreI9 = 0xCF,\r
98cb9ae8 685 ProcessorFamilyViaC7M = 0xD2,\r
686 ProcessorFamilyViaC7D = 0xD3,\r
687 ProcessorFamilyViaC7 = 0xD4,\r
688 ProcessorFamilyViaEden = 0xD5,\r
3507ab19 689 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
690 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
691 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
7ddba202 692 ProcessorFamilyViaNano = 0xD9,\r
3507ab19 693 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
694 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
695 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
696 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
697 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
7ddba202 698 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
4a228334
EL		 699 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
700 ProcessorFamilyAmdSempronII = 0xE5,\r
3507ab19 701 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
702 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
703 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
704 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
705 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
706 ProcessorFamilyAmdSempronSI = 0xEB,\r
7ddba202
SZ		 707 ProcessorFamilyAmdPhenomII = 0xEC,\r
708 ProcessorFamilyAmdAthlonII = 0xED,\r
709 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
710 ProcessorFamilyAmdSempronM = 0xEF,\r
98cb9ae8 711 ProcessorFamilyi860 = 0xFA,\r
712 ProcessorFamilyi960 = 0xFB,\r
713 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
714 ProcessorFamilyReserved1 = 0xFF\r
715} PROCESSOR_FAMILY_DATA;\r
716\r
f9ed6c93
YL		 717///\r
718/// Processor Information2 - Processor Family2.\r
719///\r
720typedef enum {\r
ff6a1f32
SZ		 721 ProcessorFamilyARMv7 = 0x0100,\r
722 ProcessorFamilyARMv8 = 0x0101,\r
f9ed6c93
YL		 723 ProcessorFamilySH3 = 0x0104,\r
724 ProcessorFamilySH4 = 0x0105,\r
725 ProcessorFamilyARM = 0x0118,\r
726 ProcessorFamilyStrongARM = 0x0119,\r
727 ProcessorFamily6x86 = 0x012C,\r
728 ProcessorFamilyMediaGX = 0x012D,\r
729 ProcessorFamilyMII = 0x012E,\r
730 ProcessorFamilyWinChip = 0x0140,\r
731 ProcessorFamilyDSP = 0x015E,\r
f06c92a6
AC		 732 ProcessorFamilyVideoProcessor = 0x01F4,\r
733 ProcessorFamilyRiscvRV32 = 0x0200,\r
734 ProcessorFamilyRiscVRV64 = 0x0201,\r
735 ProcessorFamilyRiscVRV128 = 0x0202\r
f9ed6c93
YL		 736} PROCESSOR_FAMILY2_DATA;\r
737\r
98cb9ae8 738///\r
9095d37b 739/// Processor Information - Voltage.\r
98cb9ae8 740///\r
741typedef struct {\r
9095d37b
LG		 742 UINT8 ProcessorVoltageCapability5V :1;\r
743 UINT8 ProcessorVoltageCapability3_3V :1;\r
744 UINT8 ProcessorVoltageCapability2_9V :1;\r
6800ac83 745 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
746 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
747 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 748} PROCESSOR_VOLTAGE;\r
749\r
750///\r
af2dc6a7 751/// Processor Information - Processor Upgrade.\r
98cb9ae8 752///\r
753typedef enum {\r
754 ProcessorUpgradeOther = 0x01,\r
755 ProcessorUpgradeUnknown = 0x02,\r
756 ProcessorUpgradeDaughterBoard = 0x03,\r
757 ProcessorUpgradeZIFSocket = 0x04,\r
af2dc6a7 758 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
98cb9ae8 759 ProcessorUpgradeNone = 0x06,\r
760 ProcessorUpgradeLIFSocket = 0x07,\r
761 ProcessorUpgradeSlot1 = 0x08,\r
762 ProcessorUpgradeSlot2 = 0x09,\r
763 ProcessorUpgrade370PinSocket = 0x0A,\r
764 ProcessorUpgradeSlotA = 0x0B,\r
765 ProcessorUpgradeSlotM = 0x0C,\r
766 ProcessorUpgradeSocket423 = 0x0D,\r
af2dc6a7 767 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
98cb9ae8 768 ProcessorUpgradeSocket478 = 0x0F,\r
769 ProcessorUpgradeSocket754 = 0x10,\r
770 ProcessorUpgradeSocket940 = 0x11,\r
771 ProcessorUpgradeSocket939 = 0x12,\r
772 ProcessorUpgradeSocketmPGA604 = 0x13,\r
773 ProcessorUpgradeSocketLGA771 = 0x14,\r
774 ProcessorUpgradeSocketLGA775 = 0x15,\r
775 ProcessorUpgradeSocketS1 = 0x16,\r
776 ProcessorUpgradeAM2 = 0x17,\r
3507ab19 777 ProcessorUpgradeF1207 = 0x18,\r
7ddba202
SZ		 778 ProcessorSocketLGA1366 = 0x19,\r
779 ProcessorUpgradeSocketG34 = 0x1A,\r
780 ProcessorUpgradeSocketAM3 = 0x1B,\r
781 ProcessorUpgradeSocketC32 = 0x1C,\r
782 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
783 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
784 ProcessorUpgradeSocketPGA988A = 0x1F,\r
785 ProcessorUpgradeSocketBGA1288 = 0x20,\r
786 ProcessorUpgradeSocketrPGA988B = 0x21,\r
787 ProcessorUpgradeSocketBGA1023 = 0x22,\r
788 ProcessorUpgradeSocketBGA1224 = 0x23,\r
4a228334 789 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202
SZ		 790 ProcessorUpgradeSocketLGA1356 = 0x25,\r
791 ProcessorUpgradeSocketLGA2011 = 0x26,\r
792 ProcessorUpgradeSocketFS1 = 0x27,\r
793 ProcessorUpgradeSocketFS2 = 0x28,\r
794 ProcessorUpgradeSocketFM1 = 0x29,\r
4a228334
EL		 795 ProcessorUpgradeSocketFM2 = 0x2A,\r
796 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
6cd35c62
EL		 797 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
798 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
799 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
800 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
ff6a1f32
SZ		 801 ProcessorUpgradeSocketBGA1364 = 0x30,\r
802 ProcessorUpgradeSocketAM4 = 0x31,\r
803 ProcessorUpgradeSocketLGA1151 = 0x32,\r
804 ProcessorUpgradeSocketBGA1356 = 0x33,\r
805 ProcessorUpgradeSocketBGA1440 = 0x34,\r
806 ProcessorUpgradeSocketBGA1515 = 0x35,\r
807 ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
043026ac 808 ProcessorUpgradeSocketSP3 = 0x37,\r
cfcca3c2
SZ		 809 ProcessorUpgradeSocketSP3r2 = 0x38,\r
810 ProcessorUpgradeSocketLGA2066 = 0x39,\r
811 ProcessorUpgradeSocketBGA1392 = 0x3A,\r
812 ProcessorUpgradeSocketBGA1510 = 0x3B,\r
782d0187
SZ		 813 ProcessorUpgradeSocketBGA1528 = 0x3C,\r
814 ProcessorUpgradeSocketLGA4189 = 0x3D,\r
815 ProcessorUpgradeSocketLGA1200 = 0x3E,\r
816 ProcessorUpgradeSocketLGA4677 = 0x3F\r
98cb9ae8 817} PROCESSOR_UPGRADE;\r
818\r
819///\r
820/// Processor ID Field Description\r
821///\r
822typedef struct {\r
823 UINT32 ProcessorSteppingId:4;\r
824 UINT32 ProcessorModel: 4;\r
825 UINT32 ProcessorFamily: 4;\r
826 UINT32 ProcessorType: 2;\r
827 UINT32 ProcessorReserved1: 2;\r
828 UINT32 ProcessorXModel: 4;\r
829 UINT32 ProcessorXFamily: 8;\r
830 UINT32 ProcessorReserved2: 4;\r
831} PROCESSOR_SIGNATURE;\r
832\r
98cb9ae8 833typedef struct {\r
834 UINT32 ProcessorFpu :1;\r
835 UINT32 ProcessorVme :1;\r
836 UINT32 ProcessorDe :1;\r
837 UINT32 ProcessorPse :1;\r
838 UINT32 ProcessorTsc :1;\r
839 UINT32 ProcessorMsr :1;\r
840 UINT32 ProcessorPae :1;\r
841 UINT32 ProcessorMce :1;\r
842 UINT32 ProcessorCx8 :1;\r
843 UINT32 ProcessorApic :1;\r
844 UINT32 ProcessorReserved1 :1;\r
845 UINT32 ProcessorSep :1;\r
846 UINT32 ProcessorMtrr :1;\r
847 UINT32 ProcessorPge :1;\r
848 UINT32 ProcessorMca :1;\r
849 UINT32 ProcessorCmov :1;\r
850 UINT32 ProcessorPat :1;\r
851 UINT32 ProcessorPse36 :1;\r
852 UINT32 ProcessorPsn :1;\r
853 UINT32 ProcessorClfsh :1;\r
854 UINT32 ProcessorReserved2 :1;\r
855 UINT32 ProcessorDs :1;\r
856 UINT32 ProcessorAcpi :1;\r
857 UINT32 ProcessorMmx :1;\r
858 UINT32 ProcessorFxsr :1;\r
859 UINT32 ProcessorSse :1;\r
860 UINT32 ProcessorSse2 :1;\r
861 UINT32 ProcessorSs :1;\r
862 UINT32 ProcessorReserved3 :1;\r
863 UINT32 ProcessorTm :1;\r
864 UINT32 ProcessorReserved4 :2;\r
865} PROCESSOR_FEATURE_FLAGS;\r
866\r
f06c92a6 867typedef struct {\r
e157c8f9
RC		 868 UINT16 ProcessorReserved1 :1;\r
869 UINT16 ProcessorUnknown :1;\r
870 UINT16 Processor64BitCapable :1;\r
871 UINT16 ProcessorMultiCore :1;\r
872 UINT16 ProcessorHardwareThread :1;\r
873 UINT16 ProcessorExecuteProtection :1;\r
874 UINT16 ProcessorEnhancedVirtualization :1;\r
875 UINT16 ProcessorPowerPerformanceCtrl :1;\r
876 UINT16 Processor128BitCapable :1;\r
877 UINT16 ProcessorArm64SocId :1;\r
878 UINT16 ProcessorReserved2 :6;\r
f06c92a6
AC		 879} PROCESSOR_CHARACTERISTIC_FLAGS;\r
880\r
4e1f316c
RC		 881///\r
882/// Processor Information - Status\r
883///\r
884typedef union {\r
885 struct {\r
886 UINT8 CpuStatus :3; ///< Indicates the status of the processor.\r
887 UINT8 Reserved1 :3; ///< Reserved for future use. Must be set to zero.\r
888 UINT8 SocketPopulated :1; ///< Indicates if the processor socket is populated or not.\r
889 UINT8 Reserved2 :1; ///< Reserved for future use. Must be set to zero.\r
890 } Bits;\r
891 UINT8 Data;\r
892} PROCESSOR_STATUS_DATA;\r
893\r
98cb9ae8 894typedef struct {\r
895 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 896 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 897} PROCESSOR_ID_DATA;\r
98cb9ae8 898\r
4135253b 899///\r
af2dc6a7 900/// Processor Information (Type 4).\r
4135253b 901///\r
9095d37b
LG		 902/// The information in this structure defines the attributes of a single processor;\r
903/// a separate structure instance is provided for each system processor socket/slot.\r
904/// For example, a system with an IntelDX2 processor would have a single\r
af2dc6a7 905/// structure instance, while a system with an IntelSX2 processor would have a structure\r
9095d37b 906/// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r
98cb9ae8 907///\r
9095d37b 908typedef struct {\r
61ce5861 909 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 910 SMBIOS_TABLE_STRING Socket;\r
af2dc6a7 911 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
912 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
bd9da7b1 913 SMBIOS_TABLE_STRING ProcessorManufacturer;\r
98cb9ae8 914 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 915 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 916 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 917 UINT16 ExternalClock;\r
918 UINT16 MaxSpeed;\r
919 UINT16 CurrentSpeed;\r
920 UINT8 Status;\r
af2dc6a7 921 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
61ce5861 922 UINT16 L1CacheHandle;\r
923 UINT16 L2CacheHandle;\r
924 UINT16 L3CacheHandle;\r
925 SMBIOS_TABLE_STRING SerialNumber;\r
926 SMBIOS_TABLE_STRING AssetTag;\r
927 SMBIOS_TABLE_STRING PartNumber;\r
928 //\r
929 // Add for smbios 2.5\r
930 //\r
931 UINT8 CoreCount;\r
932 UINT8 EnabledCoreCount;\r
933 UINT8 ThreadCount;\r
934 UINT16 ProcessorCharacteristics;\r
935 //\r
936 // Add for smbios 2.6\r
937 //\r
938 UINT16 ProcessorFamily2;\r
6cd35c62
EL		 939 //\r
940 // Add for smbios 3.0\r
941 //\r
942 UINT16 CoreCount2;\r
943 UINT16 EnabledCoreCount2;\r
944 UINT16 ThreadCount2;\r
61ce5861 945} SMBIOS_TABLE_TYPE4;\r
946\r
98cb9ae8 947///\r
af2dc6a7 948/// Memory Controller Error Detecting Method.\r
98cb9ae8 949///\r
9095d37b 950typedef enum {\r
98cb9ae8 951 ErrorDetectingMethodOther = 0x01,\r
952 ErrorDetectingMethodUnknown = 0x02,\r
953 ErrorDetectingMethodNone = 0x03,\r
954 ErrorDetectingMethodParity = 0x04,\r
955 ErrorDetectingMethod32Ecc = 0x05,\r
956 ErrorDetectingMethod64Ecc = 0x06,\r
957 ErrorDetectingMethod128Ecc = 0x07,\r
958 ErrorDetectingMethodCrc = 0x08\r
959} MEMORY_ERROR_DETECT_METHOD;\r
960\r
961///\r
af2dc6a7 962/// Memory Controller Error Correcting Capability.\r
98cb9ae8 963///\r
964typedef struct {\r
965 UINT8 Other :1;\r
966 UINT8 Unknown :1;\r
967 UINT8 None :1;\r
968 UINT8 SingleBitErrorCorrect :1;\r
969 UINT8 DoubleBitErrorCorrect :1;\r
970 UINT8 ErrorScrubbing :1;\r
971 UINT8 Reserved :2;\r
972} MEMORY_ERROR_CORRECT_CAPABILITY;\r
973\r
974///\r
af2dc6a7 975/// Memory Controller Information - Interleave Support.\r
98cb9ae8 976///\r
9095d37b 977typedef enum {\r
98cb9ae8 978 MemoryInterleaveOther = 0x01,\r
979 MemoryInterleaveUnknown = 0x02,\r
980 MemoryInterleaveOneWay = 0x03,\r
981 MemoryInterleaveTwoWay = 0x04,\r
982 MemoryInterleaveFourWay = 0x05,\r
983 MemoryInterleaveEightWay = 0x06,\r
984 MemoryInterleaveSixteenWay = 0x07\r
985} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
986\r
987///\r
af2dc6a7 988/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 989///\r
990typedef struct {\r
991 UINT16 Other :1;\r
992 UINT16 Unknown :1;\r
993 UINT16 SeventyNs:1;\r
994 UINT16 SixtyNs :1;\r
995 UINT16 FiftyNs :1;\r
996 UINT16 Reserved :11;\r
997} MEMORY_SPEED_TYPE;\r
998\r
4135253b 999///\r
af2dc6a7 1000/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 1001///\r
9095d37b
LG		 1002/// The information in this structure defines the attributes of the system's memory controller(s)\r
1003/// and the supported attributes of any memory-modules present in the sockets controlled by\r
1004/// this controller.\r
1005/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r
af2dc6a7 1006/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 1007/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
1008/// choose to implement both memory description types to allow existing DMI browsers\r
1009/// to properly display the system's memory attributes.\r
1010///\r
61ce5861 1011typedef struct {\r
98cb9ae8 1012 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1013 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
98cb9ae8 1014 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
af2dc6a7 1015 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
9095d37b 1016 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r
98cb9ae8 1017 UINT8 MaxMemoryModuleSize;\r
1018 MEMORY_SPEED_TYPE SupportSpeed;\r
1019 UINT16 SupportMemoryType;\r
1020 UINT8 MemoryModuleVoltage;\r
1021 UINT8 AssociatedMemorySlotNum;\r
1022 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 1023} SMBIOS_TABLE_TYPE5;\r
1024\r
98cb9ae8 1025///\r
1026/// Memory Module Information - Memory Types\r
1027///\r
1028typedef struct {\r
1029 UINT16 Other :1;\r
1030 UINT16 Unknown :1;\r
1031 UINT16 Standard :1;\r
1032 UINT16 FastPageMode:1;\r
b4ab47ec 1033 UINT16 Edo :1;\r
98cb9ae8 1034 UINT16 Parity :1;\r
b4ab47ec 1035 UINT16 Ecc :1;\r
1036 UINT16 Simm :1;\r
1037 UINT16 Dimm :1;\r
98cb9ae8 1038 UINT16 BurstEdo :1;\r
b4ab47ec 1039 UINT16 Sdram :1;\r
98cb9ae8 1040 UINT16 Reserved :5;\r
1041} MEMORY_CURRENT_TYPE;\r
1042\r
1043///\r
af2dc6a7 1044/// Memory Module Information - Memory Size.\r
98cb9ae8 1045///\r
1046typedef struct {\r
6800ac83 1047 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 1048 UINT8 SingleOrDoubleBank :1;\r
1049} MEMORY_INSTALLED_ENABLED_SIZE;\r
1050\r
4135253b 1051///\r
1052/// Memory Module Information (Type 6, Obsolete)\r
1053///\r
9095d37b 1054/// One Memory Module Information structure is included for each memory-module socket\r
98cb9ae8 1055/// in the system. The structure describes the speed, type, size, and error status\r
9095d37b
LG		 1056/// of each system memory module. The supported attributes of each module are described\r
1057/// by the "owning" Memory Controller Information structure.\r
1058/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r
af2dc6a7 1059/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 1060/// and Memory Device (Type 17) structures should be used instead.\r
1061///\r
61ce5861 1062typedef struct {\r
98cb9ae8 1063 SMBIOS_STRUCTURE Hdr;\r
1064 SMBIOS_TABLE_STRING SocketDesignation;\r
1065 UINT8 BankConnections;\r
1066 UINT8 CurrentSpeed;\r
1067 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
1068 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
1069 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
1070 UINT8 ErrorStatus;\r
61ce5861 1071} SMBIOS_TABLE_TYPE6;\r
1072\r
98cb9ae8 1073///\r
af2dc6a7 1074/// Cache Information - SRAM Type.\r
98cb9ae8 1075///\r
1076typedef struct {\r
1077 UINT16 Other :1;\r
1078 UINT16 Unknown :1;\r
1079 UINT16 NonBurst :1;\r
1080 UINT16 Burst :1;\r
1081 UINT16 PipelineBurst :1;\r
98cb9ae8 1082 UINT16 Synchronous :1;\r
53d90f04 1083 UINT16 Asynchronous :1;\r
98cb9ae8 1084 UINT16 Reserved :9;\r
1085} CACHE_SRAM_TYPE_DATA;\r
1086\r
1087///\r
af2dc6a7 1088/// Cache Information - Error Correction Type.\r
98cb9ae8 1089///\r
1090typedef enum {\r
1091 CacheErrorOther = 0x01,\r
1092 CacheErrorUnknown = 0x02,\r
1093 CacheErrorNone = 0x03,\r
1094 CacheErrorParity = 0x04,\r
6800ac83 1095 CacheErrorSingleBit = 0x05, ///< ECC\r
1096 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 1097} CACHE_ERROR_TYPE_DATA;\r
1098\r
1099///\r
9095d37b 1100/// Cache Information - System Cache Type.\r
98cb9ae8 1101///\r
1102typedef enum {\r
1103 CacheTypeOther = 0x01,\r
1104 CacheTypeUnknown = 0x02,\r
1105 CacheTypeInstruction = 0x03,\r
1106 CacheTypeData = 0x04,\r
1107 CacheTypeUnified = 0x05\r
1108} CACHE_TYPE_DATA;\r
1109\r
1110///\r
9095d37b 1111/// Cache Information - Associativity.\r
98cb9ae8 1112///\r
1113typedef enum {\r
1114 CacheAssociativityOther = 0x01,\r
1115 CacheAssociativityUnknown = 0x02,\r
1116 CacheAssociativityDirectMapped = 0x03,\r
1117 CacheAssociativity2Way = 0x04,\r
1118 CacheAssociativity4Way = 0x05,\r
1119 CacheAssociativityFully = 0x06,\r
1120 CacheAssociativity8Way = 0x07,\r
1121 CacheAssociativity16Way = 0x08,\r
3507ab19 1122 CacheAssociativity12Way = 0x09,\r
1123 CacheAssociativity24Way = 0x0A,\r
1124 CacheAssociativity32Way = 0x0B,\r
1125 CacheAssociativity48Way = 0x0C,\r
7ddba202
SZ		 1126 CacheAssociativity64Way = 0x0D,\r
1127 CacheAssociativity20Way = 0x0E\r
98cb9ae8 1128} CACHE_ASSOCIATIVITY_DATA;\r
1129\r
4135253b 1130///\r
af2dc6a7 1131/// Cache Information (Type 7).\r
4135253b 1132///\r
9095d37b 1133/// The information in this structure defines the attributes of CPU cache device in the system.\r
98cb9ae8 1134/// One structure is specified for each such device, whether the device is internal to\r
1135/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 1136/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 1137///\r
61ce5861 1138typedef struct {\r
98cb9ae8 1139 SMBIOS_STRUCTURE Hdr;\r
1140 SMBIOS_TABLE_STRING SocketDesignation;\r
1141 UINT16 CacheConfiguration;\r
1142 UINT16 MaximumCacheSize;\r
1143 UINT16 InstalledSize;\r
1144 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1145 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1146 UINT8 CacheSpeed;\r
af2dc6a7 1147 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1148 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1149 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
ff6a1f32
SZ		 1150 //\r
1151 // Add for smbios 3.1.0\r
1152 //\r
1153 UINT32 MaximumCacheSize2;\r
1154 UINT32 InstalledSize2;\r
61ce5861 1155} SMBIOS_TABLE_TYPE7;\r
1156\r
98cb9ae8 1157///\r
9095d37b 1158/// Port Connector Information - Connector Types.\r
98cb9ae8 1159///\r
1160typedef enum {\r
1161 PortConnectorTypeNone = 0x00,\r
1162 PortConnectorTypeCentronics = 0x01,\r
1163 PortConnectorTypeMiniCentronics = 0x02,\r
1164 PortConnectorTypeProprietary = 0x03,\r
1165 PortConnectorTypeDB25Male = 0x04,\r
1166 PortConnectorTypeDB25Female = 0x05,\r
1167 PortConnectorTypeDB15Male = 0x06,\r
1168 PortConnectorTypeDB15Female = 0x07,\r
1169 PortConnectorTypeDB9Male = 0x08,\r
1170 PortConnectorTypeDB9Female = 0x09,\r
1171 PortConnectorTypeRJ11 = 0x0A,\r
1172 PortConnectorTypeRJ45 = 0x0B,\r
1173 PortConnectorType50PinMiniScsi = 0x0C,\r
1174 PortConnectorTypeMiniDin = 0x0D,\r
119c1688 1175 PortConnectorTypeMicroDin = 0x0E,\r
98cb9ae8 1176 PortConnectorTypePS2 = 0x0F,\r
1177 PortConnectorTypeInfrared = 0x10,\r
1178 PortConnectorTypeHpHil = 0x11,\r
1179 PortConnectorTypeUsb = 0x12,\r
1180 PortConnectorTypeSsaScsi = 0x13,\r
1181 PortConnectorTypeCircularDin8Male = 0x14,\r
1182 PortConnectorTypeCircularDin8Female = 0x15,\r
1183 PortConnectorTypeOnboardIde = 0x16,\r
1184 PortConnectorTypeOnboardFloppy = 0x17,\r
1185 PortConnectorType9PinDualInline = 0x18,\r
1186 PortConnectorType25PinDualInline = 0x19,\r
1187 PortConnectorType50PinDualInline = 0x1A,\r
1188 PortConnectorType68PinDualInline = 0x1B,\r
1189 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1190 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1191 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1192 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1193 PortConnectorTypeBNC = 0x20,\r
1194 PortConnectorType1394 = 0x21,\r
119c1688 1195 PortConnectorTypeSasSata = 0x22,\r
cfcca3c2 1196 PortConnectorTypeUsbTypeC = 0x23,\r
98cb9ae8 1197 PortConnectorTypePC98 = 0xA0,\r
1198 PortConnectorTypePC98Hireso = 0xA1,\r
1199 PortConnectorTypePCH98 = 0xA2,\r
1200 PortConnectorTypePC98Note = 0xA3,\r
1201 PortConnectorTypePC98Full = 0xA4,\r
1202 PortConnectorTypeOther = 0xFF\r
1203} MISC_PORT_CONNECTOR_TYPE;\r
1204\r
1205///\r
9095d37b 1206/// Port Connector Information - Port Types\r
98cb9ae8 1207///\r
1208typedef enum {\r
1209 PortTypeNone = 0x00,\r
1210 PortTypeParallelXtAtCompatible = 0x01,\r
1211 PortTypeParallelPortPs2 = 0x02,\r
1212 PortTypeParallelPortEcp = 0x03,\r
1213 PortTypeParallelPortEpp = 0x04,\r
1214 PortTypeParallelPortEcpEpp = 0x05,\r
1215 PortTypeSerialXtAtCompatible = 0x06,\r
1216 PortTypeSerial16450Compatible = 0x07,\r
1217 PortTypeSerial16550Compatible = 0x08,\r
1218 PortTypeSerial16550ACompatible = 0x09,\r
1219 PortTypeScsi = 0x0A,\r
1220 PortTypeMidi = 0x0B,\r
1221 PortTypeJoyStick = 0x0C,\r
1222 PortTypeKeyboard = 0x0D,\r
1223 PortTypeMouse = 0x0E,\r
1224 PortTypeSsaScsi = 0x0F,\r
1225 PortTypeUsb = 0x10,\r
1226 PortTypeFireWire = 0x11,\r
1227 PortTypePcmciaTypeI = 0x12,\r
1228 PortTypePcmciaTypeII = 0x13,\r
1229 PortTypePcmciaTypeIII = 0x14,\r
1230 PortTypeCardBus = 0x15,\r
1231 PortTypeAccessBusPort = 0x16,\r
1232 PortTypeScsiII = 0x17,\r
1233 PortTypeScsiWide = 0x18,\r
1234 PortTypePC98 = 0x19,\r
1235 PortTypePC98Hireso = 0x1A,\r
1236 PortTypePCH98 = 0x1B,\r
1237 PortTypeVideoPort = 0x1C,\r
1238 PortTypeAudioPort = 0x1D,\r
1239 PortTypeModemPort = 0x1E,\r
1240 PortTypeNetworkPort = 0x1F,\r
23df19a7
SEHM		 1241 PortTypeSata = 0x20,\r
1242 PortTypeSas = 0x21,\r
cfcca3c2
SZ		 1243 PortTypeMfdp = 0x22, ///< Multi-Function Display Port\r
1244 PortTypeThunderbolt = 0x23,\r
98cb9ae8 1245 PortType8251Compatible = 0xA0,\r
1246 PortType8251FifoCompatible = 0xA1,\r
1247 PortTypeOther = 0xFF\r
1248} MISC_PORT_TYPE;\r
1249\r
4135253b 1250///\r
af2dc6a7 1251/// Port Connector Information (Type 8).\r
4135253b 1252///\r
9095d37b
LG		 1253/// The information in this structure defines the attributes of a system port connector,\r
1254/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r
98cb9ae8 1255/// are provided. One structure is present for each port provided by the system.\r
1256///\r
61ce5861 1257typedef struct {\r
98cb9ae8 1258 SMBIOS_STRUCTURE Hdr;\r
1259 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
af2dc6a7 1260 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
98cb9ae8 1261 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
af2dc6a7 1262 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1263 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 1264} SMBIOS_TABLE_TYPE8;\r
1265\r
98cb9ae8 1266///\r
1267/// System Slots - Slot Type\r
1268///\r
1269typedef enum {\r
1270 SlotTypeOther = 0x01,\r
1271 SlotTypeUnknown = 0x02,\r
1272 SlotTypeIsa = 0x03,\r
1273 SlotTypeMca = 0x04,\r
1274 SlotTypeEisa = 0x05,\r
1275 SlotTypePci = 0x06,\r
1276 SlotTypePcmcia = 0x07,\r
1277 SlotTypeVlVesa = 0x08,\r
1278 SlotTypeProprietary = 0x09,\r
1279 SlotTypeProcessorCardSlot = 0x0A,\r
1280 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1281 SlotTypeIORiserCardSlot = 0x0C,\r
1282 SlotTypeNuBus = 0x0D,\r
1283 SlotTypePci66MhzCapable = 0x0E,\r
1284 SlotTypeAgp = 0x0F,\r
1285 SlotTypeApg2X = 0x10,\r
1286 SlotTypeAgp4X = 0x11,\r
1287 SlotTypePciX = 0x12,\r
0c8cd067 1288 SlotTypeAgp8X = 0x13,\r
6cd35c62
EL		 1289 SlotTypeM2Socket1_DP = 0x14,\r
1290 SlotTypeM2Socket1_SD = 0x15,\r
1291 SlotTypeM2Socket2 = 0x16,\r
1292 SlotTypeM2Socket3 = 0x17,\r
1293 SlotTypeMxmTypeI = 0x18,\r
1294 SlotTypeMxmTypeII = 0x19,\r
1295 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1296 SlotTypeMxmTypeIIIHe = 0x1B,\r
1297 SlotTypeMxmTypeIV = 0x1C,\r
1298 SlotTypeMxm30TypeA = 0x1D,\r
1299 SlotTypeMxm30TypeB = 0x1E,\r
1300 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1301 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
ff6a1f32
SZ		 1302 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
1303 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
1304 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
9e50ef63 1305 SlotTypeCXLFlexbus10 = 0x30,\r
98cb9ae8 1306 SlotTypePC98C20 = 0xA0,\r
1307 SlotTypePC98C24 = 0xA1,\r
1308 SlotTypePC98E = 0xA2,\r
1309 SlotTypePC98LocalBus = 0xA3,\r
1310 SlotTypePC98Card = 0xA4,\r
1311 SlotTypePciExpress = 0xA5,\r
1312 SlotTypePciExpressX1 = 0xA6,\r
1313 SlotTypePciExpressX2 = 0xA7,\r
1314 SlotTypePciExpressX4 = 0xA8,\r
1315 SlotTypePciExpressX8 = 0xA9,\r
3507ab19 1316 SlotTypePciExpressX16 = 0xAA,\r
1317 SlotTypePciExpressGen2 = 0xAB,\r
1318 SlotTypePciExpressGen2X1 = 0xAC,\r
1319 SlotTypePciExpressGen2X2 = 0xAD,\r
1320 SlotTypePciExpressGen2X4 = 0xAE,\r
1321 SlotTypePciExpressGen2X8 = 0xAF,\r
7ddba202
SZ		 1322 SlotTypePciExpressGen2X16 = 0xB0,\r
1323 SlotTypePciExpressGen3 = 0xB1,\r
1324 SlotTypePciExpressGen3X1 = 0xB2,\r
1325 SlotTypePciExpressGen3X2 = 0xB3,\r
1326 SlotTypePciExpressGen3X4 = 0xB4,\r
1327 SlotTypePciExpressGen3X8 = 0xB5,\r
70c50f19
ZG		 1328 SlotTypePciExpressGen3X16 = 0xB6,\r
1329 SlotTypePciExpressGen4 = 0xB8,\r
1330 SlotTypePciExpressGen4X1 = 0xB9,\r
1331 SlotTypePciExpressGen4X2 = 0xBA,\r
1332 SlotTypePciExpressGen4X4 = 0xBB,\r
1333 SlotTypePciExpressGen4X8 = 0xBC,\r
1334 SlotTypePciExpressGen4X16 = 0xBD\r
98cb9ae8 1335} MISC_SLOT_TYPE;\r
1336\r
1337///\r
af2dc6a7 1338/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1339///\r
1340typedef enum {\r
1341 SlotDataBusWidthOther = 0x01,\r
1342 SlotDataBusWidthUnknown = 0x02,\r
1343 SlotDataBusWidth8Bit = 0x03,\r
1344 SlotDataBusWidth16Bit = 0x04,\r
1345 SlotDataBusWidth32Bit = 0x05,\r
1346 SlotDataBusWidth64Bit = 0x06,\r
1347 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 1348 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1349 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1350 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1351 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1352 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1353 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1354 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1355} MISC_SLOT_DATA_BUS_WIDTH;\r
1356\r
1357///\r
af2dc6a7 1358/// System Slots - Current Usage.\r
98cb9ae8 1359///\r
1360typedef enum {\r
cfcca3c2
SZ		 1361 SlotUsageOther = 0x01,\r
1362 SlotUsageUnknown = 0x02,\r
1363 SlotUsageAvailable = 0x03,\r
1364 SlotUsageInUse = 0x04,\r
1365 SlotUsageUnavailable = 0x05\r
98cb9ae8 1366} MISC_SLOT_USAGE;\r
1367\r
1368///\r
9095d37b 1369/// System Slots - Slot Length.\r
98cb9ae8 1370///\r
1371typedef enum {\r
1372 SlotLengthOther = 0x01,\r
1373 SlotLengthUnknown = 0x02,\r
1374 SlotLengthShort = 0x03,\r
1375 SlotLengthLong = 0x04\r
1376} MISC_SLOT_LENGTH;\r
1377\r
1378///\r
9095d37b 1379/// System Slots - Slot Characteristics 1.\r
98cb9ae8 1380///\r
1381typedef struct {\r
1382 UINT8 CharacteristicsUnknown :1;\r
1383 UINT8 Provides50Volts :1;\r
1384 UINT8 Provides33Volts :1;\r
1385 UINT8 SharedSlot :1;\r
1386 UINT8 PcCard16Supported :1;\r
1387 UINT8 CardBusSupported :1;\r
1388 UINT8 ZoomVideoSupported :1;\r
1389 UINT8 ModemRingResumeSupported:1;\r
1390} MISC_SLOT_CHARACTERISTICS1;\r
1391///\r
9095d37b 1392/// System Slots - Slot Characteristics 2.\r
98cb9ae8 1393///\r
1394typedef struct {\r
1395 UINT8 PmeSignalSupported :1;\r
1396 UINT8 HotPlugDevicesSupported :1;\r
1397 UINT8 SmbusSignalSupported :1;\r
cfcca3c2 1398 UINT8 BifurcationSupported :1;\r
885efcd3 1399 UINT8 AsyncSurpriseRemoval :1;\r
1400 UINT8 FlexbusSlotCxl10Capable :1;\r
1401 UINT8 FlexbusSlotCxl20Capable :1;\r
1402 UINT8 Reserved :1; ///< Set to 0.\r
98cb9ae8 1403} MISC_SLOT_CHARACTERISTICS2;\r
1404\r
cfcca3c2
SZ		 1405///\r
1406/// System Slots - Peer Segment/Bus/Device/Function/Width Groups\r
1407///\r
1408typedef struct {\r
1409 UINT16 SegmentGroupNum;\r
1410 UINT8 BusNum;\r
1411 UINT8 DevFuncNum;\r
1412 UINT8 DataBusWidth;\r
1413} MISC_SLOT_PEER_GROUP;\r
1414\r
4135253b 1415///\r
1416/// System Slots (Type 9)\r
1417///\r
9095d37b 1418/// The information in this structure defines the attributes of a system slot.\r
98cb9ae8 1419/// One structure is provided for each slot in the system.\r
1420///\r
1421///\r
61ce5861 1422typedef struct {\r
98cb9ae8 1423 SMBIOS_STRUCTURE Hdr;\r
1424 SMBIOS_TABLE_STRING SlotDesignation;\r
af2dc6a7 1425 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1426 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1427 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1428 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
98cb9ae8 1429 UINT16 SlotID;\r
1430 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1431 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1432 //\r
1433 // Add for smbios 2.6\r
1434 //\r
98cb9ae8 1435 UINT16 SegmentGroupNum;\r
1436 UINT8 BusNum;\r
1437 UINT8 DevFuncNum;\r
cfcca3c2
SZ		 1438 //\r
1439 // Add for smbios 3.2\r
1440 //\r
1441 UINT8 DataBusWidth;\r
1442 UINT8 PeerGroupingCount;\r
1443 MISC_SLOT_PEER_GROUP PeerGroups[1];\r
885efcd3 1444 //\r
1445 // Add for smbios 3.4\r
1446 //\r
1447 UINT8 SlotInformation;\r
1448 UINT8 SlotPhysicalWidth;\r
1449 UINT16 SlotPitch;\r
61ce5861 1450} SMBIOS_TABLE_TYPE9;\r
1451\r
98cb9ae8 1452///\r
9095d37b 1453/// On Board Devices Information - Device Types.\r
98cb9ae8 1454///\r
1455typedef enum {\r
1456 OnBoardDeviceTypeOther = 0x01,\r
1457 OnBoardDeviceTypeUnknown = 0x02,\r
1458 OnBoardDeviceTypeVideo = 0x03,\r
1459 OnBoardDeviceTypeScsiController = 0x04,\r
1460 OnBoardDeviceTypeEthernet = 0x05,\r
1461 OnBoardDeviceTypeTokenRing = 0x06,\r
119c1688
SZ		 1462 OnBoardDeviceTypeSound = 0x07,\r
1463 OnBoardDeviceTypePATAController = 0x08,\r
1464 OnBoardDeviceTypeSATAController = 0x09,\r
1465 OnBoardDeviceTypeSASController = 0x0A\r
98cb9ae8 1466} MISC_ONBOARD_DEVICE_TYPE;\r
1467\r
bf7ea009 1468///\r
1469/// Device Item Entry\r
1470///\r
61ce5861 1471typedef struct {\r
af2dc6a7 1472 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1473 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
98cb9ae8 1474 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1475} DEVICE_STRUCT;\r
1476\r
4135253b 1477///\r
af2dc6a7 1478/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1479///\r
9095d37b
LG		 1480/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r
1481/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r
1482/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r
1483/// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r
98cb9ae8 1484/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1485/// has some level of control over the enabling of the associated device for use by the system.\r
1486///\r
61ce5861 1487typedef struct {\r
1488 SMBIOS_STRUCTURE Hdr;\r
1489 DEVICE_STRUCT Device[1];\r
1490} SMBIOS_TABLE_TYPE10;\r
1491\r
4135253b 1492///\r
af2dc6a7 1493/// OEM Strings (Type 11).\r
9095d37b
LG		 1494/// This structure contains free form strings defined by the OEM. Examples of this are:\r
1495/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r
4135253b 1496///\r
61ce5861 1497typedef struct {\r
1498 SMBIOS_STRUCTURE Hdr;\r
1499 UINT8 StringCount;\r
1500} SMBIOS_TABLE_TYPE11;\r
1501\r
4135253b 1502///\r
af2dc6a7 1503/// System Configuration Options (Type 12).\r
4135253b 1504///\r
9095d37b 1505/// This structure contains information required to configure the base board's Jumpers and Switches.\r
98cb9ae8 1506///\r
61ce5861 1507typedef struct {\r
1508 SMBIOS_STRUCTURE Hdr;\r
1509 UINT8 StringCount;\r
1510} SMBIOS_TABLE_TYPE12;\r
1511\r
98cb9ae8 1512\r
4135253b 1513///\r
af2dc6a7 1514/// BIOS Language Information (Type 13).\r
4135253b 1515///\r
9095d37b
LG		 1516/// The information in this structure defines the installable language attributes of the BIOS.\r
1517///\r
61ce5861 1518typedef struct {\r
1519 SMBIOS_STRUCTURE Hdr;\r
1520 UINT8 InstallableLanguages;\r
1521 UINT8 Flags;\r
fbfa4a1d 1522 UINT8 Reserved[15];\r
61ce5861 1523 SMBIOS_TABLE_STRING CurrentLanguages;\r
1524} SMBIOS_TABLE_TYPE13;\r
1525\r
119c1688
SZ		 1526///\r
1527/// Group Item Entry\r
1528///\r
1529typedef struct {\r
1530 UINT8 ItemType;\r
1531 UINT16 ItemHandle;\r
1532} GROUP_STRUCT;\r
1533\r
1534///\r
1535/// Group Associations (Type 14).\r
1536///\r
9095d37b
LG		 1537/// The Group Associations structure is provided for OEMs who want to specify\r
1538/// the arrangement or hierarchy of certain components (including other Group Associations)\r
1539/// within the system.\r
119c1688
SZ		 1540///\r
1541typedef struct {\r
1542 SMBIOS_STRUCTURE Hdr;\r
1543 SMBIOS_TABLE_STRING GroupName;\r
1544 GROUP_STRUCT Group[1];\r
1545} SMBIOS_TABLE_TYPE14;\r
1546\r
98cb9ae8 1547///\r
af2dc6a7 1548/// System Event Log - Event Log Types.\r
9095d37b 1549///\r
98cb9ae8 1550typedef enum {\r
1551 EventLogTypeReserved = 0x00,\r
1552 EventLogTypeSingleBitECC = 0x01,\r
1553 EventLogTypeMultiBitECC = 0x02,\r
1554 EventLogTypeParityMemErr = 0x03,\r
1555 EventLogTypeBusTimeOut = 0x04,\r
1556 EventLogTypeIOChannelCheck = 0x05,\r
1557 EventLogTypeSoftwareNMI = 0x06,\r
1558 EventLogTypePOSTMemResize = 0x07,\r
1559 EventLogTypePOSTErr = 0x08,\r
1560 EventLogTypePCIParityErr = 0x09,\r
1561 EventLogTypePCISystemErr = 0x0A,\r
1562 EventLogTypeCPUFailure = 0x0B,\r
1563 EventLogTypeEISATimeOut = 0x0C,\r
1564 EventLogTypeMemLogDisabled = 0x0D,\r
1565 EventLogTypeLoggingDisabled = 0x0E,\r
1566 EventLogTypeSysLimitExce = 0x10,\r
1567 EventLogTypeAsyncHWTimer = 0x11,\r
1568 EventLogTypeSysConfigInfo = 0x12,\r
1569 EventLogTypeHDInfo = 0x13,\r
1570 EventLogTypeSysReconfig = 0x14,\r
1571 EventLogTypeUncorrectCPUErr = 0x15,\r
1572 EventLogTypeAreaResetAndClr = 0x16,\r
1573 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1574 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1575 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1576 EventLogTypeEndOfLog = 0xFF\r
1577} EVENT_LOG_TYPE_DATA;\r
1578\r
1579///\r
9095d37b
LG		 1580/// System Event Log - Variable Data Format Types.\r
1581///\r
98cb9ae8 1582typedef enum {\r
1583 EventLogVariableNone = 0x00,\r
1584 EventLogVariableHandle = 0x01,\r
1585 EventLogVariableMutilEvent = 0x02,\r
1586 EventLogVariableMutilEventHandle = 0x03,\r
1587 EventLogVariablePOSTResultBitmap = 0x04,\r
1588 EventLogVariableSysManagementType = 0x05,\r
9095d37b 1589 EventLogVariableMutliEventSysManagmentType = 0x06,\r
98cb9ae8 1590 EventLogVariableUnused = 0x07,\r
1591 EventLogVariableOEMAssigned = 0x80\r
55deb978 1592} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1593\r
98cb9ae8 1594///\r
1595/// Event Log Type Descriptors\r
1596///\r
1597typedef struct {\r
af2dc6a7 1598 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
98cb9ae8 1599 UINT8 DataFormatType;\r
1600} EVENT_LOG_TYPE;\r
1601\r
4135253b 1602///\r
af2dc6a7 1603/// System Event Log (Type 15).\r
4135253b 1604///\r
9095d37b
LG		 1605/// The presence of this structure within the SMBIOS data returned for a system indicates\r
1606/// that the system supports an event log. An event log is a fixed-length area within a\r
1607/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r
1608/// record, followed by one or more variable-length log records.\r
98cb9ae8 1609///\r
61ce5861 1610typedef struct {\r
1611 SMBIOS_STRUCTURE Hdr;\r
1612 UINT16 LogAreaLength;\r
1613 UINT16 LogHeaderStartOffset;\r
1614 UINT16 LogDataStartOffset;\r
1615 UINT8 AccessMethod;\r
1616 UINT8 LogStatus;\r
1617 UINT32 LogChangeToken;\r
1618 UINT32 AccessMethodAddress;\r
1619 UINT8 LogHeaderFormat;\r
1620 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1621 UINT8 LengthOfLogTypeDescriptor;\r
1622 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1623} SMBIOS_TABLE_TYPE15;\r
1624\r
98cb9ae8 1625///\r
af2dc6a7 1626/// Physical Memory Array - Location.\r
98cb9ae8 1627///\r
1628typedef enum {\r
1629 MemoryArrayLocationOther = 0x01,\r
1630 MemoryArrayLocationUnknown = 0x02,\r
1631 MemoryArrayLocationSystemBoard = 0x03,\r
1632 MemoryArrayLocationIsaAddonCard = 0x04,\r
1633 MemoryArrayLocationEisaAddonCard = 0x05,\r
1634 MemoryArrayLocationPciAddonCard = 0x06,\r
1635 MemoryArrayLocationMcaAddonCard = 0x07,\r
1636 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1637 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1638 MemoryArrayLocationNuBus = 0x0A,\r
1639 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1640 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1641 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
9e50ef63 1642 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,\r
885efcd3 1643 MemoryArrayLocationCXLAddonCard = 0xA4\r
98cb9ae8 1644} MEMORY_ARRAY_LOCATION;\r
1645\r
1646///\r
af2dc6a7 1647/// Physical Memory Array - Use.\r
98cb9ae8 1648///\r
1649typedef enum {\r
1650 MemoryArrayUseOther = 0x01,\r
1651 MemoryArrayUseUnknown = 0x02,\r
1652 MemoryArrayUseSystemMemory = 0x03,\r
1653 MemoryArrayUseVideoMemory = 0x04,\r
1654 MemoryArrayUseFlashMemory = 0x05,\r
1655 MemoryArrayUseNonVolatileRam = 0x06,\r
1656 MemoryArrayUseCacheMemory = 0x07\r
1657} MEMORY_ARRAY_USE;\r
1658\r
1659///\r
9095d37b 1660/// Physical Memory Array - Error Correction Types.\r
98cb9ae8 1661///\r
1662typedef enum {\r
1663 MemoryErrorCorrectionOther = 0x01,\r
1664 MemoryErrorCorrectionUnknown = 0x02,\r
1665 MemoryErrorCorrectionNone = 0x03,\r
1666 MemoryErrorCorrectionParity = 0x04,\r
1667 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1668 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1669 MemoryErrorCorrectionCrc = 0x07\r
1670} MEMORY_ERROR_CORRECTION;\r
1671\r
4135253b 1672///\r
af2dc6a7 1673/// Physical Memory Array (Type 16).\r
4135253b 1674///\r
9095d37b
LG		 1675/// This structure describes a collection of memory devices that operate\r
1676/// together to form a memory address space.\r
98cb9ae8 1677///\r
61ce5861 1678typedef struct {\r
98cb9ae8 1679 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1680 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1681 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1682 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
98cb9ae8 1683 UINT32 MaximumCapacity;\r
1684 UINT16 MemoryErrorInformationHandle;\r
1685 UINT16 NumberOfMemoryDevices;\r
7ddba202
SZ		 1686 //\r
1687 // Add for smbios 2.7\r
1688 //\r
1689 UINT64 ExtendedMaximumCapacity;\r
61ce5861 1690} SMBIOS_TABLE_TYPE16;\r
1691\r
98cb9ae8 1692///\r
af2dc6a7 1693/// Memory Device - Form Factor.\r
98cb9ae8 1694///\r
1695typedef enum {\r
1696 MemoryFormFactorOther = 0x01,\r
1697 MemoryFormFactorUnknown = 0x02,\r
1698 MemoryFormFactorSimm = 0x03,\r
1699 MemoryFormFactorSip = 0x04,\r
1700 MemoryFormFactorChip = 0x05,\r
1701 MemoryFormFactorDip = 0x06,\r
1702 MemoryFormFactorZip = 0x07,\r
1703 MemoryFormFactorProprietaryCard = 0x08,\r
1704 MemoryFormFactorDimm = 0x09,\r
1705 MemoryFormFactorTsop = 0x0A,\r
1706 MemoryFormFactorRowOfChips = 0x0B,\r
1707 MemoryFormFactorRimm = 0x0C,\r
1708 MemoryFormFactorSodimm = 0x0D,\r
1709 MemoryFormFactorSrimm = 0x0E,\r
8019eb58
ZG		 1710 MemoryFormFactorFbDimm = 0x0F,\r
1711 MemoryFormFactorDie = 0x10\r
98cb9ae8 1712} MEMORY_FORM_FACTOR;\r
1713\r
1714///\r
1715/// Memory Device - Type\r
1716///\r
1717typedef enum {\r
1718 MemoryTypeOther = 0x01,\r
1719 MemoryTypeUnknown = 0x02,\r
1720 MemoryTypeDram = 0x03,\r
1721 MemoryTypeEdram = 0x04,\r
1722 MemoryTypeVram = 0x05,\r
1723 MemoryTypeSram = 0x06,\r
1724 MemoryTypeRam = 0x07,\r
1725 MemoryTypeRom = 0x08,\r
1726 MemoryTypeFlash = 0x09,\r
1727 MemoryTypeEeprom = 0x0A,\r
1728 MemoryTypeFeprom = 0x0B,\r
1729 MemoryTypeEprom = 0x0C,\r
1730 MemoryTypeCdram = 0x0D,\r
1731 MemoryType3Dram = 0x0E,\r
1732 MemoryTypeSdram = 0x0F,\r
1733 MemoryTypeSgram = 0x10,\r
1734 MemoryTypeRdram = 0x11,\r
1735 MemoryTypeDdr = 0x12,\r
1736 MemoryTypeDdr2 = 0x13,\r
3507ab19 1737 MemoryTypeDdr2FbDimm = 0x14,\r
1738 MemoryTypeDdr3 = 0x18,\r
6cd35c62
EL		 1739 MemoryTypeFbd2 = 0x19,\r
1740 MemoryTypeDdr4 = 0x1A,\r
1741 MemoryTypeLpddr = 0x1B,\r
1742 MemoryTypeLpddr2 = 0x1C,\r
1743 MemoryTypeLpddr3 = 0x1D,\r
cfcca3c2 1744 MemoryTypeLpddr4 = 0x1E,\r
8019eb58
ZG		 1745 MemoryTypeLogicalNonVolatileDevice = 0x1F,\r
1746 MemoryTypeHBM = 0x20,\r
244be783
WS		 1747 MemoryTypeHBM2 = 0x21,\r
1748 MemoryTypeDdr5 = 0x22,\r
1749 MemoryTypeLpddr5 = 0x23\r
98cb9ae8 1750} MEMORY_DEVICE_TYPE;\r
1751\r
cfcca3c2
SZ		 1752///\r
1753/// Memory Device - Type Detail\r
1754///\r
98cb9ae8 1755typedef struct {\r
1756 UINT16 Reserved :1;\r
1757 UINT16 Other :1;\r
1758 UINT16 Unknown :1;\r
1759 UINT16 FastPaged :1;\r
1760 UINT16 StaticColumn :1;\r
1761 UINT16 PseudoStatic :1;\r
1762 UINT16 Rambus :1;\r
1763 UINT16 Synchronous :1;\r
1764 UINT16 Cmos :1;\r
1765 UINT16 Edo :1;\r
1766 UINT16 WindowDram :1;\r
1767 UINT16 CacheDram :1;\r
1768 UINT16 Nonvolatile :1;\r
7ddba202
SZ		 1769 UINT16 Registered :1;\r
1770 UINT16 Unbuffered :1;\r
4a228334 1771 UINT16 LrDimm :1;\r
98cb9ae8 1772} MEMORY_DEVICE_TYPE_DETAIL;\r
1773\r
cfcca3c2
SZ		 1774///\r
1775/// Memory Device - Memory Technology\r
1776///\r
1777typedef enum {\r
885efcd3 1778 MemoryTechnologyOther = 0x01,\r
1779 MemoryTechnologyUnknown = 0x02,\r
1780 MemoryTechnologyDram = 0x03,\r
1781 MemoryTechnologyNvdimmN = 0x04,\r
1782 MemoryTechnologyNvdimmF = 0x05,\r
1783 MemoryTechnologyNvdimmP = 0x06,\r
4b7edd78
ZG		 1784 //\r
1785 // This definition is updated to represent Intel\r
885efcd3 1786 // Optane DC Persistent Memory in SMBIOS spec 3.4.0\r
4b7edd78 1787 //\r
885efcd3 1788 MemoryTechnologyIntelOptanePersistentMemory = 0x07\r
1789\r
cfcca3c2
SZ		 1790} MEMORY_DEVICE_TECHNOLOGY;\r
1791\r
1792///\r
1793/// Memory Device - Memory Operating Mode Capability\r
1794///\r
1795typedef union {\r
1796 ///\r
1797 /// Individual bit fields\r
1798 ///\r
1799 struct {\r
1800 UINT16 Reserved :1; ///< Set to 0.\r
1801 UINT16 Other :1;\r
1802 UINT16 Unknown :1;\r
1803 UINT16 VolatileMemory :1;\r
1804 UINT16 ByteAccessiblePersistentMemory :1;\r
1805 UINT16 BlockAccessiblePersistentMemory :1;\r
1806 UINT16 Reserved2 :10; ///< Set to 0.\r
1807 } Bits;\r
1808 ///\r
1809 /// All bit fields as a 16-bit value\r
1810 ///\r
1811 UINT16 Uint16;\r
1812} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;\r
1813\r
4135253b 1814///\r
af2dc6a7 1815/// Memory Device (Type 17).\r
4135253b 1816///\r
9095d37b 1817/// This structure describes a single memory device that is part of\r
98cb9ae8 1818/// a larger Physical Memory Array (Type 16).\r
9095d37b
LG		 1819/// Note: If a system includes memory-device sockets, the SMBIOS implementation\r
1820/// includes a Memory Device structure instance for each slot, whether or not the\r
98cb9ae8 1821/// socket is currently populated.\r
1822///\r
61ce5861 1823typedef struct {\r
cfcca3c2
SZ		 1824 SMBIOS_STRUCTURE Hdr;\r
1825 UINT16 MemoryArrayHandle;\r
1826 UINT16 MemoryErrorInformationHandle;\r
1827 UINT16 TotalWidth;\r
1828 UINT16 DataWidth;\r
1829 UINT16 Size;\r
1830 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
1831 UINT8 DeviceSet;\r
1832 SMBIOS_TABLE_STRING DeviceLocator;\r
1833 SMBIOS_TABLE_STRING BankLocator;\r
1834 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
1835 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1836 UINT16 Speed;\r
1837 SMBIOS_TABLE_STRING Manufacturer;\r
1838 SMBIOS_TABLE_STRING SerialNumber;\r
1839 SMBIOS_TABLE_STRING AssetTag;\r
1840 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1841 //\r
1842 // Add for smbios 2.6\r
9095d37b 1843 //\r
cfcca3c2 1844 UINT8 Attributes;\r
7ddba202
SZ		 1845 //\r
1846 // Add for smbios 2.7\r
1847 //\r
cfcca3c2
SZ		 1848 UINT32 ExtendedSize;\r
1849 //\r
1850 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility\r
1851 // although this field is renamed from "Configured Memory Clock Speed"\r
1852 // to "Configured Memory Speed" in smbios 3.2.0.\r
1853 //\r
1854 UINT16 ConfiguredMemoryClockSpeed;\r
4a228334
EL		 1855 //\r
1856 // Add for smbios 2.8.0\r
1857 //\r
cfcca3c2
SZ		 1858 UINT16 MinimumVoltage;\r
1859 UINT16 MaximumVoltage;\r
1860 UINT16 ConfiguredVoltage;\r
1861 //\r
1862 // Add for smbios 3.2.0\r
1863 //\r
1864 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r
1865 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;\r
0db89a66 1866 SMBIOS_TABLE_STRING FirmwareVersion;\r
cfcca3c2
SZ		 1867 UINT16 ModuleManufacturerID;\r
1868 UINT16 ModuleProductID;\r
1869 UINT16 MemorySubsystemControllerManufacturerID;\r
1870 UINT16 MemorySubsystemControllerProductID;\r
1871 UINT64 NonVolatileSize;\r
1872 UINT64 VolatileSize;\r
1873 UINT64 CacheSize;\r
1874 UINT64 LogicalSize;\r
67ead55b
MC		 1875 //\r
1876 // Add for smbios 3.3.0\r
1877 //\r
1878 UINT32 ExtendedSpeed;\r
1879 UINT32 ExtendedConfiguredMemorySpeed;\r
61ce5861 1880} SMBIOS_TABLE_TYPE17;\r
1881\r
98cb9ae8 1882///\r
9095d37b 1883/// 32-bit Memory Error Information - Error Type.\r
98cb9ae8 1884///\r
9095d37b 1885typedef enum {\r
98cb9ae8 1886 MemoryErrorOther = 0x01,\r
1887 MemoryErrorUnknown = 0x02,\r
1888 MemoryErrorOk = 0x03,\r
1889 MemoryErrorBadRead = 0x04,\r
1890 MemoryErrorParity = 0x05,\r
1891 MemoryErrorSigleBit = 0x06,\r
1892 MemoryErrorDoubleBit = 0x07,\r
1893 MemoryErrorMultiBit = 0x08,\r
1894 MemoryErrorNibble = 0x09,\r
1895 MemoryErrorChecksum = 0x0A,\r
1896 MemoryErrorCrc = 0x0B,\r
1897 MemoryErrorCorrectSingleBit = 0x0C,\r
1898 MemoryErrorCorrected = 0x0D,\r
1899 MemoryErrorUnCorrectable = 0x0E\r
1900} MEMORY_ERROR_TYPE;\r
1901\r
1902///\r
9095d37b 1903/// 32-bit Memory Error Information - Error Granularity.\r
98cb9ae8 1904///\r
9095d37b 1905typedef enum {\r
98cb9ae8 1906 MemoryGranularityOther = 0x01,\r
1907 MemoryGranularityOtherUnknown = 0x02,\r
1908 MemoryGranularityDeviceLevel = 0x03,\r
1909 MemoryGranularityMemPartitionLevel = 0x04\r
1910} MEMORY_ERROR_GRANULARITY;\r
1911\r
1912///\r
9095d37b 1913/// 32-bit Memory Error Information - Error Operation.\r
98cb9ae8 1914///\r
9095d37b 1915typedef enum {\r
98cb9ae8 1916 MemoryErrorOperationOther = 0x01,\r
1917 MemoryErrorOperationUnknown = 0x02,\r
1918 MemoryErrorOperationRead = 0x03,\r
1919 MemoryErrorOperationWrite = 0x04,\r
1920 MemoryErrorOperationPartialWrite = 0x05\r
1921} MEMORY_ERROR_OPERATION;\r
1922\r
4135253b 1923///\r
af2dc6a7 1924/// 32-bit Memory Error Information (Type 18).\r
9095d37b
LG		 1925///\r
1926/// This structure identifies the specifics of an error that might be detected\r
98cb9ae8 1927/// within a Physical Memory Array.\r
4135253b 1928///\r
61ce5861 1929typedef struct {\r
98cb9ae8 1930 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1931 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1932 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1933 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1934 UINT32 VendorSyndrome;\r
1935 UINT32 MemoryArrayErrorAddress;\r
1936 UINT32 DeviceErrorAddress;\r
1937 UINT32 ErrorResolution;\r
61ce5861 1938} SMBIOS_TABLE_TYPE18;\r
1939\r
4135253b 1940///\r
af2dc6a7 1941/// Memory Array Mapped Address (Type 19).\r
4135253b 1942///\r
9095d37b 1943/// This structure provides the address mapping for a Physical Memory Array.\r
98cb9ae8 1944/// One structure is present for each contiguous address range described.\r
1945///\r
61ce5861 1946typedef struct {\r
1947 SMBIOS_STRUCTURE Hdr;\r
1948 UINT32 StartingAddress;\r
1949 UINT32 EndingAddress;\r
1950 UINT16 MemoryArrayHandle;\r
1951 UINT8 PartitionWidth;\r
7ddba202
SZ		 1952 //\r
1953 // Add for smbios 2.7\r
1954 //\r
1955 UINT64 ExtendedStartingAddress;\r
1956 UINT64 ExtendedEndingAddress;\r
61ce5861 1957} SMBIOS_TABLE_TYPE19;\r
1958\r
4135253b 1959///\r
af2dc6a7 1960/// Memory Device Mapped Address (Type 20).\r
4135253b 1961///\r
9095d37b
LG		 1962/// This structure maps memory address space usually to a device-level granularity.\r
1963/// One structure is present for each contiguous address range described.\r
98cb9ae8 1964///\r
61ce5861 1965typedef struct {\r
1966 SMBIOS_STRUCTURE Hdr;\r
1967 UINT32 StartingAddress;\r
1968 UINT32 EndingAddress;\r
1969 UINT16 MemoryDeviceHandle;\r
1970 UINT16 MemoryArrayMappedAddressHandle;\r
1971 UINT8 PartitionRowPosition;\r
1972 UINT8 InterleavePosition;\r
1973 UINT8 InterleavedDataDepth;\r
7ddba202
SZ		 1974 //\r
1975 // Add for smbios 2.7\r
1976 //\r
1977 UINT64 ExtendedStartingAddress;\r
1978 UINT64 ExtendedEndingAddress;\r
61ce5861 1979} SMBIOS_TABLE_TYPE20;\r
1980\r
98cb9ae8 1981///\r
1982/// Built-in Pointing Device - Type\r
1983///\r
1984typedef enum {\r
1985 PointingDeviceTypeOther = 0x01,\r
1986 PointingDeviceTypeUnknown = 0x02,\r
1987 PointingDeviceTypeMouse = 0x03,\r
1988 PointingDeviceTypeTrackBall = 0x04,\r
1989 PointingDeviceTypeTrackPoint = 0x05,\r
1990 PointingDeviceTypeGlidePoint = 0x06,\r
1991 PointingDeviceTouchPad = 0x07,\r
1992 PointingDeviceTouchScreen = 0x08,\r
1993 PointingDeviceOpticalSensor = 0x09\r
1994} BUILTIN_POINTING_DEVICE_TYPE;\r
1995\r
1996///\r
af2dc6a7 1997/// Built-in Pointing Device - Interface.\r
98cb9ae8 1998///\r
1999typedef enum {\r
2000 PointingDeviceInterfaceOther = 0x01,\r
2001 PointingDeviceInterfaceUnknown = 0x02,\r
2002 PointingDeviceInterfaceSerial = 0x03,\r
2003 PointingDeviceInterfacePs2 = 0x04,\r
2004 PointingDeviceInterfaceInfrared = 0x05,\r
2005 PointingDeviceInterfaceHpHil = 0x06,\r
2006 PointingDeviceInterfaceBusMouse = 0x07,\r
2007 PointingDeviceInterfaceADB = 0x08,\r
2008 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
2009 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
2010 PointingDeviceInterfaceUsb = 0xA2\r
2011} BUILTIN_POINTING_DEVICE_INTERFACE;\r
2012\r
4135253b 2013///\r
af2dc6a7 2014/// Built-in Pointing Device (Type 21).\r
4135253b 2015///\r
9095d37b 2016/// This structure describes the attributes of the built-in pointing device for the\r
af2dc6a7 2017/// system. The presence of this structure does not imply that the built-in\r
9095d37b 2018/// pointing device is active for the system's use!\r
98cb9ae8 2019///\r
61ce5861 2020typedef struct {\r
98cb9ae8 2021 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2022 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
2023 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
98cb9ae8 2024 UINT8 NumberOfButtons;\r
61ce5861 2025} SMBIOS_TABLE_TYPE21;\r
2026\r
98cb9ae8 2027///\r
2028/// Portable Battery - Device Chemistry\r
2029///\r
9095d37b 2030typedef enum {\r
98cb9ae8 2031 PortableBatteryDeviceChemistryOther = 0x01,\r
2032 PortableBatteryDeviceChemistryUnknown = 0x02,\r
2033 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
2034 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
2035 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
2036 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
2037 PortableBatteryDeviceChemistryZincAir = 0x07,\r
2038 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
2039} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
2040\r
4135253b 2041///\r
af2dc6a7 2042/// Portable Battery (Type 22).\r
4135253b 2043///\r
9095d37b
LG		 2044/// This structure describes the attributes of the portable battery(s) for the system.\r
2045/// The structure contains the static attributes for the group. Each structure describes\r
1f9f8414 2046/// a single battery pack's attributes.\r
98cb9ae8 2047///\r
61ce5861 2048typedef struct {\r
98cb9ae8 2049 SMBIOS_STRUCTURE Hdr;\r
2050 SMBIOS_TABLE_STRING Location;\r
2051 SMBIOS_TABLE_STRING Manufacturer;\r
2052 SMBIOS_TABLE_STRING ManufactureDate;\r
2053 SMBIOS_TABLE_STRING SerialNumber;\r
2054 SMBIOS_TABLE_STRING DeviceName;\r
af2dc6a7 2055 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
98cb9ae8 2056 UINT16 DeviceCapacity;\r
2057 UINT16 DesignVoltage;\r
2058 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
2059 UINT8 MaximumErrorInBatteryData;\r
2060 UINT16 SBDSSerialNumber;\r
2061 UINT16 SBDSManufactureDate;\r
2062 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
2063 UINT8 DesignCapacityMultiplier;\r
2064 UINT32 OEMSpecific;\r
61ce5861 2065} SMBIOS_TABLE_TYPE22;\r
2066\r
4135253b 2067///\r
2068/// System Reset (Type 23)\r
2069///\r
9095d37b 2070/// This structure describes whether Automatic System Reset functions enabled (Status).\r
98cb9ae8 2071/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
9095d37b
LG		 2072/// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r
2073/// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r
2074/// the system will re-boot according to the Boot Option at Limit.\r
98cb9ae8 2075///\r
61ce5861 2076typedef struct {\r
2077 SMBIOS_STRUCTURE Hdr;\r
2078 UINT8 Capabilities;\r
2079 UINT16 ResetCount;\r
2080 UINT16 ResetLimit;\r
2081 UINT16 TimerInterval;\r
2082 UINT16 Timeout;\r
2083} SMBIOS_TABLE_TYPE23;\r
2084\r
4135253b 2085///\r
af2dc6a7 2086/// Hardware Security (Type 24).\r
4135253b 2087///\r
9095d37b 2088/// This structure describes the system-wide hardware security settings.\r
98cb9ae8 2089///\r
61ce5861 2090typedef struct {\r
2091 SMBIOS_STRUCTURE Hdr;\r
2092 UINT8 HardwareSecuritySettings;\r
2093} SMBIOS_TABLE_TYPE24;\r
2094\r
4135253b 2095///\r
af2dc6a7 2096/// System Power Controls (Type 25).\r
4135253b 2097///\r
9095d37b
LG		 2098/// This structure describes the attributes for controlling the main power supply to the system.\r
2099/// Software that interprets this structure uses the month, day, hour, minute, and second values\r
2100/// to determine the number of seconds until the next power-on of the system. The presence of\r
2101/// this structure implies that a timed power-on facility is available for the system.\r
98cb9ae8 2102///\r
61ce5861 2103typedef struct {\r
2104 SMBIOS_STRUCTURE Hdr;\r
2105 UINT8 NextScheduledPowerOnMonth;\r
2106 UINT8 NextScheduledPowerOnDayOfMonth;\r
2107 UINT8 NextScheduledPowerOnHour;\r
2108 UINT8 NextScheduledPowerOnMinute;\r
2109 UINT8 NextScheduledPowerOnSecond;\r
2110} SMBIOS_TABLE_TYPE25;\r
2111\r
98cb9ae8 2112///\r
af2dc6a7 2113/// Voltage Probe - Location and Status.\r
98cb9ae8 2114///\r
2115typedef struct {\r
2116 UINT8 VoltageProbeSite :5;\r
2117 UINT8 VoltageProbeStatus :3;\r
2118} MISC_VOLTAGE_PROBE_LOCATION;\r
2119\r
4135253b 2120///\r
2121/// Voltage Probe (Type 26)\r
2122///\r
9095d37b 2123/// This describes the attributes for a voltage probe in the system.\r
98cb9ae8 2124/// Each structure describes a single voltage probe.\r
2125///\r
61ce5861 2126typedef struct {\r
98cb9ae8 2127 SMBIOS_STRUCTURE Hdr;\r
2128 SMBIOS_TABLE_STRING Description;\r
2129 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
2130 UINT16 MaximumValue;\r
2131 UINT16 MinimumValue;\r
2132 UINT16 Resolution;\r
2133 UINT16 Tolerance;\r
2134 UINT16 Accuracy;\r
2135 UINT32 OEMDefined;\r
2136 UINT16 NominalValue;\r
61ce5861 2137} SMBIOS_TABLE_TYPE26;\r
2138\r
98cb9ae8 2139///\r
af2dc6a7 2140/// Cooling Device - Device Type and Status.\r
98cb9ae8 2141///\r
2142typedef struct {\r
2143 UINT8 CoolingDevice :5;\r
2144 UINT8 CoolingDeviceStatus :3;\r
2145} MISC_COOLING_DEVICE_TYPE;\r
2146\r
4135253b 2147///\r
2148/// Cooling Device (Type 27)\r
2149///\r
9095d37b
LG		 2150/// This structure describes the attributes for a cooling device in the system.\r
2151/// Each structure describes a single cooling device.\r
2152///\r
61ce5861 2153typedef struct {\r
98cb9ae8 2154 SMBIOS_STRUCTURE Hdr;\r
2155 UINT16 TemperatureProbeHandle;\r
2156 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
2157 UINT8 CoolingUnitGroup;\r
2158 UINT32 OEMDefined;\r
2159 UINT16 NominalSpeed;\r
7ddba202
SZ		 2160 //\r
2161 // Add for smbios 2.7\r
2162 //\r
2163 SMBIOS_TABLE_STRING Description;\r
61ce5861 2164} SMBIOS_TABLE_TYPE27;\r
2165\r
98cb9ae8 2166///\r
af2dc6a7 2167/// Temperature Probe - Location and Status.\r
98cb9ae8 2168///\r
2169typedef struct {\r
2170 UINT8 TemperatureProbeSite :5;\r
2171 UINT8 TemperatureProbeStatus :3;\r
2172} MISC_TEMPERATURE_PROBE_LOCATION;\r
2173\r
4135253b 2174///\r
af2dc6a7 2175/// Temperature Probe (Type 28).\r
4135253b 2176///\r
9095d37b
LG		 2177/// This structure describes the attributes for a temperature probe in the system.\r
2178/// Each structure describes a single temperature probe.\r
98cb9ae8 2179///\r
61ce5861 2180typedef struct {\r
98cb9ae8 2181 SMBIOS_STRUCTURE Hdr;\r
2182 SMBIOS_TABLE_STRING Description;\r
2183 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
2184 UINT16 MaximumValue;\r
2185 UINT16 MinimumValue;\r
2186 UINT16 Resolution;\r
2187 UINT16 Tolerance;\r
2188 UINT16 Accuracy;\r
2189 UINT32 OEMDefined;\r
2190 UINT16 NominalValue;\r
61ce5861 2191} SMBIOS_TABLE_TYPE28;\r
2192\r
98cb9ae8 2193///\r
af2dc6a7 2194/// Electrical Current Probe - Location and Status.\r
98cb9ae8 2195///\r
2196typedef struct {\r
2197 UINT8 ElectricalCurrentProbeSite :5;\r
2198 UINT8 ElectricalCurrentProbeStatus :3;\r
2199} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2200\r
4135253b 2201///\r
af2dc6a7 2202/// Electrical Current Probe (Type 29).\r
4135253b 2203///\r
98cb9ae8 2204/// This structure describes the attributes for an electrical current probe in the system.\r
9095d37b 2205/// Each structure describes a single electrical current probe.\r
98cb9ae8 2206///\r
61ce5861 2207typedef struct {\r
98cb9ae8 2208 SMBIOS_STRUCTURE Hdr;\r
2209 SMBIOS_TABLE_STRING Description;\r
2210 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2211 UINT16 MaximumValue;\r
2212 UINT16 MinimumValue;\r
2213 UINT16 Resolution;\r
2214 UINT16 Tolerance;\r
2215 UINT16 Accuracy;\r
2216 UINT32 OEMDefined;\r
2217 UINT16 NominalValue;\r
61ce5861 2218} SMBIOS_TABLE_TYPE29;\r
2219\r
4135253b 2220///\r
af2dc6a7 2221/// Out-of-Band Remote Access (Type 30).\r
4135253b 2222///\r
9095d37b
LG		 2223/// This structure describes the attributes and policy settings of a hardware facility\r
2224/// that may be used to gain remote access to a hardware system when the operating system\r
2225/// is not available due to power-down status, hardware failures, or boot failures.\r
98cb9ae8 2226///\r
61ce5861 2227typedef struct {\r
2228 SMBIOS_STRUCTURE Hdr;\r
2229 SMBIOS_TABLE_STRING ManufacturerName;\r
2230 UINT8 Connections;\r
2231} SMBIOS_TABLE_TYPE30;\r
2232\r
4135253b 2233///\r
af2dc6a7 2234/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 2235///\r
9095d37b
LG		 2236/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r
2237///\r
61ce5861 2238typedef struct {\r
2239 SMBIOS_STRUCTURE Hdr;\r
2240 UINT8 Checksum;\r
2241 UINT8 Reserved1;\r
2242 UINT16 Reserved2;\r
2243 UINT32 BisEntry16;\r
2244 UINT32 BisEntry32;\r
2245 UINT64 Reserved3;\r
2246 UINT32 Reserved4;\r
2247} SMBIOS_TABLE_TYPE31;\r
2248\r
98cb9ae8 2249///\r
af2dc6a7 2250/// System Boot Information - System Boot Status.\r
98cb9ae8 2251///\r
2252typedef enum {\r
2253 BootInformationStatusNoError = 0x00,\r
2254 BootInformationStatusNoBootableMedia = 0x01,\r
2255 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2256 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2257 BootInformationStatusOSDetectedFailure = 0x04,\r
2258 BootInformationStatusUserRequestedBoot = 0x05,\r
2259 BootInformationStatusSystemSecurityViolation = 0x06,\r
2260 BootInformationStatusPreviousRequestedImage = 0x07,\r
2261 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2262 BootInformationStatusStartReserved = 0x09,\r
2263 BootInformationStatusStartOemSpecific = 0x80,\r
2264 BootInformationStatusStartProductSpecific = 0xC0\r
2265} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2266\r
4135253b 2267///\r
af2dc6a7 2268/// System Boot Information (Type 32).\r
4135253b 2269///\r
9095d37b
LG		 2270/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r
2271/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r
2272/// application via this structure. When used in the PXE environment, for example,\r
2273/// this code identifies the reason the PXE was initiated and can be used by boot-image\r
2274/// software to further automate an enterprise's PXE sessions. For example, an enterprise\r
2275/// could choose to automatically download a hardware-diagnostic image to a client whose\r
98cb9ae8 2276/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2277///\r
61ce5861 2278typedef struct {\r
98cb9ae8 2279 SMBIOS_STRUCTURE Hdr;\r
2280 UINT8 Reserved[6];\r
af2dc6a7 2281 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 2282} SMBIOS_TABLE_TYPE32;\r
2283\r
4135253b 2284///\r
af2dc6a7 2285/// 64-bit Memory Error Information (Type 33).\r
4135253b 2286///\r
9095d37b 2287/// This structure describes an error within a Physical Memory Array,\r
98cb9ae8 2288/// when the error address is above 4G (0xFFFFFFFF).\r
9095d37b 2289///\r
61ce5861 2290typedef struct {\r
98cb9ae8 2291 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2292 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2293 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2294 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 2295 UINT32 VendorSyndrome;\r
2296 UINT64 MemoryArrayErrorAddress;\r
2297 UINT64 DeviceErrorAddress;\r
2298 UINT32 ErrorResolution;\r
61ce5861 2299} SMBIOS_TABLE_TYPE33;\r
2300\r
98cb9ae8 2301///\r
9095d37b 2302/// Management Device - Type.\r
98cb9ae8 2303///\r
2304typedef enum {\r
2305 ManagementDeviceTypeOther = 0x01,\r
2306 ManagementDeviceTypeUnknown = 0x02,\r
2307 ManagementDeviceTypeLm75 = 0x03,\r
2308 ManagementDeviceTypeLm78 = 0x04,\r
2309 ManagementDeviceTypeLm79 = 0x05,\r
2310 ManagementDeviceTypeLm80 = 0x06,\r
2311 ManagementDeviceTypeLm81 = 0x07,\r
2312 ManagementDeviceTypeAdm9240 = 0x08,\r
2313 ManagementDeviceTypeDs1780 = 0x09,\r
2314 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2315 ManagementDeviceTypeGl518Sm = 0x0B,\r
2316 ManagementDeviceTypeW83781D = 0x0C,\r
2317 ManagementDeviceTypeHt82H791 = 0x0D\r
2318} MISC_MANAGEMENT_DEVICE_TYPE;\r
2319\r
2320///\r
9095d37b 2321/// Management Device - Address Type.\r
98cb9ae8 2322///\r
2323typedef enum {\r
2324 ManagementDeviceAddressTypeOther = 0x01,\r
2325 ManagementDeviceAddressTypeUnknown = 0x02,\r
2326 ManagementDeviceAddressTypeIOPort = 0x03,\r
2327 ManagementDeviceAddressTypeMemory = 0x04,\r
2328 ManagementDeviceAddressTypeSmbus = 0x05\r
2329} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2330\r
4135253b 2331///\r
af2dc6a7 2332/// Management Device (Type 34).\r
4135253b 2333///\r
9095d37b 2334/// The information in this structure defines the attributes of a Management Device.\r
98cb9ae8 2335/// A Management Device might control one or more fans or voltage, current, or temperature\r
2336/// probes as defined by one or more Management Device Component structures.\r
2337///\r
61ce5861 2338typedef struct {\r
98cb9ae8 2339 SMBIOS_STRUCTURE Hdr;\r
2340 SMBIOS_TABLE_STRING Description;\r
af2dc6a7 2341 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
98cb9ae8 2342 UINT32 Address;\r
af2dc6a7 2343 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 2344} SMBIOS_TABLE_TYPE34;\r
2345\r
4135253b 2346///\r
2347/// Management Device Component (Type 35)\r
2348///\r
9095d37b
LG		 2349/// This structure associates a cooling device or environmental probe with structures\r
2350/// that define the controlling hardware device and (optionally) the component's thresholds.\r
98cb9ae8 2351///\r
61ce5861 2352typedef struct {\r
2353 SMBIOS_STRUCTURE Hdr;\r
2354 SMBIOS_TABLE_STRING Description;\r
2355 UINT16 ManagementDeviceHandle;\r
2356 UINT16 ComponentHandle;\r
2357 UINT16 ThresholdHandle;\r
2358} SMBIOS_TABLE_TYPE35;\r
2359\r
4135253b 2360///\r
af2dc6a7 2361/// Management Device Threshold Data (Type 36).\r
4135253b 2362///\r
9095d37b
LG		 2363/// The information in this structure defines threshold information for\r
2364/// a component (probe or cooling-unit) contained within a Management Device.\r
98cb9ae8 2365///\r
61ce5861 2366typedef struct {\r
2367 SMBIOS_STRUCTURE Hdr;\r
2368 UINT16 LowerThresholdNonCritical;\r
2369 UINT16 UpperThresholdNonCritical;\r
2370 UINT16 LowerThresholdCritical;\r
2371 UINT16 UpperThresholdCritical;\r
2372 UINT16 LowerThresholdNonRecoverable;\r
2373 UINT16 UpperThresholdNonRecoverable;\r
2374} SMBIOS_TABLE_TYPE36;\r
2375\r
bf7ea009 2376///\r
af2dc6a7 2377/// Memory Channel Entry.\r
bf7ea009 2378///\r
61ce5861 2379typedef struct {\r
2380 UINT8 DeviceLoad;\r
2381 UINT16 DeviceHandle;\r
2382} MEMORY_DEVICE;\r
2383\r
98cb9ae8 2384///\r
af2dc6a7 2385/// Memory Channel - Channel Type.\r
98cb9ae8 2386///\r
2387typedef enum {\r
2388 MemoryChannelTypeOther = 0x01,\r
2389 MemoryChannelTypeUnknown = 0x02,\r
2390 MemoryChannelTypeRambus = 0x03,\r
2391 MemoryChannelTypeSyncLink = 0x04\r
2392} MEMORY_CHANNEL_TYPE;\r
2393\r
4135253b 2394///\r
2395/// Memory Channel (Type 37)\r
2396///\r
98cb9ae8 2397/// The information in this structure provides the correlation between a Memory Channel\r
9095d37b 2398/// and its associated Memory Devices. Each device presents one or more loads to the channel.\r
af2dc6a7 2399/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 2400///\r
61ce5861 2401typedef struct {\r
2402 SMBIOS_STRUCTURE Hdr;\r
2403 UINT8 ChannelType;\r
2404 UINT8 MaximumChannelLoad;\r
2405 UINT8 MemoryDeviceCount;\r
2406 MEMORY_DEVICE MemoryDevice[1];\r
2407} SMBIOS_TABLE_TYPE37;\r
2408\r
98cb9ae8 2409///\r
2410/// IPMI Device Information - BMC Interface Type\r
2411///\r
2412typedef enum {\r
2413 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
af2dc6a7 2414 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2415 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2416 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
cfcca3c2 2417 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface\r
98cb9ae8 2418} BMC_INTERFACE_TYPE;\r
2419\r
4135253b 2420///\r
af2dc6a7 2421/// IPMI Device Information (Type 38).\r
4135253b 2422///\r
7ddba202 2423/// The information in this structure defines the attributes of an\r
98cb9ae8 2424/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
7ddba202
SZ		 2425///\r
2426/// The Type 42 structure can also be used to describe a physical management controller\r
2427/// host interface and one or more protocols that share that interface. If IPMI is not\r
2428/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2429/// Providing Type 38 is recommended for backward compatibility.\r
2430///\r
61ce5861 2431typedef struct {\r
2432 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2433 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
61ce5861 2434 UINT8 IPMISpecificationRevision;\r
2435 UINT8 I2CSlaveAddress;\r
2436 UINT8 NVStorageDeviceAddress;\r
2437 UINT64 BaseAddress;\r
2438 UINT8 BaseAddressModifier_InterruptInfo;\r
2439 UINT8 InterruptNumber;\r
2440} SMBIOS_TABLE_TYPE38;\r
2441\r
98cb9ae8 2442///\r
af2dc6a7 2443/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 2444///\r
2445typedef struct {\r
2446 UINT16 PowerSupplyHotReplaceable:1;\r
2447 UINT16 PowerSupplyPresent :1;\r
2448 UINT16 PowerSupplyUnplugged :1;\r
2449 UINT16 InputVoltageRangeSwitch :4;\r
2450 UINT16 PowerSupplyStatus :3;\r
2451 UINT16 PowerSupplyType :4;\r
2452 UINT16 Reserved :2;\r
2453} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2454\r
4135253b 2455///\r
af2dc6a7 2456/// System Power Supply (Type 39).\r
4135253b 2457///\r
7ddba202
SZ		 2458/// This structure identifies attributes of a system power supply. One instance\r
2459/// of this record is present for each possible power supply in a system.\r
98cb9ae8 2460///\r
61ce5861 2461typedef struct {\r
98cb9ae8 2462 SMBIOS_STRUCTURE Hdr;\r
2463 UINT8 PowerUnitGroup;\r
2464 SMBIOS_TABLE_STRING Location;\r
2465 SMBIOS_TABLE_STRING DeviceName;\r
2466 SMBIOS_TABLE_STRING Manufacturer;\r
2467 SMBIOS_TABLE_STRING SerialNumber;\r
2468 SMBIOS_TABLE_STRING AssetTagNumber;\r
2469 SMBIOS_TABLE_STRING ModelPartNumber;\r
2470 SMBIOS_TABLE_STRING RevisionLevel;\r
2471 UINT16 MaxPowerCapacity;\r
2472 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2473 UINT16 InputVoltageProbeHandle;\r
2474 UINT16 CoolingDeviceHandle;\r
2475 UINT16 InputCurrentProbeHandle;\r
61ce5861 2476} SMBIOS_TABLE_TYPE39;\r
2477\r
bf7ea009 2478///\r
9095d37b 2479/// Additional Information Entry Format.\r
bf7ea009 2480///\r
9095d37b
LG		 2481typedef struct {\r
2482 UINT8 EntryLength;\r
61ce5861 2483 UINT16 ReferencedHandle;\r
2484 UINT8 ReferencedOffset;\r
2485 SMBIOS_TABLE_STRING EntryString;\r
2486 UINT8 Value[1];\r
cfcca3c2 2487} ADDITIONAL_INFORMATION_ENTRY;\r
61ce5861 2488\r
4135253b 2489///\r
af2dc6a7 2490/// Additional Information (Type 40).\r
4135253b 2491///\r
9095d37b
LG		 2492/// This structure is intended to provide additional information for handling unspecified\r
2493/// enumerated values and interim field updates in another structure.\r
98cb9ae8 2494///\r
61ce5861 2495typedef struct {\r
2496 SMBIOS_STRUCTURE Hdr;\r
2497 UINT8 NumberOfAdditionalInformationEntries;\r
9095d37b 2498 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r
61ce5861 2499} SMBIOS_TABLE_TYPE40;\r
2500\r
98cb9ae8 2501///\r
af2dc6a7 2502/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2503///\r
2504typedef enum{\r
2505 OnBoardDeviceExtendedTypeOther = 0x01,\r
2506 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2507 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2508 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2509 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2510 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2511 OnBoardDeviceExtendedTypeSound = 0x07,\r
2512 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2513 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2514 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2515} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2516\r
4135253b 2517///\r
af2dc6a7 2518/// Onboard Devices Extended Information (Type 41).\r
4135253b 2519///\r
9095d37b
LG		 2520/// The information in this structure defines the attributes of devices that\r
2521/// are onboard (soldered onto) a system element, usually the baseboard.\r
2522/// In general, an entry in this table implies that the BIOS has some level of\r
2523/// control over the enabling of the associated device for use by the system.\r
98cb9ae8 2524///\r
61ce5861 2525typedef struct {\r
98cb9ae8 2526 SMBIOS_STRUCTURE Hdr;\r
2527 SMBIOS_TABLE_STRING ReferenceDesignation;\r
af2dc6a7 2528 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2529 UINT8 DeviceTypeInstance;\r
2530 UINT16 SegmentGroupNum;\r
2531 UINT8 BusNum;\r
7ddba202 2532 UINT8 DevFuncNum;\r
61ce5861 2533} SMBIOS_TABLE_TYPE41;\r
2534\r
78ab44cb
AC		 2535///\r
2536/// Management Controller Host Interface - Protocol Record Data Format.\r
2537///\r
2538typedef struct {\r
2539 UINT8 ProtocolType;\r
2540 UINT8 ProtocolTypeDataLen;\r
2541 UINT8 ProtocolTypeData[1];\r
2542} MC_HOST_INTERFACE_PROTOCOL_RECORD;\r
2543\r
043026ac
SZ		 2544///\r
2545/// Management Controller Host Interface - Interface Types.\r
2546/// 00h - 3Fh: MCTP Host Interfaces\r
2547///\r
2548typedef enum{\r
2549 MCHostInterfaceTypeNetworkHostInterface = 0x40,\r
2550 MCHostInterfaceTypeOemDefined = 0xF0\r
2551} MC_HOST_INTERFACE_TYPE;\r
2552\r
2553///\r
2554/// Management Controller Host Interface - Protocol Types.\r
2555///\r
2556typedef enum{\r
2557 MCHostInterfaceProtocolTypeIPMI = 0x02,\r
2558 MCHostInterfaceProtocolTypeMCTP = 0x03,\r
2559 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r
2560 MCHostInterfaceProtocolTypeOemDefined = 0xF0\r
2561} MC_HOST_INTERFACE_PROTOCOL_TYPE;\r
2562\r
7ddba202
SZ		 2563///\r
2564/// Management Controller Host Interface (Type 42).\r
2565///\r
2566/// The information in this structure defines the attributes of a Management\r
2567/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2568///\r
2569/// Type 42 should be used for management controller host interfaces that use protocols\r
2570/// other than IPMI or that use multiple protocols on a single host interface type.\r
2571///\r
2572/// This structure should also be provided if IPMI is shared with other protocols\r
2573/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2574/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2575/// recommended for backward compatibility. The structures are not required to\r
2576/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2577/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2578/// that do not yet recognize the Type 42 structure.\r
2579///\r
2580typedef struct {\r
2581 SMBIOS_STRUCTURE Hdr;\r
cfcca3c2
SZ		 2582 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r
2583 UINT8 InterfaceTypeSpecificDataLength;\r
2584 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes\r
7ddba202
SZ		 2585} SMBIOS_TABLE_TYPE42;\r
2586\r
f06c92a6
AC		 2587\r
2588///\r
2589/// Processor Specific Block - Processor Architecture Type\r
2590///\r
2591typedef enum{\r
2592 ProcessorSpecificBlockArchTypeReserved = 0x00,\r
2593 ProcessorSpecificBlockArchTypeIa32 = 0x01,\r
2594 ProcessorSpecificBlockArchTypeX64 = 0x02,\r
2595 ProcessorSpecificBlockArchTypeItanium = 0x03,\r
2596 ProcessorSpecificBlockArchTypeAarch32 = 0x04,\r
2597 ProcessorSpecificBlockArchTypeAarch64 = 0x05,\r
2598 ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,\r
2599 ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,\r
2600 ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08\r
2601} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;\r
2602\r
2603///\r
2604/// Processor Specific Block is the standard container of processor-specific data.\r
2605///\r
2606typedef struct {\r
2607 UINT8 Length;\r
2608 UINT8 ProcessorArchType;\r
2609 ///\r
2610 /// Below followed by Processor-specific data\r
2611 ///\r
2612 ///\r
2613} PROCESSOR_SPECIFIC_BLOCK;\r
2614\r
2615///\r
2616/// Processor Additional Information(Type 44).\r
2617///\r
2618/// The information in this structure defines the processor additional information in case\r
2619/// SMBIOS type 4 is not sufficient to describe processor characteristics.\r
2620/// The SMBIOS type 44 structure has a reference handle field to link back to the related\r
2621/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the\r
2622/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,\r
2623/// SMBIOS type 44 structures describe different core-specific information.\r
2624///\r
2625/// SMBIOS type 44 defines the standard header for the processor-specific block, while the\r
2626/// contents of processor-specific data are maintained by processor\r
2627/// architecture workgroups or vendors in separate documents.\r
2628///\r
2629typedef struct {\r
2630 SMBIOS_STRUCTURE Hdr;\r
2631 SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4\r
2632 ///\r
2633 /// Below followed by Processor-specific block\r
2634 ///\r
2635 PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;\r
2636} SMBIOS_TABLE_TYPE44;\r
2637\r
713e4b00
LA		 2638///\r
2639/// TPM Device (Type 43).\r
2640///\r
2641typedef struct {\r
2642 SMBIOS_STRUCTURE Hdr;\r
2643 UINT8 VendorID[4];\r
2644 UINT8 MajorSpecVersion;\r
2645 UINT8 MinorSpecVersion;\r
2646 UINT32 FirmwareVersion1;\r
2647 UINT32 FirmwareVersion2;\r
2648 SMBIOS_TABLE_STRING Description;\r
2649 UINT64 Characteristics;\r
2650 UINT32 OemDefined;\r
2651} SMBIOS_TABLE_TYPE43;\r
2652\r
4135253b 2653///\r
2654/// Inactive (Type 126)\r
2655///\r
61ce5861 2656typedef struct {\r
2657 SMBIOS_STRUCTURE Hdr;\r
2658} SMBIOS_TABLE_TYPE126;\r
2659\r
4135253b 2660///\r
2661/// End-of-Table (Type 127)\r
2662///\r
61ce5861 2663typedef struct {\r
2664 SMBIOS_STRUCTURE Hdr;\r
2665} SMBIOS_TABLE_TYPE127;\r
2666\r
4135253b 2667///\r
af2dc6a7 2668/// Union of all the possible SMBIOS record types.\r
4135253b 2669///\r
61ce5861 2670typedef union {\r
2671 SMBIOS_STRUCTURE *Hdr;\r
2672 SMBIOS_TABLE_TYPE0 *Type0;\r
2673 SMBIOS_TABLE_TYPE1 *Type1;\r
2674 SMBIOS_TABLE_TYPE2 *Type2;\r
2675 SMBIOS_TABLE_TYPE3 *Type3;\r
2676 SMBIOS_TABLE_TYPE4 *Type4;\r
2677 SMBIOS_TABLE_TYPE5 *Type5;\r
2678 SMBIOS_TABLE_TYPE6 *Type6;\r
2679 SMBIOS_TABLE_TYPE7 *Type7;\r
2680 SMBIOS_TABLE_TYPE8 *Type8;\r
2681 SMBIOS_TABLE_TYPE9 *Type9;\r
2682 SMBIOS_TABLE_TYPE10 *Type10;\r
2683 SMBIOS_TABLE_TYPE11 *Type11;\r
2684 SMBIOS_TABLE_TYPE12 *Type12;\r
2685 SMBIOS_TABLE_TYPE13 *Type13;\r
2686 SMBIOS_TABLE_TYPE14 *Type14;\r
2687 SMBIOS_TABLE_TYPE15 *Type15;\r
2688 SMBIOS_TABLE_TYPE16 *Type16;\r
2689 SMBIOS_TABLE_TYPE17 *Type17;\r
2690 SMBIOS_TABLE_TYPE18 *Type18;\r
2691 SMBIOS_TABLE_TYPE19 *Type19;\r
2692 SMBIOS_TABLE_TYPE20 *Type20;\r
2693 SMBIOS_TABLE_TYPE21 *Type21;\r
2694 SMBIOS_TABLE_TYPE22 *Type22;\r
2695 SMBIOS_TABLE_TYPE23 *Type23;\r
2696 SMBIOS_TABLE_TYPE24 *Type24;\r
2697 SMBIOS_TABLE_TYPE25 *Type25;\r
2698 SMBIOS_TABLE_TYPE26 *Type26;\r
2699 SMBIOS_TABLE_TYPE27 *Type27;\r
2700 SMBIOS_TABLE_TYPE28 *Type28;\r
2701 SMBIOS_TABLE_TYPE29 *Type29;\r
2702 SMBIOS_TABLE_TYPE30 *Type30;\r
2703 SMBIOS_TABLE_TYPE31 *Type31;\r
2704 SMBIOS_TABLE_TYPE32 *Type32;\r
2705 SMBIOS_TABLE_TYPE33 *Type33;\r
2706 SMBIOS_TABLE_TYPE34 *Type34;\r
2707 SMBIOS_TABLE_TYPE35 *Type35;\r
2708 SMBIOS_TABLE_TYPE36 *Type36;\r
2709 SMBIOS_TABLE_TYPE37 *Type37;\r
2710 SMBIOS_TABLE_TYPE38 *Type38;\r
2711 SMBIOS_TABLE_TYPE39 *Type39;\r
2712 SMBIOS_TABLE_TYPE40 *Type40;\r
2713 SMBIOS_TABLE_TYPE41 *Type41;\r
884f9295 2714 SMBIOS_TABLE_TYPE42 *Type42;\r
713e4b00 2715 SMBIOS_TABLE_TYPE43 *Type43;\r
f06c92a6 2716 SMBIOS_TABLE_TYPE44 *Type44;\r
61ce5861 2717 SMBIOS_TABLE_TYPE126 *Type126;\r
2718 SMBIOS_TABLE_TYPE127 *Type127;\r
2719 UINT8 *Raw;\r
2720} SMBIOS_STRUCTURE_POINTER;\r
2721\r
766f4bc1 2722#pragma pack()\r
2723\r
a7ed1e2e 2724#endif\r
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