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MdePkg: Add definitions for SMBIOS spec 3.1.0
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
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a7ed1e2e 1/** @file\r
ff6a1f32 2 Industry Standard Definitions of SMBIOS Table Specification v3.1.0.\r
a7ed1e2e 3\r
ff6a1f32 4Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
713e4b00 5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
af2dc6a7 6This program and the accompanying materials are licensed and made available under \r
7the terms and conditions of the BSD License that accompanies this distribution. \r
8The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php. \r
10 \r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
a7ed1e2e 13\r
a7ed1e2e 14**/\r
15\r
16#ifndef __SMBIOS_STANDARD_H__\r
17#define __SMBIOS_STANDARD_H__\r
98cb9ae8 18\r
f2d0889f 19///\r
20/// Reference SMBIOS 2.6, chapter 3.1.2.\r
21/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
22/// use by this specification.\r
23///\r
24#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
25\r
7ddba202
SZ		 26///\r
27/// Reference SMBIOS 2.7, chapter 6.1.2.\r
28/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
29/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
30/// This number is not used for any other purpose by the SMBIOS specification.\r
31///\r
32#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
33\r
f2d0889f 34///\r
af2dc6a7 35/// Reference SMBIOS 2.6, chapter 3.1.3.\r
36/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
7ddba202
SZ		 37/// Reference SMBIOS 2.7, chapter 6.1.3.\r
38/// It will have no limit on the length of each individual text string.\r
f2d0889f 39///\r
40#define SMBIOS_STRING_MAX_LENGTH 64\r
41\r
7254d134
JY		 42//\r
43// The length of the entire structure table (including all strings) must be reported\r
44// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
45// which is a WORD field limited to 65,535 bytes.\r
46//\r
47#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
48\r
49//\r
50// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
51//\r
52#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
53\r
bb7051eb
MH		 54//\r
55// SMBIOS type macros which is according to SMBIOS 2.7 specification.\r
56//\r
57#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
58#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
59#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
60#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
61#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
62#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
63#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
64#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
65#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
66#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
67#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
68#define SMBIOS_TYPE_OEM_STRINGS 11\r
69#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
70#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
71#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
72#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
73#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
74#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
75#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
76#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
77#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
78#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
79#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
80#define SMBIOS_TYPE_SYSTEM_RESET 23\r
81#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
82#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
83#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
84#define SMBIOS_TYPE_COOLING_DEVICE 27\r
85#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
86#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
87#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
88#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
89#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
90#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
91#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
92#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
93#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
94#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
95#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
96#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
97#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
98#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
99#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
713e4b00 100#define SMBIOS_TYPE_TPM_DEVICE 43\r
bb7051eb 101\r
f2d0889f 102///\r
103/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
104/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
105/// Inactive structure just like a structure type that the software does not recognize.\r
106///\r
107#define SMBIOS_TYPE_INACTIVE 0x007E \r
108\r
109///\r
110/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
111/// The end-of-table indicator is used in the last physical structure in a table\r
112///\r
113#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
114\r
bb7051eb
MH		 115#define SMBIOS_OEM_BEGIN 128\r
116#define SMBIOS_OEM_END 255\r
117\r
118///\r
119/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
120/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information. \r
121///\r
122typedef UINT8 SMBIOS_TYPE;\r
123\r
124///\r
125/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
126/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
127/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
128/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
129/// use by this specification.\r
130/// If the system configuration changes, a previously assigned handle might no longer exist.\r
131/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
132/// number to another structure.\r
133///\r
134typedef UINT16 SMBIOS_HANDLE;\r
135\r
4135253b 136///\r
af2dc6a7 137/// Smbios Table Entry Point Structure.\r
4135253b 138///\r
766f4bc1 139#pragma pack(1)\r
a7ed1e2e 140typedef struct {\r
141 UINT8 AnchorString[4];\r
142 UINT8 EntryPointStructureChecksum;\r
143 UINT8 EntryPointLength;\r
144 UINT8 MajorVersion;\r
145 UINT8 MinorVersion;\r
146 UINT16 MaxStructureSize;\r
147 UINT8 EntryPointRevision;\r
148 UINT8 FormattedArea[5];\r
149 UINT8 IntermediateAnchorString[5];\r
150 UINT8 IntermediateChecksum;\r
151 UINT16 TableLength;\r
152 UINT32 TableAddress;\r
153 UINT16 NumberOfSmbiosStructures;\r
154 UINT8 SmbiosBcdRevision;\r
155} SMBIOS_TABLE_ENTRY_POINT;\r
156\r
6cd35c62
EL		 157typedef struct {\r
158 UINT8 AnchorString[5];\r
159 UINT8 EntryPointStructureChecksum;\r
160 UINT8 EntryPointLength;\r
161 UINT8 MajorVersion;\r
162 UINT8 MinorVersion;\r
163 UINT8 DocRev;\r
164 UINT8 EntryPointRevision;\r
165 UINT8 Reserved;\r
166 UINT32 TableMaximumSize;\r
167 UINT64 TableAddress;\r
168} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
169\r
ec8432e5 170///\r
af2dc6a7 171/// The Smbios structure header.\r
ec8432e5 172///\r
a7ed1e2e 173typedef struct {\r
bb7051eb
MH		 174 SMBIOS_TYPE Type;\r
175 UINT8 Length;\r
176 SMBIOS_HANDLE Handle;\r
a7ed1e2e 177} SMBIOS_STRUCTURE;\r
178\r
bf7ea009 179///\r
bb7051eb
MH		 180/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
181/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
182/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
183/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
184/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
185/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
186/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
187/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
188/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
bf7ea009 189///\r
61ce5861 190typedef UINT8 SMBIOS_TABLE_STRING;\r
191\r
98cb9ae8 192///\r
7ddba202
SZ		 193/// BIOS Characteristics\r
194/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
98cb9ae8 195///\r
196typedef struct {\r
af2dc6a7 197 UINT32 Reserved :2; ///< Bits 0-1.\r
7ddba202
SZ		 198 UINT32 Unknown :1;\r
199 UINT32 BiosCharacteristicsNotSupported :1;\r
200 UINT32 IsaIsSupported :1;\r
98cb9ae8 201 UINT32 McaIsSupported :1;\r
202 UINT32 EisaIsSupported :1;\r
203 UINT32 PciIsSupported :1;\r
204 UINT32 PcmciaIsSupported :1;\r
205 UINT32 PlugAndPlayIsSupported :1;\r
206 UINT32 ApmIsSupported :1;\r
207 UINT32 BiosIsUpgradable :1;\r
208 UINT32 BiosShadowingAllowed :1;\r
209 UINT32 VlVesaIsSupported :1;\r
210 UINT32 EscdSupportIsAvailable :1;\r
211 UINT32 BootFromCdIsSupported :1;\r
212 UINT32 SelectableBootIsSupported :1;\r
213 UINT32 RomBiosIsSocketed :1;\r
214 UINT32 BootFromPcmciaIsSupported :1;\r
215 UINT32 EDDSpecificationIsSupported :1;\r
216 UINT32 JapaneseNecFloppyIsSupported :1;\r
217 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
218 UINT32 Floppy525_360IsSupported :1;\r
219 UINT32 Floppy525_12IsSupported :1;\r
220 UINT32 Floppy35_720IsSupported :1;\r
221 UINT32 Floppy35_288IsSupported :1;\r
222 UINT32 PrintScreenIsSupported :1;\r
223 UINT32 Keyboard8042IsSupported :1;\r
224 UINT32 SerialIsSupported :1;\r
225 UINT32 PrinterIsSupported :1;\r
226 UINT32 CgaMonoIsSupported :1;\r
227 UINT32 NecPc98 :1;\r
6800ac83 228 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
229 ///< and bits 48-63 reserved for System Vendor. \r
98cb9ae8 230} MISC_BIOS_CHARACTERISTICS;\r
231\r
232///\r
7ddba202
SZ		 233/// BIOS Characteristics Extension Byte 1.\r
234/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
235/// within the BIOS Information structure.\r
98cb9ae8 236///\r
237typedef struct {\r
238 UINT8 AcpiIsSupported :1;\r
7ddba202
SZ		 239 UINT8 UsbLegacyIsSupported :1;\r
240 UINT8 AgpIsSupported :1;\r
119c1688 241 UINT8 I2OBootIsSupported :1;\r
98cb9ae8 242 UINT8 Ls120BootIsSupported :1;\r
243 UINT8 AtapiZipDriveBootIsSupported :1;\r
244 UINT8 Boot1394IsSupported :1;\r
245 UINT8 SmartBatteryIsSupported :1;\r
246} MBCE_BIOS_RESERVED;\r
247\r
248///\r
af2dc6a7 249/// BIOS Characteristics Extension Byte 2.\r
7ddba202 250/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
98cb9ae8 251/// within the BIOS Information structure.\r
252///\r
253typedef struct {\r
254 UINT8 BiosBootSpecIsSupported :1;\r
7ddba202
SZ		 255 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
256 UINT8 TargetContentDistributionEnabled :1;\r
257 UINT8 UefiSpecificationSupported :1;\r
258 UINT8 VirtualMachineSupported :1;\r
259 UINT8 ExtensionByte2Reserved :3;\r
98cb9ae8 260} MBCE_SYSTEM_RESERVED;\r
261\r
262///\r
af2dc6a7 263/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 264///\r
265typedef struct {\r
266 MBCE_BIOS_RESERVED BiosReserved;\r
267 MBCE_SYSTEM_RESERVED SystemReserved;\r
98cb9ae8 268} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
269\r
ff6a1f32
SZ		 270///\r
271/// Extended BIOS ROM size.\r
272///\r
273typedef struct {\r
274 UINT16 Size :14;\r
275 UINT16 Unit :2;\r
276} EXTENDED_BIOS_ROM_SIZE;\r
277\r
4135253b 278///\r
af2dc6a7 279/// BIOS Information (Type 0).\r
4135253b 280///\r
61ce5861 281typedef struct {\r
98cb9ae8 282 SMBIOS_STRUCTURE Hdr;\r
283 SMBIOS_TABLE_STRING Vendor;\r
284 SMBIOS_TABLE_STRING BiosVersion;\r
285 UINT16 BiosSegment;\r
286 SMBIOS_TABLE_STRING BiosReleaseDate;\r
287 UINT8 BiosSize;\r
288 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
289 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
290 UINT8 SystemBiosMajorRelease;\r
291 UINT8 SystemBiosMinorRelease;\r
292 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
293 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
ff6a1f32
SZ		 294 //\r
295 // Add for smbios 3.1.0\r
296 //\r
297 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
61ce5861 298} SMBIOS_TABLE_TYPE0;\r
299\r
98cb9ae8 300///\r
af2dc6a7 301/// System Wake-up Type.\r
98cb9ae8 302///\r
303typedef enum { \r
304 SystemWakeupTypeReserved = 0x00,\r
305 SystemWakeupTypeOther = 0x01,\r
306 SystemWakeupTypeUnknown = 0x02,\r
307 SystemWakeupTypeApmTimer = 0x03,\r
308 SystemWakeupTypeModemRing = 0x04,\r
309 SystemWakeupTypeLanRemote = 0x05,\r
310 SystemWakeupTypePowerSwitch = 0x06,\r
311 SystemWakeupTypePciPme = 0x07,\r
312 SystemWakeupTypeAcPowerRestored = 0x08\r
313} MISC_SYSTEM_WAKEUP_TYPE;\r
314\r
4135253b 315///\r
af2dc6a7 316/// System Information (Type 1).\r
98cb9ae8 317/// \r
318/// The information in this structure defines attributes of the overall system and is \r
319/// intended to be associated with the Component ID group of the system's MIF.\r
320/// An SMBIOS implementation is associated with a single system instance and contains \r
321/// one and only one System Information (Type 1) structure.\r
4135253b 322///\r
61ce5861 323typedef struct {\r
98cb9ae8 324 SMBIOS_STRUCTURE Hdr;\r
325 SMBIOS_TABLE_STRING Manufacturer;\r
326 SMBIOS_TABLE_STRING ProductName;\r
327 SMBIOS_TABLE_STRING Version;\r
328 SMBIOS_TABLE_STRING SerialNumber;\r
329 GUID Uuid;\r
af2dc6a7 330 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
98cb9ae8 331 SMBIOS_TABLE_STRING SKUNumber;\r
332 SMBIOS_TABLE_STRING Family;\r
61ce5861 333} SMBIOS_TABLE_TYPE1;\r
334\r
98cb9ae8 335///\r
af2dc6a7 336/// Base Board - Feature Flags. \r
98cb9ae8 337///\r
338typedef struct {\r
339 UINT8 Motherboard :1;\r
340 UINT8 RequiresDaughterCard :1;\r
341 UINT8 Removable :1;\r
342 UINT8 Replaceable :1;\r
343 UINT8 HotSwappable :1;\r
344 UINT8 Reserved :3;\r
345} BASE_BOARD_FEATURE_FLAGS;\r
346\r
347///\r
af2dc6a7 348/// Base Board - Board Type.\r
98cb9ae8 349///\r
350typedef enum { \r
351 BaseBoardTypeUnknown = 0x1,\r
352 BaseBoardTypeOther = 0x2,\r
353 BaseBoardTypeServerBlade = 0x3,\r
354 BaseBoardTypeConnectivitySwitch = 0x4,\r
355 BaseBoardTypeSystemManagementModule = 0x5,\r
356 BaseBoardTypeProcessorModule = 0x6,\r
357 BaseBoardTypeIOModule = 0x7,\r
358 BaseBoardTypeMemoryModule = 0x8,\r
359 BaseBoardTypeDaughterBoard = 0x9,\r
360 BaseBoardTypeMotherBoard = 0xA,\r
361 BaseBoardTypeProcessorMemoryModule = 0xB,\r
362 BaseBoardTypeProcessorIOModule = 0xC,\r
363 BaseBoardTypeInterconnectBoard = 0xD\r
364} BASE_BOARD_TYPE;\r
365\r
4135253b 366///\r
af2dc6a7 367/// Base Board (or Module) Information (Type 2).\r
4135253b 368///\r
1f9f8414 369/// The information in this structure defines attributes of a system baseboard - \r
98cb9ae8 370/// for example a motherboard, planar, or server blade or other standard system module.\r
371///\r
61ce5861 372typedef struct {\r
98cb9ae8 373 SMBIOS_STRUCTURE Hdr;\r
374 SMBIOS_TABLE_STRING Manufacturer;\r
375 SMBIOS_TABLE_STRING ProductName;\r
376 SMBIOS_TABLE_STRING Version;\r
377 SMBIOS_TABLE_STRING SerialNumber;\r
378 SMBIOS_TABLE_STRING AssetTag;\r
379 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
380 SMBIOS_TABLE_STRING LocationInChassis;\r
381 UINT16 ChassisHandle;\r
af2dc6a7 382 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
98cb9ae8 383 UINT8 NumberOfContainedObjectHandles;\r
384 UINT16 ContainedObjectHandles[1];\r
61ce5861 385} SMBIOS_TABLE_TYPE2;\r
386\r
98cb9ae8 387///\r
388/// System Enclosure or Chassis Types\r
389///\r
390typedef enum { \r
391 MiscChassisTypeOther = 0x01,\r
392 MiscChassisTypeUnknown = 0x02,\r
393 MiscChassisTypeDeskTop = 0x03,\r
394 MiscChassisTypeLowProfileDesktop = 0x04,\r
395 MiscChassisTypePizzaBox = 0x05,\r
396 MiscChassisTypeMiniTower = 0x06,\r
397 MiscChassisTypeTower = 0x07,\r
398 MiscChassisTypePortable = 0x08,\r
399 MiscChassisTypeLapTop = 0x09,\r
400 MiscChassisTypeNotebook = 0x0A,\r
401 MiscChassisTypeHandHeld = 0x0B,\r
402 MiscChassisTypeDockingStation = 0x0C,\r
403 MiscChassisTypeAllInOne = 0x0D,\r
404 MiscChassisTypeSubNotebook = 0x0E,\r
405 MiscChassisTypeSpaceSaving = 0x0F,\r
406 MiscChassisTypeLunchBox = 0x10,\r
407 MiscChassisTypeMainServerChassis = 0x11,\r
408 MiscChassisTypeExpansionChassis = 0x12,\r
409 MiscChassisTypeSubChassis = 0x13,\r
410 MiscChassisTypeBusExpansionChassis = 0x14,\r
411 MiscChassisTypePeripheralChassis = 0x15,\r
412 MiscChassisTypeRaidChassis = 0x16,\r
413 MiscChassisTypeRackMountChassis = 0x17,\r
414 MiscChassisTypeSealedCasePc = 0x18,\r
415 MiscChassisMultiSystemChassis = 0x19,\r
416 MiscChassisCompactPCI = 0x1A,\r
417 MiscChassisAdvancedTCA = 0x1B,\r
418 MiscChassisBlade = 0x1C,\r
6cd35c62
EL		 419 MiscChassisBladeEnclosure = 0x1D,\r
420 MiscChassisTablet = 0x1E,\r
421 MiscChassisConvertible = 0x1F,\r
ff6a1f32
SZ		 422 MiscChassisDetachable = 0x20,\r
423 MiscChassisIoTGateway = 0x21,\r
424 MiscChassisEmbeddedPc = 0x22,\r
425 MiscChassisMiniPc = 0x23,\r
426 MiscChassisStickPc = 0x24\r
98cb9ae8 427} MISC_CHASSIS_TYPE;\r
428\r
429///\r
af2dc6a7 430/// System Enclosure or Chassis States .\r
98cb9ae8 431///\r
432typedef enum { \r
433 ChassisStateOther = 0x01,\r
434 ChassisStateUnknown = 0x02,\r
435 ChassisStateSafe = 0x03,\r
436 ChassisStateWarning = 0x04,\r
437 ChassisStateCritical = 0x05,\r
438 ChassisStateNonRecoverable = 0x06\r
439} MISC_CHASSIS_STATE;\r
440\r
441///\r
af2dc6a7 442/// System Enclosure or Chassis Security Status.\r
98cb9ae8 443///\r
444typedef enum { \r
445 ChassisSecurityStatusOther = 0x01,\r
446 ChassisSecurityStatusUnknown = 0x02,\r
447 ChassisSecurityStatusNone = 0x03,\r
448 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
449 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
450} MISC_CHASSIS_SECURITY_STATE;\r
451\r
bf7ea009 452///\r
453/// Contained Element record\r
454///\r
61ce5861 455typedef struct {\r
456 UINT8 ContainedElementType;\r
457 UINT8 ContainedElementMinimum;\r
458 UINT8 ContainedElementMaximum;\r
459} CONTAINED_ELEMENT;\r
460\r
98cb9ae8 461\r
4135253b 462///\r
af2dc6a7 463/// System Enclosure or Chassis (Type 3).\r
4135253b 464///\r
98cb9ae8 465/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
466/// For example, if a system included a separate enclosure for its peripheral devices, \r
467/// two structures would be returned: one for the main, system enclosure and the second for\r
468/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
469/// support the population of the CIM_Chassis class. \r
470///\r
61ce5861 471typedef struct {\r
98cb9ae8 472 SMBIOS_STRUCTURE Hdr;\r
473 SMBIOS_TABLE_STRING Manufacturer;\r
474 UINT8 Type;\r
475 SMBIOS_TABLE_STRING Version;\r
476 SMBIOS_TABLE_STRING SerialNumber;\r
477 SMBIOS_TABLE_STRING AssetTag;\r
af2dc6a7 478 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
479 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
480 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
481 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
98cb9ae8 482 UINT8 OemDefined[4];\r
483 UINT8 Height;\r
484 UINT8 NumberofPowerCords;\r
485 UINT8 ContainedElementCount;\r
486 UINT8 ContainedElementRecordLength;\r
f15908aa
CP		 487 //\r
488 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
489 //\r
98cb9ae8 490 CONTAINED_ELEMENT ContainedElements[1];\r
f15908aa
CP		 491 //\r
492 // Add for smbios 2.7\r
493 //\r
494 // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
495 // the structure. Need to reference it by starting at offset 0x15 and adding\r
496 // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
497 //\r
498 // SMBIOS_TABLE_STRING SKUNumber;\r
61ce5861 499} SMBIOS_TABLE_TYPE3;\r
500\r
98cb9ae8 501///\r
af2dc6a7 502/// Processor Information - Processor Type.\r
98cb9ae8 503///\r
504typedef enum {\r
505 ProcessorOther = 0x01,\r
506 ProcessorUnknown = 0x02,\r
507 CentralProcessor = 0x03,\r
508 MathProcessor = 0x04,\r
509 DspProcessor = 0x05,\r
510 VideoProcessor = 0x06\r
511} PROCESSOR_TYPE_DATA;\r
512\r
513///\r
af2dc6a7 514/// Processor Information - Processor Family.\r
98cb9ae8 515///\r
516typedef enum {\r
517 ProcessorFamilyOther = 0x01, \r
518 ProcessorFamilyUnknown = 0x02,\r
519 ProcessorFamily8086 = 0x03, \r
520 ProcessorFamily80286 = 0x04,\r
521 ProcessorFamilyIntel386 = 0x05, \r
522 ProcessorFamilyIntel486 = 0x06,\r
523 ProcessorFamily8087 = 0x07,\r
524 ProcessorFamily80287 = 0x08,\r
525 ProcessorFamily80387 = 0x09, \r
526 ProcessorFamily80487 = 0x0A,\r
527 ProcessorFamilyPentium = 0x0B, \r
528 ProcessorFamilyPentiumPro = 0x0C,\r
529 ProcessorFamilyPentiumII = 0x0D,\r
530 ProcessorFamilyPentiumMMX = 0x0E,\r
531 ProcessorFamilyCeleron = 0x0F,\r
532 ProcessorFamilyPentiumIIXeon = 0x10,\r
533 ProcessorFamilyPentiumIII = 0x11, \r
534 ProcessorFamilyM1 = 0x12,\r
535 ProcessorFamilyM2 = 0x13,\r
119c1688
SZ		 536 ProcessorFamilyIntelCeleronM = 0x14,\r
537 ProcessorFamilyIntelPentium4Ht = 0x15,\r
98cb9ae8 538 ProcessorFamilyAmdDuron = 0x18,\r
539 ProcessorFamilyK5 = 0x19, \r
540 ProcessorFamilyK6 = 0x1A,\r
541 ProcessorFamilyK6_2 = 0x1B,\r
542 ProcessorFamilyK6_3 = 0x1C,\r
543 ProcessorFamilyAmdAthlon = 0x1D,\r
544 ProcessorFamilyAmd29000 = 0x1E,\r
545 ProcessorFamilyK6_2Plus = 0x1F,\r
546 ProcessorFamilyPowerPC = 0x20,\r
547 ProcessorFamilyPowerPC601 = 0x21,\r
548 ProcessorFamilyPowerPC603 = 0x22,\r
549 ProcessorFamilyPowerPC603Plus = 0x23,\r
550 ProcessorFamilyPowerPC604 = 0x24,\r
551 ProcessorFamilyPowerPC620 = 0x25,\r
552 ProcessorFamilyPowerPCx704 = 0x26,\r
553 ProcessorFamilyPowerPC750 = 0x27,\r
3507ab19 554 ProcessorFamilyIntelCoreDuo = 0x28,\r
555 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
556 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
557 ProcessorFamilyIntelAtom = 0x2B,\r
6cd35c62 558 ProcessorFamilyIntelCoreM = 0x2C,\r
ff6a1f32
SZ		 559 ProcessorFamilyIntelCorem3 = 0x2D,\r
560 ProcessorFamilyIntelCorem5 = 0x2E,\r
561 ProcessorFamilyIntelCorem7 = 0x2F,\r
4a228334 562 ProcessorFamilyAlpha = 0x30,\r
98cb9ae8 563 ProcessorFamilyAlpha21064 = 0x31,\r
564 ProcessorFamilyAlpha21066 = 0x32,\r
565 ProcessorFamilyAlpha21164 = 0x33,\r
566 ProcessorFamilyAlpha21164PC = 0x34,\r
567 ProcessorFamilyAlpha21164a = 0x35,\r
568 ProcessorFamilyAlpha21264 = 0x36,\r
569 ProcessorFamilyAlpha21364 = 0x37,\r
7ddba202
SZ		 570 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
571 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
572 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
573 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
574 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
575 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
576 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
4a228334 577 ProcessorFamilyAmdFxSeries = 0x3F,\r
98cb9ae8 578 ProcessorFamilyMips = 0x40,\r
579 ProcessorFamilyMIPSR4000 = 0x41,\r
580 ProcessorFamilyMIPSR4200 = 0x42,\r
581 ProcessorFamilyMIPSR4400 = 0x43,\r
582 ProcessorFamilyMIPSR4600 = 0x44,\r
583 ProcessorFamilyMIPSR10000 = 0x45,\r
7ddba202
SZ		 584 ProcessorFamilyAmdCSeries = 0x46,\r
585 ProcessorFamilyAmdESeries = 0x47,\r
4a228334 586 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202 587 ProcessorFamilyAmdGSeries = 0x49,\r
4a228334
EL		 588 ProcessorFamilyAmdZSeries = 0x4A,\r
589 ProcessorFamilyAmdRSeries = 0x4B,\r
590 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
591 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
592 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
593 ProcessorFamilyAmdFireProSeries = 0x4F,\r
98cb9ae8 594 ProcessorFamilySparc = 0x50,\r
595 ProcessorFamilySuperSparc = 0x51,\r
596 ProcessorFamilymicroSparcII = 0x52,\r
597 ProcessorFamilymicroSparcIIep = 0x53,\r
598 ProcessorFamilyUltraSparc = 0x54,\r
599 ProcessorFamilyUltraSparcII = 0x55,\r
4a228334 600 ProcessorFamilyUltraSparcIii = 0x56,\r
98cb9ae8 601 ProcessorFamilyUltraSparcIII = 0x57,\r
602 ProcessorFamilyUltraSparcIIIi = 0x58,\r
603 ProcessorFamily68040 = 0x60,\r
604 ProcessorFamily68xxx = 0x61,\r
605 ProcessorFamily68000 = 0x62,\r
606 ProcessorFamily68010 = 0x63,\r
607 ProcessorFamily68020 = 0x64,\r
608 ProcessorFamily68030 = 0x65,\r
6cd35c62
EL		 609 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
610 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
611 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
ff6a1f32
SZ		 612 ProcessorFamilyAmdOpteronASeries = 0x69,\r
613 ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
98cb9ae8 614 ProcessorFamilyHobbit = 0x70,\r
615 ProcessorFamilyCrusoeTM5000 = 0x78,\r
616 ProcessorFamilyCrusoeTM3000 = 0x79,\r
617 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
618 ProcessorFamilyWeitek = 0x80,\r
619 ProcessorFamilyItanium = 0x82,\r
620 ProcessorFamilyAmdAthlon64 = 0x83,\r
621 ProcessorFamilyAmdOpteron = 0x84,\r
622 ProcessorFamilyAmdSempron = 0x85,\r
623 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
624 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
625 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
626 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
3507ab19 627 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
628 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
629 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
630 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
631 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
632 ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r
98cb9ae8 633 ProcessorFamilyPARISC = 0x90,\r
634 ProcessorFamilyPaRisc8500 = 0x91,\r
635 ProcessorFamilyPaRisc8000 = 0x92,\r
636 ProcessorFamilyPaRisc7300LC = 0x93,\r
637 ProcessorFamilyPaRisc7200 = 0x94,\r
638 ProcessorFamilyPaRisc7100LC = 0x95,\r
639 ProcessorFamilyPaRisc7100 = 0x96,\r
640 ProcessorFamilyV30 = 0xA0,\r
3507ab19 641 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
642 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
643 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
644 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
645 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
646 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
647 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
648 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
649 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
650 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
651 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
652 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
653 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
654 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
655 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
98cb9ae8 656 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
657 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
658 ProcessorFamilyPentium4 = 0xB2,\r
659 ProcessorFamilyIntelXeon = 0xB3,\r
660 ProcessorFamilyAS400 = 0xB4,\r
661 ProcessorFamilyIntelXeonMP = 0xB5,\r
662 ProcessorFamilyAMDAthlonXP = 0xB6,\r
663 ProcessorFamilyAMDAthlonMP = 0xB7,\r
664 ProcessorFamilyIntelItanium2 = 0xB8,\r
665 ProcessorFamilyIntelPentiumM = 0xB9,\r
666 ProcessorFamilyIntelCeleronD = 0xBA,\r
667 ProcessorFamilyIntelPentiumD = 0xBB,\r
668 ProcessorFamilyIntelPentiumEx = 0xBC,\r
4a228334 669 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
98cb9ae8 670 ProcessorFamilyReserved = 0xBE,\r
671 ProcessorFamilyIntelCore2 = 0xBF,\r
3507ab19 672 ProcessorFamilyIntelCore2Solo = 0xC0,\r
673 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
674 ProcessorFamilyIntelCore2Quad = 0xC2,\r
675 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
676 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
677 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
678 ProcessorFamilyIntelCoreI7 = 0xC6,\r
679 ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r
98cb9ae8 680 ProcessorFamilyIBM390 = 0xC8,\r
681 ProcessorFamilyG4 = 0xC9,\r
682 ProcessorFamilyG5 = 0xCA,\r
683 ProcessorFamilyG6 = 0xCB,\r
4a228334 684 ProcessorFamilyzArchitecture = 0xCC,\r
7ddba202
SZ		 685 ProcessorFamilyIntelCoreI5 = 0xCD,\r
686 ProcessorFamilyIntelCoreI3 = 0xCE,\r
98cb9ae8 687 ProcessorFamilyViaC7M = 0xD2,\r
688 ProcessorFamilyViaC7D = 0xD3,\r
689 ProcessorFamilyViaC7 = 0xD4,\r
690 ProcessorFamilyViaEden = 0xD5,\r
3507ab19 691 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
692 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
693 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
7ddba202 694 ProcessorFamilyViaNano = 0xD9,\r
3507ab19 695 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
696 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
697 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
698 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
699 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
7ddba202 700 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
4a228334
EL		 701 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
702 ProcessorFamilyAmdSempronII = 0xE5,\r
3507ab19 703 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
704 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
705 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
706 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
707 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
708 ProcessorFamilyAmdSempronSI = 0xEB,\r
7ddba202
SZ		 709 ProcessorFamilyAmdPhenomII = 0xEC,\r
710 ProcessorFamilyAmdAthlonII = 0xED,\r
711 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
712 ProcessorFamilyAmdSempronM = 0xEF,\r
98cb9ae8 713 ProcessorFamilyi860 = 0xFA,\r
714 ProcessorFamilyi960 = 0xFB,\r
715 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
716 ProcessorFamilyReserved1 = 0xFF\r
717} PROCESSOR_FAMILY_DATA;\r
718\r
f9ed6c93
YL		 719///\r
720/// Processor Information2 - Processor Family2.\r
721///\r
722typedef enum {\r
ff6a1f32
SZ		 723 ProcessorFamilyARMv7 = 0x0100,\r
724 ProcessorFamilyARMv8 = 0x0101,\r
f9ed6c93
YL		 725 ProcessorFamilySH3 = 0x0104,\r
726 ProcessorFamilySH4 = 0x0105,\r
727 ProcessorFamilyARM = 0x0118,\r
728 ProcessorFamilyStrongARM = 0x0119,\r
729 ProcessorFamily6x86 = 0x012C,\r
730 ProcessorFamilyMediaGX = 0x012D,\r
731 ProcessorFamilyMII = 0x012E,\r
732 ProcessorFamilyWinChip = 0x0140,\r
733 ProcessorFamilyDSP = 0x015E,\r
734 ProcessorFamilyVideoProcessor = 0x01F4\r
735} PROCESSOR_FAMILY2_DATA;\r
736\r
98cb9ae8 737///\r
af2dc6a7 738/// Processor Information - Voltage. \r
98cb9ae8 739///\r
740typedef struct {\r
6800ac83 741 UINT8 ProcessorVoltageCapability5V :1; \r
742 UINT8 ProcessorVoltageCapability3_3V :1; \r
743 UINT8 ProcessorVoltageCapability2_9V :1; \r
744 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
745 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
746 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 747} PROCESSOR_VOLTAGE;\r
748\r
749///\r
af2dc6a7 750/// Processor Information - Processor Upgrade.\r
98cb9ae8 751///\r
752typedef enum {\r
753 ProcessorUpgradeOther = 0x01,\r
754 ProcessorUpgradeUnknown = 0x02,\r
755 ProcessorUpgradeDaughterBoard = 0x03,\r
756 ProcessorUpgradeZIFSocket = 0x04,\r
af2dc6a7 757 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
98cb9ae8 758 ProcessorUpgradeNone = 0x06,\r
759 ProcessorUpgradeLIFSocket = 0x07,\r
760 ProcessorUpgradeSlot1 = 0x08,\r
761 ProcessorUpgradeSlot2 = 0x09,\r
762 ProcessorUpgrade370PinSocket = 0x0A,\r
763 ProcessorUpgradeSlotA = 0x0B,\r
764 ProcessorUpgradeSlotM = 0x0C,\r
765 ProcessorUpgradeSocket423 = 0x0D,\r
af2dc6a7 766 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
98cb9ae8 767 ProcessorUpgradeSocket478 = 0x0F,\r
768 ProcessorUpgradeSocket754 = 0x10,\r
769 ProcessorUpgradeSocket940 = 0x11,\r
770 ProcessorUpgradeSocket939 = 0x12,\r
771 ProcessorUpgradeSocketmPGA604 = 0x13,\r
772 ProcessorUpgradeSocketLGA771 = 0x14,\r
773 ProcessorUpgradeSocketLGA775 = 0x15,\r
774 ProcessorUpgradeSocketS1 = 0x16,\r
775 ProcessorUpgradeAM2 = 0x17,\r
3507ab19 776 ProcessorUpgradeF1207 = 0x18,\r
7ddba202
SZ		 777 ProcessorSocketLGA1366 = 0x19,\r
778 ProcessorUpgradeSocketG34 = 0x1A,\r
779 ProcessorUpgradeSocketAM3 = 0x1B,\r
780 ProcessorUpgradeSocketC32 = 0x1C,\r
781 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
782 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
783 ProcessorUpgradeSocketPGA988A = 0x1F,\r
784 ProcessorUpgradeSocketBGA1288 = 0x20,\r
785 ProcessorUpgradeSocketrPGA988B = 0x21,\r
786 ProcessorUpgradeSocketBGA1023 = 0x22,\r
787 ProcessorUpgradeSocketBGA1224 = 0x23,\r
4a228334 788 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
7ddba202
SZ		 789 ProcessorUpgradeSocketLGA1356 = 0x25,\r
790 ProcessorUpgradeSocketLGA2011 = 0x26,\r
791 ProcessorUpgradeSocketFS1 = 0x27,\r
792 ProcessorUpgradeSocketFS2 = 0x28,\r
793 ProcessorUpgradeSocketFM1 = 0x29,\r
4a228334
EL		 794 ProcessorUpgradeSocketFM2 = 0x2A,\r
795 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
6cd35c62
EL		 796 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
797 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
798 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
799 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
ff6a1f32
SZ		 800 ProcessorUpgradeSocketBGA1364 = 0x30,\r
801 ProcessorUpgradeSocketAM4 = 0x31,\r
802 ProcessorUpgradeSocketLGA1151 = 0x32,\r
803 ProcessorUpgradeSocketBGA1356 = 0x33,\r
804 ProcessorUpgradeSocketBGA1440 = 0x34,\r
805 ProcessorUpgradeSocketBGA1515 = 0x35,\r
806 ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
807 ProcessorUpgradeSocketSP3 = 0x37\r
98cb9ae8 808} PROCESSOR_UPGRADE;\r
809\r
810///\r
811/// Processor ID Field Description\r
812///\r
813typedef struct {\r
814 UINT32 ProcessorSteppingId:4;\r
815 UINT32 ProcessorModel: 4;\r
816 UINT32 ProcessorFamily: 4;\r
817 UINT32 ProcessorType: 2;\r
818 UINT32 ProcessorReserved1: 2;\r
819 UINT32 ProcessorXModel: 4;\r
820 UINT32 ProcessorXFamily: 8;\r
821 UINT32 ProcessorReserved2: 4;\r
822} PROCESSOR_SIGNATURE;\r
823\r
98cb9ae8 824typedef struct {\r
825 UINT32 ProcessorFpu :1;\r
826 UINT32 ProcessorVme :1;\r
827 UINT32 ProcessorDe :1;\r
828 UINT32 ProcessorPse :1;\r
829 UINT32 ProcessorTsc :1;\r
830 UINT32 ProcessorMsr :1;\r
831 UINT32 ProcessorPae :1;\r
832 UINT32 ProcessorMce :1;\r
833 UINT32 ProcessorCx8 :1;\r
834 UINT32 ProcessorApic :1;\r
835 UINT32 ProcessorReserved1 :1;\r
836 UINT32 ProcessorSep :1;\r
837 UINT32 ProcessorMtrr :1;\r
838 UINT32 ProcessorPge :1;\r
839 UINT32 ProcessorMca :1;\r
840 UINT32 ProcessorCmov :1;\r
841 UINT32 ProcessorPat :1;\r
842 UINT32 ProcessorPse36 :1;\r
843 UINT32 ProcessorPsn :1;\r
844 UINT32 ProcessorClfsh :1;\r
845 UINT32 ProcessorReserved2 :1;\r
846 UINT32 ProcessorDs :1;\r
847 UINT32 ProcessorAcpi :1;\r
848 UINT32 ProcessorMmx :1;\r
849 UINT32 ProcessorFxsr :1;\r
850 UINT32 ProcessorSse :1;\r
851 UINT32 ProcessorSse2 :1;\r
852 UINT32 ProcessorSs :1;\r
853 UINT32 ProcessorReserved3 :1;\r
854 UINT32 ProcessorTm :1;\r
855 UINT32 ProcessorReserved4 :2;\r
856} PROCESSOR_FEATURE_FLAGS;\r
857\r
858typedef struct {\r
859 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 860 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 861} PROCESSOR_ID_DATA;\r
98cb9ae8 862\r
4135253b 863///\r
af2dc6a7 864/// Processor Information (Type 4).\r
4135253b 865///\r
98cb9ae8 866/// The information in this structure defines the attributes of a single processor; \r
867/// a separate structure instance is provided for each system processor socket/slot. \r
868/// For example, a system with an IntelDX2 processor would have a single \r
af2dc6a7 869/// structure instance, while a system with an IntelSX2 processor would have a structure\r
870/// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r
98cb9ae8 871///\r
61ce5861 872typedef struct { \r
873 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 874 SMBIOS_TABLE_STRING Socket;\r
af2dc6a7 875 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
876 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
61ce5861 877 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 878 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 879 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 880 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 881 UINT16 ExternalClock;\r
882 UINT16 MaxSpeed;\r
883 UINT16 CurrentSpeed;\r
884 UINT8 Status;\r
af2dc6a7 885 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
61ce5861 886 UINT16 L1CacheHandle;\r
887 UINT16 L2CacheHandle;\r
888 UINT16 L3CacheHandle;\r
889 SMBIOS_TABLE_STRING SerialNumber;\r
890 SMBIOS_TABLE_STRING AssetTag;\r
891 SMBIOS_TABLE_STRING PartNumber;\r
892 //\r
893 // Add for smbios 2.5\r
894 //\r
895 UINT8 CoreCount;\r
896 UINT8 EnabledCoreCount;\r
897 UINT8 ThreadCount;\r
898 UINT16 ProcessorCharacteristics;\r
899 //\r
900 // Add for smbios 2.6\r
901 //\r
902 UINT16 ProcessorFamily2;\r
6cd35c62
EL		 903 //\r
904 // Add for smbios 3.0\r
905 //\r
906 UINT16 CoreCount2;\r
907 UINT16 EnabledCoreCount2;\r
908 UINT16 ThreadCount2;\r
61ce5861 909} SMBIOS_TABLE_TYPE4;\r
910\r
98cb9ae8 911///\r
af2dc6a7 912/// Memory Controller Error Detecting Method.\r
98cb9ae8 913///\r
914typedef enum { \r
915 ErrorDetectingMethodOther = 0x01,\r
916 ErrorDetectingMethodUnknown = 0x02,\r
917 ErrorDetectingMethodNone = 0x03,\r
918 ErrorDetectingMethodParity = 0x04,\r
919 ErrorDetectingMethod32Ecc = 0x05,\r
920 ErrorDetectingMethod64Ecc = 0x06,\r
921 ErrorDetectingMethod128Ecc = 0x07,\r
922 ErrorDetectingMethodCrc = 0x08\r
923} MEMORY_ERROR_DETECT_METHOD;\r
924\r
925///\r
af2dc6a7 926/// Memory Controller Error Correcting Capability.\r
98cb9ae8 927///\r
928typedef struct {\r
929 UINT8 Other :1;\r
930 UINT8 Unknown :1;\r
931 UINT8 None :1;\r
932 UINT8 SingleBitErrorCorrect :1;\r
933 UINT8 DoubleBitErrorCorrect :1;\r
934 UINT8 ErrorScrubbing :1;\r
935 UINT8 Reserved :2;\r
936} MEMORY_ERROR_CORRECT_CAPABILITY;\r
937\r
938///\r
af2dc6a7 939/// Memory Controller Information - Interleave Support.\r
98cb9ae8 940///\r
941typedef enum { \r
942 MemoryInterleaveOther = 0x01,\r
943 MemoryInterleaveUnknown = 0x02,\r
944 MemoryInterleaveOneWay = 0x03,\r
945 MemoryInterleaveTwoWay = 0x04,\r
946 MemoryInterleaveFourWay = 0x05,\r
947 MemoryInterleaveEightWay = 0x06,\r
948 MemoryInterleaveSixteenWay = 0x07\r
949} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
950\r
951///\r
af2dc6a7 952/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 953///\r
954typedef struct {\r
955 UINT16 Other :1;\r
956 UINT16 Unknown :1;\r
957 UINT16 SeventyNs:1;\r
958 UINT16 SixtyNs :1;\r
959 UINT16 FiftyNs :1;\r
960 UINT16 Reserved :11;\r
961} MEMORY_SPEED_TYPE;\r
962\r
4135253b 963///\r
af2dc6a7 964/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 965///\r
98cb9ae8 966/// The information in this structure defines the attributes of the system's memory controller(s) \r
967/// and the supported attributes of any memory-modules present in the sockets controlled by \r
968/// this controller. \r
969/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
af2dc6a7 970/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 971/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
972/// choose to implement both memory description types to allow existing DMI browsers\r
973/// to properly display the system's memory attributes.\r
974///\r
61ce5861 975typedef struct {\r
98cb9ae8 976 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 977 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
98cb9ae8 978 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
af2dc6a7 979 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
980 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r
98cb9ae8 981 UINT8 MaxMemoryModuleSize;\r
982 MEMORY_SPEED_TYPE SupportSpeed;\r
983 UINT16 SupportMemoryType;\r
984 UINT8 MemoryModuleVoltage;\r
985 UINT8 AssociatedMemorySlotNum;\r
986 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 987} SMBIOS_TABLE_TYPE5;\r
988\r
98cb9ae8 989///\r
990/// Memory Module Information - Memory Types\r
991///\r
992typedef struct {\r
993 UINT16 Other :1;\r
994 UINT16 Unknown :1;\r
995 UINT16 Standard :1;\r
996 UINT16 FastPageMode:1;\r
b4ab47ec 997 UINT16 Edo :1;\r
98cb9ae8 998 UINT16 Parity :1;\r
b4ab47ec 999 UINT16 Ecc :1;\r
1000 UINT16 Simm :1;\r
1001 UINT16 Dimm :1;\r
98cb9ae8 1002 UINT16 BurstEdo :1;\r
b4ab47ec 1003 UINT16 Sdram :1;\r
98cb9ae8 1004 UINT16 Reserved :5;\r
1005} MEMORY_CURRENT_TYPE;\r
1006\r
1007///\r
af2dc6a7 1008/// Memory Module Information - Memory Size.\r
98cb9ae8 1009///\r
1010typedef struct {\r
6800ac83 1011 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 1012 UINT8 SingleOrDoubleBank :1;\r
1013} MEMORY_INSTALLED_ENABLED_SIZE;\r
1014\r
4135253b 1015///\r
1016/// Memory Module Information (Type 6, Obsolete)\r
1017///\r
98cb9ae8 1018/// One Memory Module Information structure is included for each memory-module socket \r
1019/// in the system. The structure describes the speed, type, size, and error status\r
1020/// of each system memory module. The supported attributes of each module are described \r
1021/// by the "owning" Memory Controller Information structure. \r
1022/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
af2dc6a7 1023/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 1024/// and Memory Device (Type 17) structures should be used instead.\r
1025///\r
61ce5861 1026typedef struct {\r
98cb9ae8 1027 SMBIOS_STRUCTURE Hdr;\r
1028 SMBIOS_TABLE_STRING SocketDesignation;\r
1029 UINT8 BankConnections;\r
1030 UINT8 CurrentSpeed;\r
1031 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
1032 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
1033 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
1034 UINT8 ErrorStatus;\r
61ce5861 1035} SMBIOS_TABLE_TYPE6;\r
1036\r
98cb9ae8 1037///\r
af2dc6a7 1038/// Cache Information - SRAM Type.\r
98cb9ae8 1039///\r
1040typedef struct {\r
1041 UINT16 Other :1;\r
1042 UINT16 Unknown :1;\r
1043 UINT16 NonBurst :1;\r
1044 UINT16 Burst :1;\r
1045 UINT16 PipelineBurst :1;\r
98cb9ae8 1046 UINT16 Synchronous :1;\r
53d90f04 1047 UINT16 Asynchronous :1;\r
98cb9ae8 1048 UINT16 Reserved :9;\r
1049} CACHE_SRAM_TYPE_DATA;\r
1050\r
1051///\r
af2dc6a7 1052/// Cache Information - Error Correction Type.\r
98cb9ae8 1053///\r
1054typedef enum {\r
1055 CacheErrorOther = 0x01,\r
1056 CacheErrorUnknown = 0x02,\r
1057 CacheErrorNone = 0x03,\r
1058 CacheErrorParity = 0x04,\r
6800ac83 1059 CacheErrorSingleBit = 0x05, ///< ECC\r
1060 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 1061} CACHE_ERROR_TYPE_DATA;\r
1062\r
1063///\r
af2dc6a7 1064/// Cache Information - System Cache Type. \r
98cb9ae8 1065///\r
1066typedef enum {\r
1067 CacheTypeOther = 0x01,\r
1068 CacheTypeUnknown = 0x02,\r
1069 CacheTypeInstruction = 0x03,\r
1070 CacheTypeData = 0x04,\r
1071 CacheTypeUnified = 0x05\r
1072} CACHE_TYPE_DATA;\r
1073\r
1074///\r
af2dc6a7 1075/// Cache Information - Associativity. \r
98cb9ae8 1076///\r
1077typedef enum {\r
1078 CacheAssociativityOther = 0x01,\r
1079 CacheAssociativityUnknown = 0x02,\r
1080 CacheAssociativityDirectMapped = 0x03,\r
1081 CacheAssociativity2Way = 0x04,\r
1082 CacheAssociativity4Way = 0x05,\r
1083 CacheAssociativityFully = 0x06,\r
1084 CacheAssociativity8Way = 0x07,\r
1085 CacheAssociativity16Way = 0x08,\r
3507ab19 1086 CacheAssociativity12Way = 0x09,\r
1087 CacheAssociativity24Way = 0x0A,\r
1088 CacheAssociativity32Way = 0x0B,\r
1089 CacheAssociativity48Way = 0x0C,\r
7ddba202
SZ		 1090 CacheAssociativity64Way = 0x0D,\r
1091 CacheAssociativity20Way = 0x0E\r
98cb9ae8 1092} CACHE_ASSOCIATIVITY_DATA;\r
1093\r
4135253b 1094///\r
af2dc6a7 1095/// Cache Information (Type 7).\r
4135253b 1096///\r
af2dc6a7 1097/// The information in this structure defines the attributes of CPU cache device in the system. \r
98cb9ae8 1098/// One structure is specified for each such device, whether the device is internal to\r
1099/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 1100/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 1101///\r
61ce5861 1102typedef struct {\r
98cb9ae8 1103 SMBIOS_STRUCTURE Hdr;\r
1104 SMBIOS_TABLE_STRING SocketDesignation;\r
1105 UINT16 CacheConfiguration;\r
1106 UINT16 MaximumCacheSize;\r
1107 UINT16 InstalledSize;\r
1108 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1109 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1110 UINT8 CacheSpeed;\r
af2dc6a7 1111 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1112 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1113 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
ff6a1f32
SZ		 1114 //\r
1115 // Add for smbios 3.1.0\r
1116 //\r
1117 UINT32 MaximumCacheSize2;\r
1118 UINT32 InstalledSize2;\r
61ce5861 1119} SMBIOS_TABLE_TYPE7;\r
1120\r
98cb9ae8 1121///\r
af2dc6a7 1122/// Port Connector Information - Connector Types. \r
98cb9ae8 1123///\r
1124typedef enum {\r
1125 PortConnectorTypeNone = 0x00,\r
1126 PortConnectorTypeCentronics = 0x01,\r
1127 PortConnectorTypeMiniCentronics = 0x02,\r
1128 PortConnectorTypeProprietary = 0x03,\r
1129 PortConnectorTypeDB25Male = 0x04,\r
1130 PortConnectorTypeDB25Female = 0x05,\r
1131 PortConnectorTypeDB15Male = 0x06,\r
1132 PortConnectorTypeDB15Female = 0x07,\r
1133 PortConnectorTypeDB9Male = 0x08,\r
1134 PortConnectorTypeDB9Female = 0x09,\r
1135 PortConnectorTypeRJ11 = 0x0A,\r
1136 PortConnectorTypeRJ45 = 0x0B,\r
1137 PortConnectorType50PinMiniScsi = 0x0C,\r
1138 PortConnectorTypeMiniDin = 0x0D,\r
119c1688 1139 PortConnectorTypeMicroDin = 0x0E,\r
98cb9ae8 1140 PortConnectorTypePS2 = 0x0F,\r
1141 PortConnectorTypeInfrared = 0x10,\r
1142 PortConnectorTypeHpHil = 0x11,\r
1143 PortConnectorTypeUsb = 0x12,\r
1144 PortConnectorTypeSsaScsi = 0x13,\r
1145 PortConnectorTypeCircularDin8Male = 0x14,\r
1146 PortConnectorTypeCircularDin8Female = 0x15,\r
1147 PortConnectorTypeOnboardIde = 0x16,\r
1148 PortConnectorTypeOnboardFloppy = 0x17,\r
1149 PortConnectorType9PinDualInline = 0x18,\r
1150 PortConnectorType25PinDualInline = 0x19,\r
1151 PortConnectorType50PinDualInline = 0x1A,\r
1152 PortConnectorType68PinDualInline = 0x1B,\r
1153 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1154 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1155 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1156 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1157 PortConnectorTypeBNC = 0x20,\r
1158 PortConnectorType1394 = 0x21,\r
119c1688 1159 PortConnectorTypeSasSata = 0x22,\r
98cb9ae8 1160 PortConnectorTypePC98 = 0xA0,\r
1161 PortConnectorTypePC98Hireso = 0xA1,\r
1162 PortConnectorTypePCH98 = 0xA2,\r
1163 PortConnectorTypePC98Note = 0xA3,\r
1164 PortConnectorTypePC98Full = 0xA4,\r
1165 PortConnectorTypeOther = 0xFF\r
1166} MISC_PORT_CONNECTOR_TYPE;\r
1167\r
1168///\r
1169/// Port Connector Information - Port Types \r
1170///\r
1171typedef enum {\r
1172 PortTypeNone = 0x00,\r
1173 PortTypeParallelXtAtCompatible = 0x01,\r
1174 PortTypeParallelPortPs2 = 0x02,\r
1175 PortTypeParallelPortEcp = 0x03,\r
1176 PortTypeParallelPortEpp = 0x04,\r
1177 PortTypeParallelPortEcpEpp = 0x05,\r
1178 PortTypeSerialXtAtCompatible = 0x06,\r
1179 PortTypeSerial16450Compatible = 0x07,\r
1180 PortTypeSerial16550Compatible = 0x08,\r
1181 PortTypeSerial16550ACompatible = 0x09,\r
1182 PortTypeScsi = 0x0A,\r
1183 PortTypeMidi = 0x0B,\r
1184 PortTypeJoyStick = 0x0C,\r
1185 PortTypeKeyboard = 0x0D,\r
1186 PortTypeMouse = 0x0E,\r
1187 PortTypeSsaScsi = 0x0F,\r
1188 PortTypeUsb = 0x10,\r
1189 PortTypeFireWire = 0x11,\r
1190 PortTypePcmciaTypeI = 0x12,\r
1191 PortTypePcmciaTypeII = 0x13,\r
1192 PortTypePcmciaTypeIII = 0x14,\r
1193 PortTypeCardBus = 0x15,\r
1194 PortTypeAccessBusPort = 0x16,\r
1195 PortTypeScsiII = 0x17,\r
1196 PortTypeScsiWide = 0x18,\r
1197 PortTypePC98 = 0x19,\r
1198 PortTypePC98Hireso = 0x1A,\r
1199 PortTypePCH98 = 0x1B,\r
1200 PortTypeVideoPort = 0x1C,\r
1201 PortTypeAudioPort = 0x1D,\r
1202 PortTypeModemPort = 0x1E,\r
1203 PortTypeNetworkPort = 0x1F,\r
23df19a7
SEHM		 1204 PortTypeSata = 0x20,\r
1205 PortTypeSas = 0x21,\r
98cb9ae8 1206 PortType8251Compatible = 0xA0,\r
1207 PortType8251FifoCompatible = 0xA1,\r
1208 PortTypeOther = 0xFF\r
1209} MISC_PORT_TYPE;\r
1210\r
4135253b 1211///\r
af2dc6a7 1212/// Port Connector Information (Type 8).\r
4135253b 1213///\r
98cb9ae8 1214/// The information in this structure defines the attributes of a system port connector, \r
1f9f8414 1215/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
98cb9ae8 1216/// are provided. One structure is present for each port provided by the system.\r
1217///\r
61ce5861 1218typedef struct {\r
98cb9ae8 1219 SMBIOS_STRUCTURE Hdr;\r
1220 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
af2dc6a7 1221 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
98cb9ae8 1222 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
af2dc6a7 1223 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1224 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 1225} SMBIOS_TABLE_TYPE8;\r
1226\r
98cb9ae8 1227///\r
1228/// System Slots - Slot Type\r
1229///\r
1230typedef enum {\r
1231 SlotTypeOther = 0x01,\r
1232 SlotTypeUnknown = 0x02,\r
1233 SlotTypeIsa = 0x03,\r
1234 SlotTypeMca = 0x04,\r
1235 SlotTypeEisa = 0x05,\r
1236 SlotTypePci = 0x06,\r
1237 SlotTypePcmcia = 0x07,\r
1238 SlotTypeVlVesa = 0x08,\r
1239 SlotTypeProprietary = 0x09,\r
1240 SlotTypeProcessorCardSlot = 0x0A,\r
1241 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1242 SlotTypeIORiserCardSlot = 0x0C,\r
1243 SlotTypeNuBus = 0x0D,\r
1244 SlotTypePci66MhzCapable = 0x0E,\r
1245 SlotTypeAgp = 0x0F,\r
1246 SlotTypeApg2X = 0x10,\r
1247 SlotTypeAgp4X = 0x11,\r
1248 SlotTypePciX = 0x12,\r
0c8cd067 1249 SlotTypeAgp8X = 0x13,\r
6cd35c62
EL		 1250 SlotTypeM2Socket1_DP = 0x14,\r
1251 SlotTypeM2Socket1_SD = 0x15,\r
1252 SlotTypeM2Socket2 = 0x16,\r
1253 SlotTypeM2Socket3 = 0x17,\r
1254 SlotTypeMxmTypeI = 0x18,\r
1255 SlotTypeMxmTypeII = 0x19,\r
1256 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1257 SlotTypeMxmTypeIIIHe = 0x1B,\r
1258 SlotTypeMxmTypeIV = 0x1C,\r
1259 SlotTypeMxm30TypeA = 0x1D,\r
1260 SlotTypeMxm30TypeB = 0x1E,\r
1261 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1262 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
ff6a1f32
SZ		 1263 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
1264 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
1265 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
98cb9ae8 1266 SlotTypePC98C20 = 0xA0,\r
1267 SlotTypePC98C24 = 0xA1,\r
1268 SlotTypePC98E = 0xA2,\r
1269 SlotTypePC98LocalBus = 0xA3,\r
1270 SlotTypePC98Card = 0xA4,\r
1271 SlotTypePciExpress = 0xA5,\r
1272 SlotTypePciExpressX1 = 0xA6,\r
1273 SlotTypePciExpressX2 = 0xA7,\r
1274 SlotTypePciExpressX4 = 0xA8,\r
1275 SlotTypePciExpressX8 = 0xA9,\r
3507ab19 1276 SlotTypePciExpressX16 = 0xAA,\r
1277 SlotTypePciExpressGen2 = 0xAB,\r
1278 SlotTypePciExpressGen2X1 = 0xAC,\r
1279 SlotTypePciExpressGen2X2 = 0xAD,\r
1280 SlotTypePciExpressGen2X4 = 0xAE,\r
1281 SlotTypePciExpressGen2X8 = 0xAF,\r
7ddba202
SZ		 1282 SlotTypePciExpressGen2X16 = 0xB0,\r
1283 SlotTypePciExpressGen3 = 0xB1,\r
1284 SlotTypePciExpressGen3X1 = 0xB2,\r
1285 SlotTypePciExpressGen3X2 = 0xB3,\r
1286 SlotTypePciExpressGen3X4 = 0xB4,\r
1287 SlotTypePciExpressGen3X8 = 0xB5,\r
1288 SlotTypePciExpressGen3X16 = 0xB6\r
98cb9ae8 1289} MISC_SLOT_TYPE;\r
1290\r
1291///\r
af2dc6a7 1292/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1293///\r
1294typedef enum {\r
1295 SlotDataBusWidthOther = 0x01,\r
1296 SlotDataBusWidthUnknown = 0x02,\r
1297 SlotDataBusWidth8Bit = 0x03,\r
1298 SlotDataBusWidth16Bit = 0x04,\r
1299 SlotDataBusWidth32Bit = 0x05,\r
1300 SlotDataBusWidth64Bit = 0x06,\r
1301 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 1302 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1303 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1304 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1305 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1306 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1307 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1308 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1309} MISC_SLOT_DATA_BUS_WIDTH;\r
1310\r
1311///\r
af2dc6a7 1312/// System Slots - Current Usage.\r
98cb9ae8 1313///\r
1314typedef enum {\r
1315 SlotUsageOther = 0x01,\r
1316 SlotUsageUnknown = 0x02,\r
1317 SlotUsageAvailable = 0x03,\r
1318 SlotUsageInUse = 0x04\r
1319} MISC_SLOT_USAGE;\r
1320\r
1321///\r
af2dc6a7 1322/// System Slots - Slot Length. \r
98cb9ae8 1323///\r
1324typedef enum {\r
1325 SlotLengthOther = 0x01,\r
1326 SlotLengthUnknown = 0x02,\r
1327 SlotLengthShort = 0x03,\r
1328 SlotLengthLong = 0x04\r
1329} MISC_SLOT_LENGTH;\r
1330\r
1331///\r
af2dc6a7 1332/// System Slots - Slot Characteristics 1. \r
98cb9ae8 1333///\r
1334typedef struct {\r
1335 UINT8 CharacteristicsUnknown :1;\r
1336 UINT8 Provides50Volts :1;\r
1337 UINT8 Provides33Volts :1;\r
1338 UINT8 SharedSlot :1;\r
1339 UINT8 PcCard16Supported :1;\r
1340 UINT8 CardBusSupported :1;\r
1341 UINT8 ZoomVideoSupported :1;\r
1342 UINT8 ModemRingResumeSupported:1;\r
1343} MISC_SLOT_CHARACTERISTICS1;\r
1344///\r
af2dc6a7 1345/// System Slots - Slot Characteristics 2. \r
98cb9ae8 1346///\r
1347typedef struct {\r
1348 UINT8 PmeSignalSupported :1;\r
1349 UINT8 HotPlugDevicesSupported :1;\r
1350 UINT8 SmbusSignalSupported :1;\r
6800ac83 1351 UINT8 Reserved :5; ///< Set to 0.\r
98cb9ae8 1352} MISC_SLOT_CHARACTERISTICS2;\r
1353\r
4135253b 1354///\r
1355/// System Slots (Type 9)\r
1356///\r
98cb9ae8 1357/// The information in this structure defines the attributes of a system slot. \r
1358/// One structure is provided for each slot in the system.\r
1359///\r
1360///\r
61ce5861 1361typedef struct {\r
98cb9ae8 1362 SMBIOS_STRUCTURE Hdr;\r
1363 SMBIOS_TABLE_STRING SlotDesignation;\r
af2dc6a7 1364 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1365 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1366 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1367 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
98cb9ae8 1368 UINT16 SlotID;\r
1369 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1370 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1371 //\r
1372 // Add for smbios 2.6\r
1373 //\r
98cb9ae8 1374 UINT16 SegmentGroupNum;\r
1375 UINT8 BusNum;\r
1376 UINT8 DevFuncNum;\r
61ce5861 1377} SMBIOS_TABLE_TYPE9;\r
1378\r
98cb9ae8 1379///\r
af2dc6a7 1380/// On Board Devices Information - Device Types. \r
98cb9ae8 1381///\r
1382typedef enum {\r
1383 OnBoardDeviceTypeOther = 0x01,\r
1384 OnBoardDeviceTypeUnknown = 0x02,\r
1385 OnBoardDeviceTypeVideo = 0x03,\r
1386 OnBoardDeviceTypeScsiController = 0x04,\r
1387 OnBoardDeviceTypeEthernet = 0x05,\r
1388 OnBoardDeviceTypeTokenRing = 0x06,\r
119c1688
SZ		 1389 OnBoardDeviceTypeSound = 0x07,\r
1390 OnBoardDeviceTypePATAController = 0x08,\r
1391 OnBoardDeviceTypeSATAController = 0x09,\r
1392 OnBoardDeviceTypeSASController = 0x0A\r
98cb9ae8 1393} MISC_ONBOARD_DEVICE_TYPE;\r
1394\r
bf7ea009 1395///\r
1396/// Device Item Entry\r
1397///\r
61ce5861 1398typedef struct {\r
af2dc6a7 1399 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1400 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
98cb9ae8 1401 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1402} DEVICE_STRUCT;\r
1403\r
4135253b 1404///\r
af2dc6a7 1405/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1406///\r
98cb9ae8 1407/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1408/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1409/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1410/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1411/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1412/// has some level of control over the enabling of the associated device for use by the system.\r
1413///\r
61ce5861 1414typedef struct {\r
1415 SMBIOS_STRUCTURE Hdr;\r
1416 DEVICE_STRUCT Device[1];\r
1417} SMBIOS_TABLE_TYPE10;\r
1418\r
4135253b 1419///\r
af2dc6a7 1420/// OEM Strings (Type 11).\r
98cb9ae8 1421/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1422/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
4135253b 1423///\r
61ce5861 1424typedef struct {\r
1425 SMBIOS_STRUCTURE Hdr;\r
1426 UINT8 StringCount;\r
1427} SMBIOS_TABLE_TYPE11;\r
1428\r
4135253b 1429///\r
af2dc6a7 1430/// System Configuration Options (Type 12).\r
4135253b 1431///\r
98cb9ae8 1432/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1433///\r
61ce5861 1434typedef struct {\r
1435 SMBIOS_STRUCTURE Hdr;\r
1436 UINT8 StringCount;\r
1437} SMBIOS_TABLE_TYPE12;\r
1438\r
98cb9ae8 1439\r
4135253b 1440///\r
af2dc6a7 1441/// BIOS Language Information (Type 13).\r
4135253b 1442///\r
98cb9ae8 1443/// The information in this structure defines the installable language attributes of the BIOS. \r
1444/// \r
61ce5861 1445typedef struct {\r
1446 SMBIOS_STRUCTURE Hdr;\r
1447 UINT8 InstallableLanguages;\r
1448 UINT8 Flags;\r
fbfa4a1d 1449 UINT8 Reserved[15];\r
61ce5861 1450 SMBIOS_TABLE_STRING CurrentLanguages;\r
1451} SMBIOS_TABLE_TYPE13;\r
1452\r
119c1688
SZ		 1453///\r
1454/// Group Item Entry\r
1455///\r
1456typedef struct {\r
1457 UINT8 ItemType;\r
1458 UINT16 ItemHandle;\r
1459} GROUP_STRUCT;\r
1460\r
1461///\r
1462/// Group Associations (Type 14).\r
1463///\r
1464/// The Group Associations structure is provided for OEMs who want to specify \r
1465/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1466/// within the system. \r
1467///\r
1468typedef struct {\r
1469 SMBIOS_STRUCTURE Hdr;\r
1470 SMBIOS_TABLE_STRING GroupName;\r
1471 GROUP_STRUCT Group[1];\r
1472} SMBIOS_TABLE_TYPE14;\r
1473\r
98cb9ae8 1474///\r
af2dc6a7 1475/// System Event Log - Event Log Types.\r
98cb9ae8 1476/// \r
1477typedef enum {\r
1478 EventLogTypeReserved = 0x00,\r
1479 EventLogTypeSingleBitECC = 0x01,\r
1480 EventLogTypeMultiBitECC = 0x02,\r
1481 EventLogTypeParityMemErr = 0x03,\r
1482 EventLogTypeBusTimeOut = 0x04,\r
1483 EventLogTypeIOChannelCheck = 0x05,\r
1484 EventLogTypeSoftwareNMI = 0x06,\r
1485 EventLogTypePOSTMemResize = 0x07,\r
1486 EventLogTypePOSTErr = 0x08,\r
1487 EventLogTypePCIParityErr = 0x09,\r
1488 EventLogTypePCISystemErr = 0x0A,\r
1489 EventLogTypeCPUFailure = 0x0B,\r
1490 EventLogTypeEISATimeOut = 0x0C,\r
1491 EventLogTypeMemLogDisabled = 0x0D,\r
1492 EventLogTypeLoggingDisabled = 0x0E,\r
1493 EventLogTypeSysLimitExce = 0x10,\r
1494 EventLogTypeAsyncHWTimer = 0x11,\r
1495 EventLogTypeSysConfigInfo = 0x12,\r
1496 EventLogTypeHDInfo = 0x13,\r
1497 EventLogTypeSysReconfig = 0x14,\r
1498 EventLogTypeUncorrectCPUErr = 0x15,\r
1499 EventLogTypeAreaResetAndClr = 0x16,\r
1500 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1501 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1502 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1503 EventLogTypeEndOfLog = 0xFF\r
1504} EVENT_LOG_TYPE_DATA;\r
1505\r
1506///\r
af2dc6a7 1507/// System Event Log - Variable Data Format Types. \r
98cb9ae8 1508/// \r
1509typedef enum {\r
1510 EventLogVariableNone = 0x00,\r
1511 EventLogVariableHandle = 0x01,\r
1512 EventLogVariableMutilEvent = 0x02,\r
1513 EventLogVariableMutilEventHandle = 0x03,\r
1514 EventLogVariablePOSTResultBitmap = 0x04,\r
1515 EventLogVariableSysManagementType = 0x05,\r
1516 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1517 EventLogVariableUnused = 0x07,\r
1518 EventLogVariableOEMAssigned = 0x80\r
55deb978 1519} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1520\r
98cb9ae8 1521///\r
1522/// Event Log Type Descriptors\r
1523///\r
1524typedef struct {\r
af2dc6a7 1525 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
98cb9ae8 1526 UINT8 DataFormatType;\r
1527} EVENT_LOG_TYPE;\r
1528\r
4135253b 1529///\r
af2dc6a7 1530/// System Event Log (Type 15).\r
4135253b 1531///\r
98cb9ae8 1532/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1533/// that the system supports an event log. An event log is a fixed-length area within a \r
1534/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1535/// record, followed by one or more variable-length log records. \r
1536///\r
61ce5861 1537typedef struct {\r
1538 SMBIOS_STRUCTURE Hdr;\r
1539 UINT16 LogAreaLength;\r
1540 UINT16 LogHeaderStartOffset;\r
1541 UINT16 LogDataStartOffset;\r
1542 UINT8 AccessMethod;\r
1543 UINT8 LogStatus;\r
1544 UINT32 LogChangeToken;\r
1545 UINT32 AccessMethodAddress;\r
1546 UINT8 LogHeaderFormat;\r
1547 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1548 UINT8 LengthOfLogTypeDescriptor;\r
1549 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1550} SMBIOS_TABLE_TYPE15;\r
1551\r
98cb9ae8 1552///\r
af2dc6a7 1553/// Physical Memory Array - Location.\r
98cb9ae8 1554///\r
1555typedef enum {\r
1556 MemoryArrayLocationOther = 0x01,\r
1557 MemoryArrayLocationUnknown = 0x02,\r
1558 MemoryArrayLocationSystemBoard = 0x03,\r
1559 MemoryArrayLocationIsaAddonCard = 0x04,\r
1560 MemoryArrayLocationEisaAddonCard = 0x05,\r
1561 MemoryArrayLocationPciAddonCard = 0x06,\r
1562 MemoryArrayLocationMcaAddonCard = 0x07,\r
1563 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1564 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1565 MemoryArrayLocationNuBus = 0x0A,\r
1566 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1567 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1568 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1569 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1570} MEMORY_ARRAY_LOCATION;\r
1571\r
1572///\r
af2dc6a7 1573/// Physical Memory Array - Use.\r
98cb9ae8 1574///\r
1575typedef enum {\r
1576 MemoryArrayUseOther = 0x01,\r
1577 MemoryArrayUseUnknown = 0x02,\r
1578 MemoryArrayUseSystemMemory = 0x03,\r
1579 MemoryArrayUseVideoMemory = 0x04,\r
1580 MemoryArrayUseFlashMemory = 0x05,\r
1581 MemoryArrayUseNonVolatileRam = 0x06,\r
1582 MemoryArrayUseCacheMemory = 0x07\r
1583} MEMORY_ARRAY_USE;\r
1584\r
1585///\r
af2dc6a7 1586/// Physical Memory Array - Error Correction Types. \r
98cb9ae8 1587///\r
1588typedef enum {\r
1589 MemoryErrorCorrectionOther = 0x01,\r
1590 MemoryErrorCorrectionUnknown = 0x02,\r
1591 MemoryErrorCorrectionNone = 0x03,\r
1592 MemoryErrorCorrectionParity = 0x04,\r
1593 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1594 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1595 MemoryErrorCorrectionCrc = 0x07\r
1596} MEMORY_ERROR_CORRECTION;\r
1597\r
4135253b 1598///\r
af2dc6a7 1599/// Physical Memory Array (Type 16).\r
4135253b 1600///\r
98cb9ae8 1601/// This structure describes a collection of memory devices that operate \r
1602/// together to form a memory address space. \r
1603///\r
61ce5861 1604typedef struct {\r
98cb9ae8 1605 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1606 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1607 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1608 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
98cb9ae8 1609 UINT32 MaximumCapacity;\r
1610 UINT16 MemoryErrorInformationHandle;\r
1611 UINT16 NumberOfMemoryDevices;\r
7ddba202
SZ		 1612 //\r
1613 // Add for smbios 2.7\r
1614 //\r
1615 UINT64 ExtendedMaximumCapacity;\r
61ce5861 1616} SMBIOS_TABLE_TYPE16;\r
1617\r
98cb9ae8 1618///\r
af2dc6a7 1619/// Memory Device - Form Factor.\r
98cb9ae8 1620///\r
1621typedef enum {\r
1622 MemoryFormFactorOther = 0x01,\r
1623 MemoryFormFactorUnknown = 0x02,\r
1624 MemoryFormFactorSimm = 0x03,\r
1625 MemoryFormFactorSip = 0x04,\r
1626 MemoryFormFactorChip = 0x05,\r
1627 MemoryFormFactorDip = 0x06,\r
1628 MemoryFormFactorZip = 0x07,\r
1629 MemoryFormFactorProprietaryCard = 0x08,\r
1630 MemoryFormFactorDimm = 0x09,\r
1631 MemoryFormFactorTsop = 0x0A,\r
1632 MemoryFormFactorRowOfChips = 0x0B,\r
1633 MemoryFormFactorRimm = 0x0C,\r
1634 MemoryFormFactorSodimm = 0x0D,\r
1635 MemoryFormFactorSrimm = 0x0E,\r
1636 MemoryFormFactorFbDimm = 0x0F\r
1637} MEMORY_FORM_FACTOR;\r
1638\r
1639///\r
1640/// Memory Device - Type\r
1641///\r
1642typedef enum {\r
1643 MemoryTypeOther = 0x01,\r
1644 MemoryTypeUnknown = 0x02,\r
1645 MemoryTypeDram = 0x03,\r
1646 MemoryTypeEdram = 0x04,\r
1647 MemoryTypeVram = 0x05,\r
1648 MemoryTypeSram = 0x06,\r
1649 MemoryTypeRam = 0x07,\r
1650 MemoryTypeRom = 0x08,\r
1651 MemoryTypeFlash = 0x09,\r
1652 MemoryTypeEeprom = 0x0A,\r
1653 MemoryTypeFeprom = 0x0B,\r
1654 MemoryTypeEprom = 0x0C,\r
1655 MemoryTypeCdram = 0x0D,\r
1656 MemoryType3Dram = 0x0E,\r
1657 MemoryTypeSdram = 0x0F,\r
1658 MemoryTypeSgram = 0x10,\r
1659 MemoryTypeRdram = 0x11,\r
1660 MemoryTypeDdr = 0x12,\r
1661 MemoryTypeDdr2 = 0x13,\r
3507ab19 1662 MemoryTypeDdr2FbDimm = 0x14,\r
1663 MemoryTypeDdr3 = 0x18,\r
6cd35c62
EL		 1664 MemoryTypeFbd2 = 0x19,\r
1665 MemoryTypeDdr4 = 0x1A,\r
1666 MemoryTypeLpddr = 0x1B,\r
1667 MemoryTypeLpddr2 = 0x1C,\r
1668 MemoryTypeLpddr3 = 0x1D,\r
1669 MemoryTypeLpddr4 = 0x1E\r
98cb9ae8 1670} MEMORY_DEVICE_TYPE;\r
1671\r
1672typedef struct {\r
1673 UINT16 Reserved :1;\r
1674 UINT16 Other :1;\r
1675 UINT16 Unknown :1;\r
1676 UINT16 FastPaged :1;\r
1677 UINT16 StaticColumn :1;\r
1678 UINT16 PseudoStatic :1;\r
1679 UINT16 Rambus :1;\r
1680 UINT16 Synchronous :1;\r
1681 UINT16 Cmos :1;\r
1682 UINT16 Edo :1;\r
1683 UINT16 WindowDram :1;\r
1684 UINT16 CacheDram :1;\r
1685 UINT16 Nonvolatile :1;\r
7ddba202
SZ		 1686 UINT16 Registered :1;\r
1687 UINT16 Unbuffered :1;\r
4a228334 1688 UINT16 LrDimm :1;\r
98cb9ae8 1689} MEMORY_DEVICE_TYPE_DETAIL;\r
1690\r
4135253b 1691///\r
af2dc6a7 1692/// Memory Device (Type 17).\r
4135253b 1693///\r
98cb9ae8 1694/// This structure describes a single memory device that is part of \r
1695/// a larger Physical Memory Array (Type 16).\r
1696/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
af2dc6a7 1697/// includes a Memory Device structure instance for each slot, whether or not the \r
98cb9ae8 1698/// socket is currently populated.\r
1699///\r
61ce5861 1700typedef struct {\r
98cb9ae8 1701 SMBIOS_STRUCTURE Hdr;\r
1702 UINT16 MemoryArrayHandle;\r
1703 UINT16 MemoryErrorInformationHandle;\r
1704 UINT16 TotalWidth;\r
1705 UINT16 DataWidth;\r
1706 UINT16 Size;\r
af2dc6a7 1707 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
98cb9ae8 1708 UINT8 DeviceSet;\r
1709 SMBIOS_TABLE_STRING DeviceLocator;\r
1710 SMBIOS_TABLE_STRING BankLocator;\r
af2dc6a7 1711 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
98cb9ae8 1712 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1713 UINT16 Speed;\r
1714 SMBIOS_TABLE_STRING Manufacturer;\r
1715 SMBIOS_TABLE_STRING SerialNumber;\r
1716 SMBIOS_TABLE_STRING AssetTag;\r
1717 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1718 //\r
1719 // Add for smbios 2.6\r
1720 // \r
7ddba202
SZ		 1721 UINT8 Attributes;\r
1722 //\r
1723 // Add for smbios 2.7\r
1724 //\r
1725 UINT32 ExtendedSize;\r
1726 UINT16 ConfiguredMemoryClockSpeed;\r
4a228334
EL		 1727 //\r
1728 // Add for smbios 2.8.0\r
1729 //\r
1730 UINT16 MinimumVoltage;\r
1731 UINT16 MaximumVoltage;\r
1732 UINT16 ConfiguredVoltage;\r
61ce5861 1733} SMBIOS_TABLE_TYPE17;\r
1734\r
98cb9ae8 1735///\r
af2dc6a7 1736/// 32-bit Memory Error Information - Error Type. \r
98cb9ae8 1737///\r
1738typedef enum { \r
1739 MemoryErrorOther = 0x01,\r
1740 MemoryErrorUnknown = 0x02,\r
1741 MemoryErrorOk = 0x03,\r
1742 MemoryErrorBadRead = 0x04,\r
1743 MemoryErrorParity = 0x05,\r
1744 MemoryErrorSigleBit = 0x06,\r
1745 MemoryErrorDoubleBit = 0x07,\r
1746 MemoryErrorMultiBit = 0x08,\r
1747 MemoryErrorNibble = 0x09,\r
1748 MemoryErrorChecksum = 0x0A,\r
1749 MemoryErrorCrc = 0x0B,\r
1750 MemoryErrorCorrectSingleBit = 0x0C,\r
1751 MemoryErrorCorrected = 0x0D,\r
1752 MemoryErrorUnCorrectable = 0x0E\r
1753} MEMORY_ERROR_TYPE;\r
1754\r
1755///\r
af2dc6a7 1756/// 32-bit Memory Error Information - Error Granularity. \r
98cb9ae8 1757///\r
1758typedef enum { \r
1759 MemoryGranularityOther = 0x01,\r
1760 MemoryGranularityOtherUnknown = 0x02,\r
1761 MemoryGranularityDeviceLevel = 0x03,\r
1762 MemoryGranularityMemPartitionLevel = 0x04\r
1763} MEMORY_ERROR_GRANULARITY;\r
1764\r
1765///\r
af2dc6a7 1766/// 32-bit Memory Error Information - Error Operation. \r
98cb9ae8 1767///\r
1768typedef enum { \r
1769 MemoryErrorOperationOther = 0x01,\r
1770 MemoryErrorOperationUnknown = 0x02,\r
1771 MemoryErrorOperationRead = 0x03,\r
1772 MemoryErrorOperationWrite = 0x04,\r
1773 MemoryErrorOperationPartialWrite = 0x05\r
1774} MEMORY_ERROR_OPERATION;\r
1775\r
4135253b 1776///\r
af2dc6a7 1777/// 32-bit Memory Error Information (Type 18).\r
98cb9ae8 1778/// \r
1779/// This structure identifies the specifics of an error that might be detected \r
1780/// within a Physical Memory Array.\r
4135253b 1781///\r
61ce5861 1782typedef struct {\r
98cb9ae8 1783 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1784 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1785 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1786 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1787 UINT32 VendorSyndrome;\r
1788 UINT32 MemoryArrayErrorAddress;\r
1789 UINT32 DeviceErrorAddress;\r
1790 UINT32 ErrorResolution;\r
61ce5861 1791} SMBIOS_TABLE_TYPE18;\r
1792\r
4135253b 1793///\r
af2dc6a7 1794/// Memory Array Mapped Address (Type 19).\r
4135253b 1795///\r
98cb9ae8 1796/// This structure provides the address mapping for a Physical Memory Array. \r
1797/// One structure is present for each contiguous address range described.\r
1798///\r
61ce5861 1799typedef struct {\r
1800 SMBIOS_STRUCTURE Hdr;\r
1801 UINT32 StartingAddress;\r
1802 UINT32 EndingAddress;\r
1803 UINT16 MemoryArrayHandle;\r
1804 UINT8 PartitionWidth;\r
7ddba202
SZ		 1805 //\r
1806 // Add for smbios 2.7\r
1807 //\r
1808 UINT64 ExtendedStartingAddress;\r
1809 UINT64 ExtendedEndingAddress;\r
61ce5861 1810} SMBIOS_TABLE_TYPE19;\r
1811\r
4135253b 1812///\r
af2dc6a7 1813/// Memory Device Mapped Address (Type 20).\r
4135253b 1814///\r
98cb9ae8 1815/// This structure maps memory address space usually to a device-level granularity. \r
1816/// One structure is present for each contiguous address range described. \r
1817///\r
61ce5861 1818typedef struct {\r
1819 SMBIOS_STRUCTURE Hdr;\r
1820 UINT32 StartingAddress;\r
1821 UINT32 EndingAddress;\r
1822 UINT16 MemoryDeviceHandle;\r
1823 UINT16 MemoryArrayMappedAddressHandle;\r
1824 UINT8 PartitionRowPosition;\r
1825 UINT8 InterleavePosition;\r
1826 UINT8 InterleavedDataDepth;\r
7ddba202
SZ		 1827 //\r
1828 // Add for smbios 2.7\r
1829 //\r
1830 UINT64 ExtendedStartingAddress;\r
1831 UINT64 ExtendedEndingAddress;\r
61ce5861 1832} SMBIOS_TABLE_TYPE20;\r
1833\r
98cb9ae8 1834///\r
1835/// Built-in Pointing Device - Type\r
1836///\r
1837typedef enum {\r
1838 PointingDeviceTypeOther = 0x01,\r
1839 PointingDeviceTypeUnknown = 0x02,\r
1840 PointingDeviceTypeMouse = 0x03,\r
1841 PointingDeviceTypeTrackBall = 0x04,\r
1842 PointingDeviceTypeTrackPoint = 0x05,\r
1843 PointingDeviceTypeGlidePoint = 0x06,\r
1844 PointingDeviceTouchPad = 0x07,\r
1845 PointingDeviceTouchScreen = 0x08,\r
1846 PointingDeviceOpticalSensor = 0x09\r
1847} BUILTIN_POINTING_DEVICE_TYPE;\r
1848\r
1849///\r
af2dc6a7 1850/// Built-in Pointing Device - Interface.\r
98cb9ae8 1851///\r
1852typedef enum {\r
1853 PointingDeviceInterfaceOther = 0x01,\r
1854 PointingDeviceInterfaceUnknown = 0x02,\r
1855 PointingDeviceInterfaceSerial = 0x03,\r
1856 PointingDeviceInterfacePs2 = 0x04,\r
1857 PointingDeviceInterfaceInfrared = 0x05,\r
1858 PointingDeviceInterfaceHpHil = 0x06,\r
1859 PointingDeviceInterfaceBusMouse = 0x07,\r
1860 PointingDeviceInterfaceADB = 0x08,\r
1861 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1862 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1863 PointingDeviceInterfaceUsb = 0xA2\r
1864} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1865\r
4135253b 1866///\r
af2dc6a7 1867/// Built-in Pointing Device (Type 21).\r
4135253b 1868///\r
98cb9ae8 1869/// This structure describes the attributes of the built-in pointing device for the \r
af2dc6a7 1870/// system. The presence of this structure does not imply that the built-in\r
98cb9ae8 1871/// pointing device is active for the system's use! \r
1872///\r
61ce5861 1873typedef struct {\r
98cb9ae8 1874 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1875 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1876 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
98cb9ae8 1877 UINT8 NumberOfButtons;\r
61ce5861 1878} SMBIOS_TABLE_TYPE21;\r
1879\r
98cb9ae8 1880///\r
1881/// Portable Battery - Device Chemistry\r
1882///\r
1883typedef enum { \r
1884 PortableBatteryDeviceChemistryOther = 0x01,\r
1885 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1886 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1887 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1888 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1889 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1890 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1891 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1892} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1893\r
4135253b 1894///\r
af2dc6a7 1895/// Portable Battery (Type 22).\r
4135253b 1896///\r
98cb9ae8 1897/// This structure describes the attributes of the portable battery(s) for the system. \r
1898/// The structure contains the static attributes for the group. Each structure describes \r
1f9f8414 1899/// a single battery pack's attributes.\r
98cb9ae8 1900///\r
61ce5861 1901typedef struct {\r
98cb9ae8 1902 SMBIOS_STRUCTURE Hdr;\r
1903 SMBIOS_TABLE_STRING Location;\r
1904 SMBIOS_TABLE_STRING Manufacturer;\r
1905 SMBIOS_TABLE_STRING ManufactureDate;\r
1906 SMBIOS_TABLE_STRING SerialNumber;\r
1907 SMBIOS_TABLE_STRING DeviceName;\r
af2dc6a7 1908 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
98cb9ae8 1909 UINT16 DeviceCapacity;\r
1910 UINT16 DesignVoltage;\r
1911 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1912 UINT8 MaximumErrorInBatteryData;\r
1913 UINT16 SBDSSerialNumber;\r
1914 UINT16 SBDSManufactureDate;\r
1915 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1916 UINT8 DesignCapacityMultiplier;\r
1917 UINT32 OEMSpecific;\r
61ce5861 1918} SMBIOS_TABLE_TYPE22;\r
1919\r
4135253b 1920///\r
1921/// System Reset (Type 23)\r
1922///\r
98cb9ae8 1923/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1924/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1925/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1926/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1927/// the system will re-boot according to the Boot Option at Limit. \r
1928///\r
61ce5861 1929typedef struct {\r
1930 SMBIOS_STRUCTURE Hdr;\r
1931 UINT8 Capabilities;\r
1932 UINT16 ResetCount;\r
1933 UINT16 ResetLimit;\r
1934 UINT16 TimerInterval;\r
1935 UINT16 Timeout;\r
1936} SMBIOS_TABLE_TYPE23;\r
1937\r
4135253b 1938///\r
af2dc6a7 1939/// Hardware Security (Type 24).\r
4135253b 1940///\r
98cb9ae8 1941/// This structure describes the system-wide hardware security settings. \r
1942///\r
61ce5861 1943typedef struct {\r
1944 SMBIOS_STRUCTURE Hdr;\r
1945 UINT8 HardwareSecuritySettings;\r
1946} SMBIOS_TABLE_TYPE24;\r
1947\r
4135253b 1948///\r
af2dc6a7 1949/// System Power Controls (Type 25).\r
4135253b 1950///\r
98cb9ae8 1951/// This structure describes the attributes for controlling the main power supply to the system. \r
1952/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1953/// to determine the number of seconds until the next power-on of the system. The presence of \r
1954/// this structure implies that a timed power-on facility is available for the system. \r
1955///\r
61ce5861 1956typedef struct {\r
1957 SMBIOS_STRUCTURE Hdr;\r
1958 UINT8 NextScheduledPowerOnMonth;\r
1959 UINT8 NextScheduledPowerOnDayOfMonth;\r
1960 UINT8 NextScheduledPowerOnHour;\r
1961 UINT8 NextScheduledPowerOnMinute;\r
1962 UINT8 NextScheduledPowerOnSecond;\r
1963} SMBIOS_TABLE_TYPE25;\r
1964\r
98cb9ae8 1965///\r
af2dc6a7 1966/// Voltage Probe - Location and Status.\r
98cb9ae8 1967///\r
1968typedef struct {\r
1969 UINT8 VoltageProbeSite :5;\r
1970 UINT8 VoltageProbeStatus :3;\r
1971} MISC_VOLTAGE_PROBE_LOCATION;\r
1972\r
4135253b 1973///\r
1974/// Voltage Probe (Type 26)\r
1975///\r
98cb9ae8 1976/// This describes the attributes for a voltage probe in the system. \r
1977/// Each structure describes a single voltage probe.\r
1978///\r
61ce5861 1979typedef struct {\r
98cb9ae8 1980 SMBIOS_STRUCTURE Hdr;\r
1981 SMBIOS_TABLE_STRING Description;\r
1982 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1983 UINT16 MaximumValue;\r
1984 UINT16 MinimumValue;\r
1985 UINT16 Resolution;\r
1986 UINT16 Tolerance;\r
1987 UINT16 Accuracy;\r
1988 UINT32 OEMDefined;\r
1989 UINT16 NominalValue;\r
61ce5861 1990} SMBIOS_TABLE_TYPE26;\r
1991\r
98cb9ae8 1992///\r
af2dc6a7 1993/// Cooling Device - Device Type and Status.\r
98cb9ae8 1994///\r
1995typedef struct {\r
1996 UINT8 CoolingDevice :5;\r
1997 UINT8 CoolingDeviceStatus :3;\r
1998} MISC_COOLING_DEVICE_TYPE;\r
1999\r
4135253b 2000///\r
2001/// Cooling Device (Type 27)\r
2002///\r
98cb9ae8 2003/// This structure describes the attributes for a cooling device in the system. \r
2004/// Each structure describes a single cooling device. \r
2005/// \r
61ce5861 2006typedef struct {\r
98cb9ae8 2007 SMBIOS_STRUCTURE Hdr;\r
2008 UINT16 TemperatureProbeHandle;\r
2009 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
2010 UINT8 CoolingUnitGroup;\r
2011 UINT32 OEMDefined;\r
2012 UINT16 NominalSpeed;\r
7ddba202
SZ		 2013 //\r
2014 // Add for smbios 2.7\r
2015 //\r
2016 SMBIOS_TABLE_STRING Description;\r
61ce5861 2017} SMBIOS_TABLE_TYPE27;\r
2018\r
98cb9ae8 2019///\r
af2dc6a7 2020/// Temperature Probe - Location and Status.\r
98cb9ae8 2021///\r
2022typedef struct {\r
2023 UINT8 TemperatureProbeSite :5;\r
2024 UINT8 TemperatureProbeStatus :3;\r
2025} MISC_TEMPERATURE_PROBE_LOCATION;\r
2026\r
4135253b 2027///\r
af2dc6a7 2028/// Temperature Probe (Type 28).\r
4135253b 2029///\r
98cb9ae8 2030/// This structure describes the attributes for a temperature probe in the system. \r
2031/// Each structure describes a single temperature probe. \r
2032///\r
61ce5861 2033typedef struct {\r
98cb9ae8 2034 SMBIOS_STRUCTURE Hdr;\r
2035 SMBIOS_TABLE_STRING Description;\r
2036 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
2037 UINT16 MaximumValue;\r
2038 UINT16 MinimumValue;\r
2039 UINT16 Resolution;\r
2040 UINT16 Tolerance;\r
2041 UINT16 Accuracy;\r
2042 UINT32 OEMDefined;\r
2043 UINT16 NominalValue;\r
61ce5861 2044} SMBIOS_TABLE_TYPE28;\r
2045\r
98cb9ae8 2046///\r
af2dc6a7 2047/// Electrical Current Probe - Location and Status.\r
98cb9ae8 2048///\r
2049typedef struct {\r
2050 UINT8 ElectricalCurrentProbeSite :5;\r
2051 UINT8 ElectricalCurrentProbeStatus :3;\r
2052} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2053\r
4135253b 2054///\r
af2dc6a7 2055/// Electrical Current Probe (Type 29).\r
4135253b 2056///\r
98cb9ae8 2057/// This structure describes the attributes for an electrical current probe in the system.\r
2058/// Each structure describes a single electrical current probe. \r
2059///\r
61ce5861 2060typedef struct {\r
98cb9ae8 2061 SMBIOS_STRUCTURE Hdr;\r
2062 SMBIOS_TABLE_STRING Description;\r
2063 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2064 UINT16 MaximumValue;\r
2065 UINT16 MinimumValue;\r
2066 UINT16 Resolution;\r
2067 UINT16 Tolerance;\r
2068 UINT16 Accuracy;\r
2069 UINT32 OEMDefined;\r
2070 UINT16 NominalValue;\r
61ce5861 2071} SMBIOS_TABLE_TYPE29;\r
2072\r
4135253b 2073///\r
af2dc6a7 2074/// Out-of-Band Remote Access (Type 30).\r
4135253b 2075///\r
98cb9ae8 2076/// This structure describes the attributes and policy settings of a hardware facility \r
2077/// that may be used to gain remote access to a hardware system when the operating system \r
2078/// is not available due to power-down status, hardware failures, or boot failures. \r
2079///\r
61ce5861 2080typedef struct {\r
2081 SMBIOS_STRUCTURE Hdr;\r
2082 SMBIOS_TABLE_STRING ManufacturerName;\r
2083 UINT8 Connections;\r
2084} SMBIOS_TABLE_TYPE30;\r
2085\r
4135253b 2086///\r
af2dc6a7 2087/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 2088///\r
98cb9ae8 2089/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
2090/// \r
61ce5861 2091typedef struct {\r
2092 SMBIOS_STRUCTURE Hdr;\r
2093 UINT8 Checksum;\r
2094 UINT8 Reserved1;\r
2095 UINT16 Reserved2;\r
2096 UINT32 BisEntry16;\r
2097 UINT32 BisEntry32;\r
2098 UINT64 Reserved3;\r
2099 UINT32 Reserved4;\r
2100} SMBIOS_TABLE_TYPE31;\r
2101\r
98cb9ae8 2102///\r
af2dc6a7 2103/// System Boot Information - System Boot Status.\r
98cb9ae8 2104///\r
2105typedef enum {\r
2106 BootInformationStatusNoError = 0x00,\r
2107 BootInformationStatusNoBootableMedia = 0x01,\r
2108 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2109 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2110 BootInformationStatusOSDetectedFailure = 0x04,\r
2111 BootInformationStatusUserRequestedBoot = 0x05,\r
2112 BootInformationStatusSystemSecurityViolation = 0x06,\r
2113 BootInformationStatusPreviousRequestedImage = 0x07,\r
2114 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2115 BootInformationStatusStartReserved = 0x09,\r
2116 BootInformationStatusStartOemSpecific = 0x80,\r
2117 BootInformationStatusStartProductSpecific = 0xC0\r
2118} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2119\r
4135253b 2120///\r
af2dc6a7 2121/// System Boot Information (Type 32).\r
4135253b 2122///\r
98cb9ae8 2123/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
2124/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
2125/// application via this structure. When used in the PXE environment, for example, \r
2126/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1f9f8414 2127/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
98cb9ae8 2128/// could choose to automatically download a hardware-diagnostic image to a client whose \r
2129/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2130///\r
61ce5861 2131typedef struct {\r
98cb9ae8 2132 SMBIOS_STRUCTURE Hdr;\r
2133 UINT8 Reserved[6];\r
af2dc6a7 2134 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 2135} SMBIOS_TABLE_TYPE32;\r
2136\r
4135253b 2137///\r
af2dc6a7 2138/// 64-bit Memory Error Information (Type 33).\r
4135253b 2139///\r
98cb9ae8 2140/// This structure describes an error within a Physical Memory Array, \r
2141/// when the error address is above 4G (0xFFFFFFFF).\r
2142/// \r
61ce5861 2143typedef struct {\r
98cb9ae8 2144 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2145 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2146 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2147 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 2148 UINT32 VendorSyndrome;\r
2149 UINT64 MemoryArrayErrorAddress;\r
2150 UINT64 DeviceErrorAddress;\r
2151 UINT32 ErrorResolution;\r
61ce5861 2152} SMBIOS_TABLE_TYPE33;\r
2153\r
98cb9ae8 2154///\r
af2dc6a7 2155/// Management Device - Type. \r
98cb9ae8 2156///\r
2157typedef enum {\r
2158 ManagementDeviceTypeOther = 0x01,\r
2159 ManagementDeviceTypeUnknown = 0x02,\r
2160 ManagementDeviceTypeLm75 = 0x03,\r
2161 ManagementDeviceTypeLm78 = 0x04,\r
2162 ManagementDeviceTypeLm79 = 0x05,\r
2163 ManagementDeviceTypeLm80 = 0x06,\r
2164 ManagementDeviceTypeLm81 = 0x07,\r
2165 ManagementDeviceTypeAdm9240 = 0x08,\r
2166 ManagementDeviceTypeDs1780 = 0x09,\r
2167 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2168 ManagementDeviceTypeGl518Sm = 0x0B,\r
2169 ManagementDeviceTypeW83781D = 0x0C,\r
2170 ManagementDeviceTypeHt82H791 = 0x0D\r
2171} MISC_MANAGEMENT_DEVICE_TYPE;\r
2172\r
2173///\r
af2dc6a7 2174/// Management Device - Address Type. \r
98cb9ae8 2175///\r
2176typedef enum {\r
2177 ManagementDeviceAddressTypeOther = 0x01,\r
2178 ManagementDeviceAddressTypeUnknown = 0x02,\r
2179 ManagementDeviceAddressTypeIOPort = 0x03,\r
2180 ManagementDeviceAddressTypeMemory = 0x04,\r
2181 ManagementDeviceAddressTypeSmbus = 0x05\r
2182} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2183\r
4135253b 2184///\r
af2dc6a7 2185/// Management Device (Type 34).\r
4135253b 2186///\r
98cb9ae8 2187/// The information in this structure defines the attributes of a Management Device. \r
2188/// A Management Device might control one or more fans or voltage, current, or temperature\r
2189/// probes as defined by one or more Management Device Component structures.\r
2190///\r
61ce5861 2191typedef struct {\r
98cb9ae8 2192 SMBIOS_STRUCTURE Hdr;\r
2193 SMBIOS_TABLE_STRING Description;\r
af2dc6a7 2194 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
98cb9ae8 2195 UINT32 Address;\r
af2dc6a7 2196 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 2197} SMBIOS_TABLE_TYPE34;\r
2198\r
4135253b 2199///\r
2200/// Management Device Component (Type 35)\r
2201///\r
98cb9ae8 2202/// This structure associates a cooling device or environmental probe with structures \r
2203/// that define the controlling hardware device and (optionally) the component's thresholds. \r
2204///\r
61ce5861 2205typedef struct {\r
2206 SMBIOS_STRUCTURE Hdr;\r
2207 SMBIOS_TABLE_STRING Description;\r
2208 UINT16 ManagementDeviceHandle;\r
2209 UINT16 ComponentHandle;\r
2210 UINT16 ThresholdHandle;\r
2211} SMBIOS_TABLE_TYPE35;\r
2212\r
4135253b 2213///\r
af2dc6a7 2214/// Management Device Threshold Data (Type 36).\r
4135253b 2215///\r
98cb9ae8 2216/// The information in this structure defines threshold information for \r
2217/// a component (probe or cooling-unit) contained within a Management Device. \r
2218///\r
61ce5861 2219typedef struct {\r
2220 SMBIOS_STRUCTURE Hdr;\r
2221 UINT16 LowerThresholdNonCritical;\r
2222 UINT16 UpperThresholdNonCritical;\r
2223 UINT16 LowerThresholdCritical;\r
2224 UINT16 UpperThresholdCritical;\r
2225 UINT16 LowerThresholdNonRecoverable;\r
2226 UINT16 UpperThresholdNonRecoverable;\r
2227} SMBIOS_TABLE_TYPE36;\r
2228\r
bf7ea009 2229///\r
af2dc6a7 2230/// Memory Channel Entry.\r
bf7ea009 2231///\r
61ce5861 2232typedef struct {\r
2233 UINT8 DeviceLoad;\r
2234 UINT16 DeviceHandle;\r
2235} MEMORY_DEVICE;\r
2236\r
98cb9ae8 2237///\r
af2dc6a7 2238/// Memory Channel - Channel Type.\r
98cb9ae8 2239///\r
2240typedef enum {\r
2241 MemoryChannelTypeOther = 0x01,\r
2242 MemoryChannelTypeUnknown = 0x02,\r
2243 MemoryChannelTypeRambus = 0x03,\r
2244 MemoryChannelTypeSyncLink = 0x04\r
2245} MEMORY_CHANNEL_TYPE;\r
2246\r
4135253b 2247///\r
2248/// Memory Channel (Type 37)\r
2249///\r
98cb9ae8 2250/// The information in this structure provides the correlation between a Memory Channel\r
af2dc6a7 2251/// and its associated Memory Devices. Each device presents one or more loads to the channel. \r
2252/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 2253///\r
61ce5861 2254typedef struct {\r
2255 SMBIOS_STRUCTURE Hdr;\r
2256 UINT8 ChannelType;\r
2257 UINT8 MaximumChannelLoad;\r
2258 UINT8 MemoryDeviceCount;\r
2259 MEMORY_DEVICE MemoryDevice[1];\r
2260} SMBIOS_TABLE_TYPE37;\r
2261\r
98cb9ae8 2262///\r
2263/// IPMI Device Information - BMC Interface Type\r
2264///\r
2265typedef enum {\r
2266 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
af2dc6a7 2267 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2268 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2269 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
98cb9ae8 2270 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
2271} BMC_INTERFACE_TYPE;\r
2272\r
4135253b 2273///\r
af2dc6a7 2274/// IPMI Device Information (Type 38).\r
4135253b 2275///\r
7ddba202 2276/// The information in this structure defines the attributes of an\r
98cb9ae8 2277/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
7ddba202
SZ		 2278///\r
2279/// The Type 42 structure can also be used to describe a physical management controller\r
2280/// host interface and one or more protocols that share that interface. If IPMI is not\r
2281/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2282/// Providing Type 38 is recommended for backward compatibility.\r
2283///\r
61ce5861 2284typedef struct {\r
2285 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 2286 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
61ce5861 2287 UINT8 IPMISpecificationRevision;\r
2288 UINT8 I2CSlaveAddress;\r
2289 UINT8 NVStorageDeviceAddress;\r
2290 UINT64 BaseAddress;\r
2291 UINT8 BaseAddressModifier_InterruptInfo;\r
2292 UINT8 InterruptNumber;\r
2293} SMBIOS_TABLE_TYPE38;\r
2294\r
98cb9ae8 2295///\r
af2dc6a7 2296/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 2297///\r
2298typedef struct {\r
2299 UINT16 PowerSupplyHotReplaceable:1;\r
2300 UINT16 PowerSupplyPresent :1;\r
2301 UINT16 PowerSupplyUnplugged :1;\r
2302 UINT16 InputVoltageRangeSwitch :4;\r
2303 UINT16 PowerSupplyStatus :3;\r
2304 UINT16 PowerSupplyType :4;\r
2305 UINT16 Reserved :2;\r
2306} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2307\r
4135253b 2308///\r
af2dc6a7 2309/// System Power Supply (Type 39).\r
4135253b 2310///\r
7ddba202
SZ		 2311/// This structure identifies attributes of a system power supply. One instance\r
2312/// of this record is present for each possible power supply in a system.\r
98cb9ae8 2313///\r
61ce5861 2314typedef struct {\r
98cb9ae8 2315 SMBIOS_STRUCTURE Hdr;\r
2316 UINT8 PowerUnitGroup;\r
2317 SMBIOS_TABLE_STRING Location;\r
2318 SMBIOS_TABLE_STRING DeviceName;\r
2319 SMBIOS_TABLE_STRING Manufacturer;\r
2320 SMBIOS_TABLE_STRING SerialNumber;\r
2321 SMBIOS_TABLE_STRING AssetTagNumber;\r
2322 SMBIOS_TABLE_STRING ModelPartNumber;\r
2323 SMBIOS_TABLE_STRING RevisionLevel;\r
2324 UINT16 MaxPowerCapacity;\r
2325 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2326 UINT16 InputVoltageProbeHandle;\r
2327 UINT16 CoolingDeviceHandle;\r
2328 UINT16 InputCurrentProbeHandle;\r
61ce5861 2329} SMBIOS_TABLE_TYPE39;\r
2330\r
bf7ea009 2331///\r
af2dc6a7 2332/// Additional Information Entry Format. \r
bf7ea009 2333///\r
61ce5861 2334typedef struct { \r
2335 UINT8 EntryLength; \r
2336 UINT16 ReferencedHandle;\r
2337 UINT8 ReferencedOffset;\r
2338 SMBIOS_TABLE_STRING EntryString;\r
2339 UINT8 Value[1];\r
2340}ADDITIONAL_INFORMATION_ENTRY;\r
2341\r
4135253b 2342///\r
af2dc6a7 2343/// Additional Information (Type 40).\r
4135253b 2344///\r
98cb9ae8 2345/// This structure is intended to provide additional information for handling unspecified \r
2346/// enumerated values and interim field updates in another structure. \r
2347///\r
61ce5861 2348typedef struct {\r
2349 SMBIOS_STRUCTURE Hdr;\r
2350 UINT8 NumberOfAdditionalInformationEntries;\r
2351 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
2352} SMBIOS_TABLE_TYPE40;\r
2353\r
98cb9ae8 2354///\r
af2dc6a7 2355/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2356///\r
2357typedef enum{\r
2358 OnBoardDeviceExtendedTypeOther = 0x01,\r
2359 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2360 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2361 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2362 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2363 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2364 OnBoardDeviceExtendedTypeSound = 0x07,\r
2365 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2366 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2367 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2368} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2369\r
4135253b 2370///\r
af2dc6a7 2371/// Onboard Devices Extended Information (Type 41).\r
4135253b 2372///\r
98cb9ae8 2373/// The information in this structure defines the attributes of devices that \r
2374/// are onboard (soldered onto) a system element, usually the baseboard. \r
2375/// In general, an entry in this table implies that the BIOS has some level of \r
2376/// control over the enabling of the associated device for use by the system. \r
2377///\r
61ce5861 2378typedef struct {\r
98cb9ae8 2379 SMBIOS_STRUCTURE Hdr;\r
2380 SMBIOS_TABLE_STRING ReferenceDesignation;\r
af2dc6a7 2381 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2382 UINT8 DeviceTypeInstance;\r
2383 UINT16 SegmentGroupNum;\r
2384 UINT8 BusNum;\r
7ddba202 2385 UINT8 DevFuncNum;\r
61ce5861 2386} SMBIOS_TABLE_TYPE41;\r
2387\r
7ddba202
SZ		 2388///\r
2389/// Management Controller Host Interface (Type 42).\r
2390///\r
2391/// The information in this structure defines the attributes of a Management\r
2392/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2393///\r
2394/// Type 42 should be used for management controller host interfaces that use protocols\r
2395/// other than IPMI or that use multiple protocols on a single host interface type.\r
2396///\r
2397/// This structure should also be provided if IPMI is shared with other protocols\r
2398/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2399/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2400/// recommended for backward compatibility. The structures are not required to\r
2401/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2402/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2403/// that do not yet recognize the Type 42 structure.\r
2404///\r
2405typedef struct {\r
2406 SMBIOS_STRUCTURE Hdr;\r
2407 UINT8 InterfaceType;\r
2408 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r
2409} SMBIOS_TABLE_TYPE42;\r
2410\r
713e4b00
LA		 2411///\r
2412/// TPM Device (Type 43).\r
2413///\r
2414typedef struct {\r
2415 SMBIOS_STRUCTURE Hdr;\r
2416 UINT8 VendorID[4];\r
2417 UINT8 MajorSpecVersion;\r
2418 UINT8 MinorSpecVersion;\r
2419 UINT32 FirmwareVersion1;\r
2420 UINT32 FirmwareVersion2;\r
2421 SMBIOS_TABLE_STRING Description;\r
2422 UINT64 Characteristics;\r
2423 UINT32 OemDefined;\r
2424} SMBIOS_TABLE_TYPE43;\r
2425\r
4135253b 2426///\r
2427/// Inactive (Type 126)\r
2428///\r
61ce5861 2429typedef struct {\r
2430 SMBIOS_STRUCTURE Hdr;\r
2431} SMBIOS_TABLE_TYPE126;\r
2432\r
4135253b 2433///\r
2434/// End-of-Table (Type 127)\r
2435///\r
61ce5861 2436typedef struct {\r
2437 SMBIOS_STRUCTURE Hdr;\r
2438} SMBIOS_TABLE_TYPE127;\r
2439\r
4135253b 2440///\r
af2dc6a7 2441/// Union of all the possible SMBIOS record types.\r
4135253b 2442///\r
61ce5861 2443typedef union {\r
2444 SMBIOS_STRUCTURE *Hdr;\r
2445 SMBIOS_TABLE_TYPE0 *Type0;\r
2446 SMBIOS_TABLE_TYPE1 *Type1;\r
2447 SMBIOS_TABLE_TYPE2 *Type2;\r
2448 SMBIOS_TABLE_TYPE3 *Type3;\r
2449 SMBIOS_TABLE_TYPE4 *Type4;\r
2450 SMBIOS_TABLE_TYPE5 *Type5;\r
2451 SMBIOS_TABLE_TYPE6 *Type6;\r
2452 SMBIOS_TABLE_TYPE7 *Type7;\r
2453 SMBIOS_TABLE_TYPE8 *Type8;\r
2454 SMBIOS_TABLE_TYPE9 *Type9;\r
2455 SMBIOS_TABLE_TYPE10 *Type10;\r
2456 SMBIOS_TABLE_TYPE11 *Type11;\r
2457 SMBIOS_TABLE_TYPE12 *Type12;\r
2458 SMBIOS_TABLE_TYPE13 *Type13;\r
2459 SMBIOS_TABLE_TYPE14 *Type14;\r
2460 SMBIOS_TABLE_TYPE15 *Type15;\r
2461 SMBIOS_TABLE_TYPE16 *Type16;\r
2462 SMBIOS_TABLE_TYPE17 *Type17;\r
2463 SMBIOS_TABLE_TYPE18 *Type18;\r
2464 SMBIOS_TABLE_TYPE19 *Type19;\r
2465 SMBIOS_TABLE_TYPE20 *Type20;\r
2466 SMBIOS_TABLE_TYPE21 *Type21;\r
2467 SMBIOS_TABLE_TYPE22 *Type22;\r
2468 SMBIOS_TABLE_TYPE23 *Type23;\r
2469 SMBIOS_TABLE_TYPE24 *Type24;\r
2470 SMBIOS_TABLE_TYPE25 *Type25;\r
2471 SMBIOS_TABLE_TYPE26 *Type26;\r
2472 SMBIOS_TABLE_TYPE27 *Type27;\r
2473 SMBIOS_TABLE_TYPE28 *Type28;\r
2474 SMBIOS_TABLE_TYPE29 *Type29;\r
2475 SMBIOS_TABLE_TYPE30 *Type30;\r
2476 SMBIOS_TABLE_TYPE31 *Type31;\r
2477 SMBIOS_TABLE_TYPE32 *Type32;\r
2478 SMBIOS_TABLE_TYPE33 *Type33;\r
2479 SMBIOS_TABLE_TYPE34 *Type34;\r
2480 SMBIOS_TABLE_TYPE35 *Type35;\r
2481 SMBIOS_TABLE_TYPE36 *Type36;\r
2482 SMBIOS_TABLE_TYPE37 *Type37;\r
2483 SMBIOS_TABLE_TYPE38 *Type38;\r
2484 SMBIOS_TABLE_TYPE39 *Type39;\r
2485 SMBIOS_TABLE_TYPE40 *Type40;\r
2486 SMBIOS_TABLE_TYPE41 *Type41;\r
884f9295 2487 SMBIOS_TABLE_TYPE42 *Type42;\r
713e4b00 2488 SMBIOS_TABLE_TYPE43 *Type43;\r
61ce5861 2489 SMBIOS_TABLE_TYPE126 *Type126;\r
2490 SMBIOS_TABLE_TYPE127 *Type127;\r
2491 UINT8 *Raw;\r
2492} SMBIOS_STRUCTURE_POINTER;\r
2493\r
766f4bc1 2494#pragma pack()\r
2495\r
a7ed1e2e 2496#endif\r
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