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Update the text to use "x64" instead of "X64" in MdePkg.
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ac644614 1/** @file\r
50a64e5b 2 Provides string functions, linked list functions, math functions, synchronization\r
3 functions, and CPU architecture specific functions.\r
ac644614 4\r
50a64e5b 5Copyright (c) 2006 - 2008, Intel Corporation\r
6All rights reserved. This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
ac644614 10\r
50a64e5b 11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
ac644614 13\r
14**/\r
15\r
16#ifndef __BASE_LIB__\r
17#define __BASE_LIB__\r
18\r
fc30687f 19///\r
1106ffe1 20/// Definitions for SPIN_LOCK\r
fc30687f 21///\r
ac644614 22typedef volatile UINTN SPIN_LOCK;\r
23\r
1106ffe1 24//\r
25// Definitions for architecture specific types\r
26//\r
ac644614 27#if defined (MDE_CPU_IA32)\r
fc30687f 28///\r
29/// IA32 context buffer used by SetJump() and LongJump()\r
30///\r
ac644614 31typedef struct {\r
32 UINT32 Ebx;\r
33 UINT32 Esi;\r
34 UINT32 Edi;\r
35 UINT32 Ebp;\r
36 UINT32 Esp;\r
37 UINT32 Eip;\r
38} BASE_LIBRARY_JUMP_BUFFER;\r
39\r
40#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
41\r
aa4df547 42#endif // defined (MDE_CPU_IA32)\r
43\r
44#if defined (MDE_CPU_IPF)\r
ac644614 45\r
fc30687f 46///\r
47/// IPF context buffer used by SetJump() and LongJump()\r
48///\r
ac644614 49typedef struct {\r
50 UINT64 F2[2];\r
51 UINT64 F3[2];\r
52 UINT64 F4[2];\r
53 UINT64 F5[2];\r
54 UINT64 F16[2];\r
55 UINT64 F17[2];\r
56 UINT64 F18[2];\r
57 UINT64 F19[2];\r
58 UINT64 F20[2];\r
59 UINT64 F21[2];\r
60 UINT64 F22[2];\r
61 UINT64 F23[2];\r
62 UINT64 F24[2];\r
63 UINT64 F25[2];\r
64 UINT64 F26[2];\r
65 UINT64 F27[2];\r
66 UINT64 F28[2];\r
67 UINT64 F29[2];\r
68 UINT64 F30[2];\r
69 UINT64 F31[2];\r
70 UINT64 R4;\r
71 UINT64 R5;\r
72 UINT64 R6;\r
73 UINT64 R7;\r
74 UINT64 SP;\r
75 UINT64 BR0;\r
76 UINT64 BR1;\r
77 UINT64 BR2;\r
78 UINT64 BR3;\r
79 UINT64 BR4;\r
80 UINT64 BR5;\r
81 UINT64 InitialUNAT;\r
82 UINT64 AfterSpillUNAT;\r
83 UINT64 PFS;\r
84 UINT64 BSP;\r
85 UINT64 Predicates;\r
86 UINT64 LoopCount;\r
87 UINT64 FPSR;\r
88} BASE_LIBRARY_JUMP_BUFFER;\r
89\r
90#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r
91\r
aa4df547 92#endif // defined (MDE_CPU_IPF)\r
93\r
94#if defined (MDE_CPU_X64)\r
fc30687f 95///\r
030cd1a2 96/// x64 context buffer used by SetJump() and LongJump()\r
fc30687f 97///\r
ac644614 98typedef struct {\r
99 UINT64 Rbx;\r
100 UINT64 Rsp;\r
101 UINT64 Rbp;\r
102 UINT64 Rdi;\r
103 UINT64 Rsi;\r
104 UINT64 R12;\r
105 UINT64 R13;\r
106 UINT64 R14;\r
107 UINT64 R15;\r
108 UINT64 Rip;\r
109} BASE_LIBRARY_JUMP_BUFFER;\r
110\r
111#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
112\r
aa4df547 113#endif // defined (MDE_CPU_X64)\r
114\r
115#if defined (MDE_CPU_EBC)\r
fc30687f 116///\r
117/// EBC context buffer used by SetJump() and LongJump()\r
118///\r
ac644614 119typedef struct {\r
120 UINT64 R0;\r
121 UINT64 R1;\r
122 UINT64 R2;\r
123 UINT64 R3;\r
124 UINT64 IP;\r
125} BASE_LIBRARY_JUMP_BUFFER;\r
126\r
127#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
128\r
aa4df547 129#endif // defined (MDE_CPU_EBC)\r
ac644614 130\r
131//\r
132// String Services\r
133//\r
134\r
135/**\r
136 Copies one Null-terminated Unicode string to another Null-terminated Unicode\r
137 string and returns the new Unicode string.\r
138\r
139 This function copies the contents of the Unicode string Source to the Unicode\r
140 string Destination, and returns Destination. If Source and Destination\r
141 overlap, then the results are undefined.\r
142\r
143 If Destination is NULL, then ASSERT().\r
144 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
145 If Source is NULL, then ASSERT().\r
146 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
147 If Source and Destination overlap, then ASSERT().\r
148 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
149 PcdMaximumUnicodeStringLength Unicode characters not including the\r
150 Null-terminator, then ASSERT().\r
151\r
152 @param Destination Pointer to a Null-terminated Unicode string.\r
153 @param Source Pointer to a Null-terminated Unicode string.\r
154\r
9aa049d9 155 @return Destination.\r
ac644614 156\r
157**/\r
158CHAR16 *\r
159EFIAPI\r
160StrCpy (\r
161 OUT CHAR16 *Destination,\r
162 IN CONST CHAR16 *Source\r
163 );\r
164\r
165\r
166/**\r
17f695ed 167 Copies up to a specified length from one Null-terminated Unicode string to \r
168 another Null-terminated Unicode string and returns the new Unicode string.\r
ac644614 169\r
170 This function copies the contents of the Unicode string Source to the Unicode\r
171 string Destination, and returns Destination. At most, Length Unicode\r
172 characters are copied from Source to Destination. If Length is 0, then\r
173 Destination is returned unmodified. If Length is greater that the number of\r
174 Unicode characters in Source, then Destination is padded with Null Unicode\r
175 characters. If Source and Destination overlap, then the results are\r
176 undefined.\r
177\r
178 If Length > 0 and Destination is NULL, then ASSERT().\r
179 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
180 If Length > 0 and Source is NULL, then ASSERT().\r
181 If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().\r
182 If Source and Destination overlap, then ASSERT().\r
183 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
184 PcdMaximumUnicodeStringLength Unicode characters not including the\r
185 Null-terminator, then ASSERT().\r
186\r
187 @param Destination Pointer to a Null-terminated Unicode string.\r
188 @param Source Pointer to a Null-terminated Unicode string.\r
189 @param Length Maximum number of Unicode characters to copy.\r
190\r
9aa049d9 191 @return Destination.\r
ac644614 192\r
193**/\r
194CHAR16 *\r
195EFIAPI\r
196StrnCpy (\r
197 OUT CHAR16 *Destination,\r
198 IN CONST CHAR16 *Source,\r
199 IN UINTN Length\r
200 );\r
201\r
202\r
203/**\r
204 Returns the length of a Null-terminated Unicode string.\r
205\r
206 This function returns the number of Unicode characters in the Null-terminated\r
207 Unicode string specified by String.\r
208\r
209 If String is NULL, then ASSERT().\r
210 If String is not aligned on a 16-bit boundary, then ASSERT().\r
211 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
212 PcdMaximumUnicodeStringLength Unicode characters not including the\r
213 Null-terminator, then ASSERT().\r
214\r
215 @param String Pointer to a Null-terminated Unicode string.\r
216\r
217 @return The length of String.\r
218\r
219**/\r
220UINTN\r
221EFIAPI\r
222StrLen (\r
223 IN CONST CHAR16 *String\r
224 );\r
225\r
226\r
227/**\r
228 Returns the size of a Null-terminated Unicode string in bytes, including the\r
229 Null terminator.\r
230\r
17f695ed 231 This function returns the size, in bytes, of the Null-terminated Unicode string \r
232 specified by String.\r
ac644614 233\r
234 If String is NULL, then ASSERT().\r
235 If String is not aligned on a 16-bit boundary, then ASSERT().\r
236 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
237 PcdMaximumUnicodeStringLength Unicode characters not including the\r
238 Null-terminator, then ASSERT().\r
239\r
240 @param String Pointer to a Null-terminated Unicode string.\r
241\r
242 @return The size of String.\r
243\r
244**/\r
245UINTN\r
246EFIAPI\r
247StrSize (\r
248 IN CONST CHAR16 *String\r
249 );\r
250\r
251\r
252/**\r
253 Compares two Null-terminated Unicode strings, and returns the difference\r
254 between the first mismatched Unicode characters.\r
255\r
256 This function compares the Null-terminated Unicode string FirstString to the\r
257 Null-terminated Unicode string SecondString. If FirstString is identical to\r
258 SecondString, then 0 is returned. Otherwise, the value returned is the first\r
259 mismatched Unicode character in SecondString subtracted from the first\r
260 mismatched Unicode character in FirstString.\r
261\r
262 If FirstString is NULL, then ASSERT().\r
263 If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
264 If SecondString is NULL, then ASSERT().\r
265 If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
266 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
267 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
268 Null-terminator, then ASSERT().\r
269 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
270 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
271 Null-terminator, then ASSERT().\r
272\r
273 @param FirstString Pointer to a Null-terminated Unicode string.\r
274 @param SecondString Pointer to a Null-terminated Unicode string.\r
275\r
1106ffe1 276 @retval 0 FirstString is identical to SecondString.\r
277 @return others FirstString is not identical to SecondString.\r
ac644614 278\r
279**/\r
280INTN\r
281EFIAPI\r
282StrCmp (\r
283 IN CONST CHAR16 *FirstString,\r
284 IN CONST CHAR16 *SecondString\r
285 );\r
286\r
287\r
288/**\r
17f695ed 289 Compares up to a specified length the contents of two Null-terminated Unicode strings,\r
290 and returns the difference between the first mismatched Unicode characters.\r
291 \r
ac644614 292 This function compares the Null-terminated Unicode string FirstString to the\r
293 Null-terminated Unicode string SecondString. At most, Length Unicode\r
294 characters will be compared. If Length is 0, then 0 is returned. If\r
295 FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
296 value returned is the first mismatched Unicode character in SecondString\r
297 subtracted from the first mismatched Unicode character in FirstString.\r
298\r
299 If Length > 0 and FirstString is NULL, then ASSERT().\r
300 If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().\r
301 If Length > 0 and SecondString is NULL, then ASSERT().\r
302 If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().\r
303 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
304 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
305 Null-terminator, then ASSERT().\r
306 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
307 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
308 Null-terminator, then ASSERT().\r
309\r
310 @param FirstString Pointer to a Null-terminated Unicode string.\r
311 @param SecondString Pointer to a Null-terminated Unicode string.\r
312 @param Length Maximum number of Unicode characters to compare.\r
313\r
1106ffe1 314 @retval 0 FirstString is identical to SecondString.\r
315 @return others FirstString is not identical to SecondString.\r
ac644614 316\r
317**/\r
318INTN\r
319EFIAPI\r
320StrnCmp (\r
321 IN CONST CHAR16 *FirstString,\r
322 IN CONST CHAR16 *SecondString,\r
323 IN UINTN Length\r
324 );\r
325\r
326\r
327/**\r
328 Concatenates one Null-terminated Unicode string to another Null-terminated\r
329 Unicode string, and returns the concatenated Unicode string.\r
330\r
331 This function concatenates two Null-terminated Unicode strings. The contents\r
332 of Null-terminated Unicode string Source are concatenated to the end of\r
333 Null-terminated Unicode string Destination. The Null-terminated concatenated\r
334 Unicode String is returned. If Source and Destination overlap, then the\r
335 results are undefined.\r
336\r
337 If Destination is NULL, then ASSERT().\r
338 If Destination is not aligned on a 16-bit bounadary, then ASSERT().\r
339 If Source is NULL, then ASSERT().\r
340 If Source is not aligned on a 16-bit bounadary, then ASSERT().\r
341 If Source and Destination overlap, then ASSERT().\r
342 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
343 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
344 Null-terminator, then ASSERT().\r
345 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
346 PcdMaximumUnicodeStringLength Unicode characters not including the\r
347 Null-terminator, then ASSERT().\r
348 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
349 and Source results in a Unicode string with more than\r
350 PcdMaximumUnicodeStringLength Unicode characters not including the\r
351 Null-terminator, then ASSERT().\r
352\r
353 @param Destination Pointer to a Null-terminated Unicode string.\r
354 @param Source Pointer to a Null-terminated Unicode string.\r
355\r
9aa049d9 356 @return Destination.\r
ac644614 357\r
358**/\r
359CHAR16 *\r
360EFIAPI\r
361StrCat (\r
362 IN OUT CHAR16 *Destination,\r
363 IN CONST CHAR16 *Source\r
364 );\r
365\r
366\r
367/**\r
17f695ed 368 Concatenates up to a specified length one Null-terminated Unicode to the end \r
369 of another Null-terminated Unicode string, and returns the concatenated \r
ac644614 370 Unicode string.\r
371\r
372 This function concatenates two Null-terminated Unicode strings. The contents\r
373 of Null-terminated Unicode string Source are concatenated to the end of\r
374 Null-terminated Unicode string Destination, and Destination is returned. At\r
375 most, Length Unicode characters are concatenated from Source to the end of\r
376 Destination, and Destination is always Null-terminated. If Length is 0, then\r
377 Destination is returned unmodified. If Source and Destination overlap, then\r
378 the results are undefined.\r
379\r
380 If Destination is NULL, then ASSERT().\r
381 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
382 If Length > 0 and Source is NULL, then ASSERT().\r
383 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
384 If Source and Destination overlap, then ASSERT().\r
385 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
386 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
387 Null-terminator, then ASSERT().\r
388 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
389 PcdMaximumUnicodeStringLength Unicode characters not including the\r
390 Null-terminator, then ASSERT().\r
391 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
392 and Source results in a Unicode string with more than\r
393 PcdMaximumUnicodeStringLength Unicode characters not including the\r
394 Null-terminator, then ASSERT().\r
395\r
396 @param Destination Pointer to a Null-terminated Unicode string.\r
397 @param Source Pointer to a Null-terminated Unicode string.\r
398 @param Length Maximum number of Unicode characters to concatenate from\r
399 Source.\r
400\r
9aa049d9 401 @return Destination.\r
ac644614 402\r
403**/\r
404CHAR16 *\r
405EFIAPI\r
406StrnCat (\r
407 IN OUT CHAR16 *Destination,\r
408 IN CONST CHAR16 *Source,\r
409 IN UINTN Length\r
410 );\r
411\r
412/**\r
9aa049d9 413 Returns the first occurrence of a Null-terminated Unicode sub-string\r
ac644614 414 in a Null-terminated Unicode string.\r
415\r
416 This function scans the contents of the Null-terminated Unicode string\r
417 specified by String and returns the first occurrence of SearchString.\r
418 If SearchString is not found in String, then NULL is returned. If\r
419 the length of SearchString is zero, then String is\r
420 returned.\r
421\r
422 If String is NULL, then ASSERT().\r
423 If String is not aligned on a 16-bit boundary, then ASSERT().\r
424 If SearchString is NULL, then ASSERT().\r
425 If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r
426\r
427 If PcdMaximumUnicodeStringLength is not zero, and SearchString\r
428 or String contains more than PcdMaximumUnicodeStringLength Unicode\r
429 characters not including the Null-terminator, then ASSERT().\r
430\r
17f695ed 431 @param String Pointer to a Null-terminated Unicode string.\r
432 @param SearchString Pointer to a Null-terminated Unicode string to search for.\r
ac644614 433\r
434 @retval NULL If the SearchString does not appear in String.\r
1106ffe1 435 @return others If there is a match.\r
ac644614 436\r
437**/\r
438CHAR16 *\r
439EFIAPI\r
440StrStr (\r
17f695ed 441 IN CONST CHAR16 *String,\r
442 IN CONST CHAR16 *SearchString\r
ac644614 443 );\r
444\r
445/**\r
446 Convert a Null-terminated Unicode decimal string to a value of\r
447 type UINTN.\r
448\r
449 This function returns a value of type UINTN by interpreting the contents\r
450 of the Unicode string specified by String as a decimal number. The format\r
451 of the input Unicode string String is:\r
452\r
453 [spaces] [decimal digits].\r
454\r
455 The valid decimal digit character is in the range [0-9]. The\r
456 function will ignore the pad space, which includes spaces or\r
457 tab characters, before [decimal digits]. The running zero in the\r
458 beginning of [decimal digits] will be ignored. Then, the function\r
459 stops at the first character that is a not a valid decimal character\r
460 or a Null-terminator, whichever one comes first.\r
461\r
462 If String is NULL, then ASSERT().\r
463 If String is not aligned in a 16-bit boundary, then ASSERT().\r
464 If String has only pad spaces, then 0 is returned.\r
465 If String has no pad spaces or valid decimal digits,\r
466 then 0 is returned.\r
467 If the number represented by String overflows according\r
468 to the range defined by UINTN, then ASSERT().\r
469\r
470 If PcdMaximumUnicodeStringLength is not zero, and String contains\r
471 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
472 the Null-terminator, then ASSERT().\r
473\r
17f695ed 474 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 475\r
38bbd3d9 476 @retval Value translated from String.\r
ac644614 477\r
478**/\r
479UINTN\r
480EFIAPI\r
481StrDecimalToUintn (\r
17f695ed 482 IN CONST CHAR16 *String\r
ac644614 483 );\r
484\r
485/**\r
486 Convert a Null-terminated Unicode decimal string to a value of\r
487 type UINT64.\r
488\r
489 This function returns a value of type UINT64 by interpreting the contents\r
490 of the Unicode string specified by String as a decimal number. The format\r
491 of the input Unicode string String is:\r
492\r
493 [spaces] [decimal digits].\r
494\r
495 The valid decimal digit character is in the range [0-9]. The\r
496 function will ignore the pad space, which includes spaces or\r
497 tab characters, before [decimal digits]. The running zero in the\r
498 beginning of [decimal digits] will be ignored. Then, the function\r
499 stops at the first character that is a not a valid decimal character\r
500 or a Null-terminator, whichever one comes first.\r
501\r
502 If String is NULL, then ASSERT().\r
503 If String is not aligned in a 16-bit boundary, then ASSERT().\r
504 If String has only pad spaces, then 0 is returned.\r
505 If String has no pad spaces or valid decimal digits,\r
506 then 0 is returned.\r
507 If the number represented by String overflows according\r
508 to the range defined by UINT64, then ASSERT().\r
509\r
510 If PcdMaximumUnicodeStringLength is not zero, and String contains\r
511 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
512 the Null-terminator, then ASSERT().\r
513\r
17f695ed 514 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 515\r
38bbd3d9 516 @retval Value translated from String.\r
ac644614 517\r
518**/\r
519UINT64\r
520EFIAPI\r
521StrDecimalToUint64 (\r
17f695ed 522 IN CONST CHAR16 *String\r
ac644614 523 );\r
524 \r
525\r
526/**\r
527 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
528\r
529 This function returns a value of type UINTN by interpreting the contents\r
530 of the Unicode string specified by String as a hexadecimal number.\r
531 The format of the input Unicode string String is:\r
532\r
533 [spaces][zeros][x][hexadecimal digits].\r
534\r
535 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
536 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
537 If "x" appears in the input string, it must be prefixed with at least one 0.\r
538 The function will ignore the pad space, which includes spaces or tab characters,\r
539 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
540 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
541 first valid hexadecimal digit. Then, the function stops at the first character that is\r
542 a not a valid hexadecimal character or NULL, whichever one comes first.\r
543\r
544 If String is NULL, then ASSERT().\r
545 If String is not aligned in a 16-bit boundary, then ASSERT().\r
546 If String has only pad spaces, then zero is returned.\r
547 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
548 then zero is returned.\r
549 If the number represented by String overflows according to the range defined by\r
550 UINTN, then ASSERT().\r
551\r
552 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
553 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
554 then ASSERT().\r
555\r
17f695ed 556 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 557\r
38bbd3d9 558 @retval Value translated from String.\r
ac644614 559\r
560**/\r
561UINTN\r
562EFIAPI\r
563StrHexToUintn (\r
17f695ed 564 IN CONST CHAR16 *String\r
ac644614 565 );\r
566\r
567\r
568/**\r
569 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r
570\r
571 This function returns a value of type UINT64 by interpreting the contents\r
572 of the Unicode string specified by String as a hexadecimal number.\r
573 The format of the input Unicode string String is\r
574\r
575 [spaces][zeros][x][hexadecimal digits].\r
576\r
577 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
578 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
579 If "x" appears in the input string, it must be prefixed with at least one 0.\r
580 The function will ignore the pad space, which includes spaces or tab characters,\r
581 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
582 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
583 first valid hexadecimal digit. Then, the function stops at the first character that is\r
584 a not a valid hexadecimal character or NULL, whichever one comes first.\r
585\r
586 If String is NULL, then ASSERT().\r
587 If String is not aligned in a 16-bit boundary, then ASSERT().\r
588 If String has only pad spaces, then zero is returned.\r
589 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
590 then zero is returned.\r
591 If the number represented by String overflows according to the range defined by\r
592 UINT64, then ASSERT().\r
593\r
594 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
595 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
596 then ASSERT().\r
597\r
17f695ed 598 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 599\r
38bbd3d9 600 @retval Value translated from String.\r
ac644614 601\r
602**/\r
603UINT64\r
604EFIAPI\r
605StrHexToUint64 (\r
17f695ed 606 IN CONST CHAR16 *String\r
ac644614 607 );\r
608\r
ac644614 609/**\r
17f695ed 610 Convert a Null-terminated Unicode string to a Null-terminated\r
ac644614 611 ASCII string and returns the ASCII string.\r
612\r
613 This function converts the content of the Unicode string Source\r
614 to the ASCII string Destination by copying the lower 8 bits of\r
615 each Unicode character. It returns Destination.\r
616\r
617 If any Unicode characters in Source contain non-zero value in\r
618 the upper 8 bits, then ASSERT().\r
619\r
620 If Destination is NULL, then ASSERT().\r
621 If Source is NULL, then ASSERT().\r
622 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
623 If Source and Destination overlap, then ASSERT().\r
624\r
625 If PcdMaximumUnicodeStringLength is not zero, and Source contains\r
626 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
627 the Null-terminator, then ASSERT().\r
628\r
629 If PcdMaximumAsciiStringLength is not zero, and Source contains more\r
630 than PcdMaximumAsciiStringLength Unicode characters not including the\r
631 Null-terminator, then ASSERT().\r
632\r
633 @param Source Pointer to a Null-terminated Unicode string.\r
634 @param Destination Pointer to a Null-terminated ASCII string.\r
635\r
9aa049d9 636 @return Destination.\r
ac644614 637\r
638**/\r
639CHAR8 *\r
640EFIAPI\r
641UnicodeStrToAsciiStr (\r
17f695ed 642 IN CONST CHAR16 *Source,\r
643 OUT CHAR8 *Destination\r
ac644614 644 );\r
645\r
646\r
647/**\r
648 Copies one Null-terminated ASCII string to another Null-terminated ASCII\r
649 string and returns the new ASCII string.\r
650\r
651 This function copies the contents of the ASCII string Source to the ASCII\r
652 string Destination, and returns Destination. If Source and Destination\r
653 overlap, then the results are undefined.\r
654\r
655 If Destination is NULL, then ASSERT().\r
656 If Source is NULL, then ASSERT().\r
657 If Source and Destination overlap, then ASSERT().\r
658 If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
659 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
660 then ASSERT().\r
661\r
662 @param Destination Pointer to a Null-terminated ASCII string.\r
663 @param Source Pointer to a Null-terminated ASCII string.\r
664\r
665 @return Destination\r
666\r
667**/\r
668CHAR8 *\r
669EFIAPI\r
670AsciiStrCpy (\r
671 OUT CHAR8 *Destination,\r
672 IN CONST CHAR8 *Source\r
673 );\r
674\r
675\r
676/**\r
17f695ed 677 Copies up to a specified length one Null-terminated ASCII string to another \r
678 Null-terminated ASCII string and returns the new ASCII string.\r
ac644614 679\r
680 This function copies the contents of the ASCII string Source to the ASCII\r
681 string Destination, and returns Destination. At most, Length ASCII characters\r
682 are copied from Source to Destination. If Length is 0, then Destination is\r
683 returned unmodified. If Length is greater that the number of ASCII characters\r
684 in Source, then Destination is padded with Null ASCII characters. If Source\r
685 and Destination overlap, then the results are undefined.\r
686\r
687 If Destination is NULL, then ASSERT().\r
688 If Source is NULL, then ASSERT().\r
689 If Source and Destination overlap, then ASSERT().\r
690 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
691 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
692 then ASSERT().\r
693\r
694 @param Destination Pointer to a Null-terminated ASCII string.\r
695 @param Source Pointer to a Null-terminated ASCII string.\r
696 @param Length Maximum number of ASCII characters to copy.\r
697\r
698 @return Destination\r
699\r
700**/\r
701CHAR8 *\r
702EFIAPI\r
703AsciiStrnCpy (\r
704 OUT CHAR8 *Destination,\r
705 IN CONST CHAR8 *Source,\r
706 IN UINTN Length\r
707 );\r
708\r
709\r
710/**\r
711 Returns the length of a Null-terminated ASCII string.\r
712\r
713 This function returns the number of ASCII characters in the Null-terminated\r
714 ASCII string specified by String.\r
715\r
716 If Length > 0 and Destination is NULL, then ASSERT().\r
717 If Length > 0 and Source is NULL, then ASSERT().\r
718 If PcdMaximumAsciiStringLength is not zero and String contains more than\r
719 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
720 then ASSERT().\r
721\r
722 @param String Pointer to a Null-terminated ASCII string.\r
723\r
724 @return The length of String.\r
725\r
726**/\r
727UINTN\r
728EFIAPI\r
729AsciiStrLen (\r
730 IN CONST CHAR8 *String\r
731 );\r
732\r
733\r
734/**\r
735 Returns the size of a Null-terminated ASCII string in bytes, including the\r
736 Null terminator.\r
737\r
738 This function returns the size, in bytes, of the Null-terminated ASCII string\r
739 specified by String.\r
740\r
741 If String is NULL, then ASSERT().\r
742 If PcdMaximumAsciiStringLength is not zero and String contains more than\r
743 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
744 then ASSERT().\r
745\r
746 @param String Pointer to a Null-terminated ASCII string.\r
747\r
748 @return The size of String.\r
749\r
750**/\r
751UINTN\r
752EFIAPI\r
753AsciiStrSize (\r
754 IN CONST CHAR8 *String\r
755 );\r
756\r
757\r
758/**\r
759 Compares two Null-terminated ASCII strings, and returns the difference\r
760 between the first mismatched ASCII characters.\r
761\r
762 This function compares the Null-terminated ASCII string FirstString to the\r
763 Null-terminated ASCII string SecondString. If FirstString is identical to\r
764 SecondString, then 0 is returned. Otherwise, the value returned is the first\r
765 mismatched ASCII character in SecondString subtracted from the first\r
766 mismatched ASCII character in FirstString.\r
767\r
768 If FirstString is NULL, then ASSERT().\r
769 If SecondString is NULL, then ASSERT().\r
770 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
771 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
772 then ASSERT().\r
773 If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
774 than PcdMaximumAsciiStringLength ASCII characters not including the\r
775 Null-terminator, then ASSERT().\r
776\r
777 @param FirstString Pointer to a Null-terminated ASCII string.\r
778 @param SecondString Pointer to a Null-terminated ASCII string.\r
779\r
17f695ed 780 @retval ==0 FirstString is identical to SecondString.\r
781 @retval !=0 FirstString is not identical to SecondString.\r
ac644614 782\r
783**/\r
784INTN\r
785EFIAPI\r
786AsciiStrCmp (\r
787 IN CONST CHAR8 *FirstString,\r
788 IN CONST CHAR8 *SecondString\r
789 );\r
790\r
791\r
792/**\r
793 Performs a case insensitive comparison of two Null-terminated ASCII strings,\r
794 and returns the difference between the first mismatched ASCII characters.\r
795\r
796 This function performs a case insensitive comparison of the Null-terminated\r
797 ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r
798 FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
799 value returned is the first mismatched lower case ASCII character in\r
800 SecondString subtracted from the first mismatched lower case ASCII character\r
801 in FirstString.\r
802\r
803 If FirstString is NULL, then ASSERT().\r
804 If SecondString is NULL, then ASSERT().\r
805 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
806 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
807 then ASSERT().\r
808 If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
809 than PcdMaximumAsciiStringLength ASCII characters not including the\r
810 Null-terminator, then ASSERT().\r
811\r
812 @param FirstString Pointer to a Null-terminated ASCII string.\r
813 @param SecondString Pointer to a Null-terminated ASCII string.\r
814\r
17f695ed 815 @retval ==0 FirstString is identical to SecondString using case insensitive\r
1106ffe1 816 comparisons.\r
17f695ed 817 @retval !=0 FirstString is not identical to SecondString using case\r
1106ffe1 818 insensitive comparisons.\r
ac644614 819\r
820**/\r
821INTN\r
822EFIAPI\r
823AsciiStriCmp (\r
824 IN CONST CHAR8 *FirstString,\r
825 IN CONST CHAR8 *SecondString\r
826 );\r
827\r
828\r
829/**\r
830 Compares two Null-terminated ASCII strings with maximum lengths, and returns\r
831 the difference between the first mismatched ASCII characters.\r
832\r
833 This function compares the Null-terminated ASCII string FirstString to the\r
834 Null-terminated ASCII string SecondString. At most, Length ASCII characters\r
835 will be compared. If Length is 0, then 0 is returned. If FirstString is\r
836 identical to SecondString, then 0 is returned. Otherwise, the value returned\r
837 is the first mismatched ASCII character in SecondString subtracted from the\r
838 first mismatched ASCII character in FirstString.\r
839\r
840 If Length > 0 and FirstString is NULL, then ASSERT().\r
841 If Length > 0 and SecondString is NULL, then ASSERT().\r
842 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
843 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
844 then ASSERT().\r
845 If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r
846 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
847 then ASSERT().\r
848\r
849 @param FirstString Pointer to a Null-terminated ASCII string.\r
850 @param SecondString Pointer to a Null-terminated ASCII string.\r
851 @param Length Maximum number of ASCII characters for compare.\r
852 \r
17f695ed 853 @retval ==0 FirstString is identical to SecondString.\r
854 @retval !=0 FirstString is not identical to SecondString.\r
ac644614 855\r
856**/\r
857INTN\r
858EFIAPI\r
859AsciiStrnCmp (\r
860 IN CONST CHAR8 *FirstString,\r
861 IN CONST CHAR8 *SecondString,\r
862 IN UINTN Length\r
863 );\r
864\r
865\r
866/**\r
867 Concatenates one Null-terminated ASCII string to another Null-terminated\r
868 ASCII string, and returns the concatenated ASCII string.\r
869\r
870 This function concatenates two Null-terminated ASCII strings. The contents of\r
871 Null-terminated ASCII string Source are concatenated to the end of Null-\r
872 terminated ASCII string Destination. The Null-terminated concatenated ASCII\r
873 String is returned.\r
874\r
875 If Destination is NULL, then ASSERT().\r
876 If Source is NULL, then ASSERT().\r
877 If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r
878 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
879 then ASSERT().\r
880 If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
881 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
882 then ASSERT().\r
883 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r
884 Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
885 ASCII characters, then ASSERT().\r
886\r
887 @param Destination Pointer to a Null-terminated ASCII string.\r
888 @param Source Pointer to a Null-terminated ASCII string.\r
889\r
890 @return Destination\r
891\r
892**/\r
893CHAR8 *\r
894EFIAPI\r
895AsciiStrCat (\r
896 IN OUT CHAR8 *Destination,\r
897 IN CONST CHAR8 *Source\r
898 );\r
899\r
900\r
901/**\r
17f695ed 902 Concatenates up to a specified length one Null-terminated ASCII string to \r
903 the end of another Null-terminated ASCII string, and returns the \r
904 concatenated ASCII string.\r
ac644614 905\r
906 This function concatenates two Null-terminated ASCII strings. The contents\r
907 of Null-terminated ASCII string Source are concatenated to the end of Null-\r
908 terminated ASCII string Destination, and Destination is returned. At most,\r
909 Length ASCII characters are concatenated from Source to the end of\r
910 Destination, and Destination is always Null-terminated. If Length is 0, then\r
911 Destination is returned unmodified. If Source and Destination overlap, then\r
912 the results are undefined.\r
913\r
914 If Length > 0 and Destination is NULL, then ASSERT().\r
915 If Length > 0 and Source is NULL, then ASSERT().\r
916 If Source and Destination overlap, then ASSERT().\r
917 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r
918 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
919 then ASSERT().\r
920 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
921 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
922 then ASSERT().\r
923 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r
924 Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
925 ASCII characters not including the Null-terminator, then ASSERT().\r
926\r
927 @param Destination Pointer to a Null-terminated ASCII string.\r
928 @param Source Pointer to a Null-terminated ASCII string.\r
929 @param Length Maximum number of ASCII characters to concatenate from\r
930 Source.\r
931\r
932 @return Destination\r
933\r
934**/\r
935CHAR8 *\r
936EFIAPI\r
937AsciiStrnCat (\r
938 IN OUT CHAR8 *Destination,\r
939 IN CONST CHAR8 *Source,\r
940 IN UINTN Length\r
941 );\r
942\r
943\r
944/**\r
9aa049d9 945 Returns the first occurrence of a Null-terminated ASCII sub-string\r
ac644614 946 in a Null-terminated ASCII string.\r
947\r
948 This function scans the contents of the ASCII string specified by String\r
949 and returns the first occurrence of SearchString. If SearchString is not\r
950 found in String, then NULL is returned. If the length of SearchString is zero,\r
951 then String is returned.\r
952\r
953 If String is NULL, then ASSERT().\r
954 If SearchString is NULL, then ASSERT().\r
955\r
956 If PcdMaximumAsciiStringLength is not zero, and SearchString or\r
957 String contains more than PcdMaximumAsciiStringLength Unicode characters\r
958 not including the Null-terminator, then ASSERT().\r
959\r
1106ffe1 960 @param String Pointer to a Null-terminated ASCII string.\r
961 @param SearchString Pointer to a Null-terminated ASCII string to search for.\r
ac644614 962\r
963 @retval NULL If the SearchString does not appear in String.\r
17f695ed 964 @retval others If there is a match return the first occurrence of SearchingString.\r
9aa049d9 965 If the length of SearchString is zero,return String.\r
ac644614 966\r
967**/\r
968CHAR8 *\r
969EFIAPI\r
970AsciiStrStr (\r
17f695ed 971 IN CONST CHAR8 *String,\r
972 IN CONST CHAR8 *SearchString\r
ac644614 973 );\r
974\r
975\r
976/**\r
977 Convert a Null-terminated ASCII decimal string to a value of type\r
978 UINTN.\r
979\r
980 This function returns a value of type UINTN by interpreting the contents\r
981 of the ASCII string String as a decimal number. The format of the input\r
982 ASCII string String is:\r
983\r
984 [spaces] [decimal digits].\r
985\r
986 The valid decimal digit character is in the range [0-9]. The function will\r
987 ignore the pad space, which includes spaces or tab characters, before the digits.\r
988 The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
989 function stops at the first character that is a not a valid decimal character or\r
990 Null-terminator, whichever on comes first.\r
991\r
992 If String has only pad spaces, then 0 is returned.\r
993 If String has no pad spaces or valid decimal digits, then 0 is returned.\r
994 If the number represented by String overflows according to the range defined by\r
995 UINTN, then ASSERT().\r
996 If String is NULL, then ASSERT().\r
997 If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
998 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
999 then ASSERT().\r
1000\r
17f695ed 1001 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1002\r
38bbd3d9 1003 @retval Value translated from String.\r
ac644614 1004\r
1005**/\r
1006UINTN\r
1007EFIAPI\r
1008AsciiStrDecimalToUintn (\r
1009 IN CONST CHAR8 *String\r
1010 );\r
1011\r
1012\r
1013/**\r
1014 Convert a Null-terminated ASCII decimal string to a value of type\r
1015 UINT64.\r
1016\r
1017 This function returns a value of type UINT64 by interpreting the contents\r
1018 of the ASCII string String as a decimal number. The format of the input\r
1019 ASCII string String is:\r
1020\r
1021 [spaces] [decimal digits].\r
1022\r
1023 The valid decimal digit character is in the range [0-9]. The function will\r
1024 ignore the pad space, which includes spaces or tab characters, before the digits.\r
1025 The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
1026 function stops at the first character that is a not a valid decimal character or\r
1027 Null-terminator, whichever on comes first.\r
1028\r
1029 If String has only pad spaces, then 0 is returned.\r
1030 If String has no pad spaces or valid decimal digits, then 0 is returned.\r
1031 If the number represented by String overflows according to the range defined by\r
1032 UINT64, then ASSERT().\r
1033 If String is NULL, then ASSERT().\r
1034 If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
1035 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1036 then ASSERT().\r
1037\r
17f695ed 1038 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1039\r
38bbd3d9 1040 @retval Value translated from String.\r
ac644614 1041\r
1042**/\r
1043UINT64\r
1044EFIAPI\r
1045AsciiStrDecimalToUint64 (\r
17f695ed 1046 IN CONST CHAR8 *String\r
ac644614 1047 );\r
1048\r
1049\r
1050/**\r
1051 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r
1052\r
1053 This function returns a value of type UINTN by interpreting the contents of\r
1054 the ASCII string String as a hexadecimal number. The format of the input ASCII\r
1055 string String is:\r
1056\r
1057 [spaces][zeros][x][hexadecimal digits].\r
1058\r
1059 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
1060 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
1061 appears in the input string, it must be prefixed with at least one 0. The function\r
1062 will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
1063 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
1064 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
1065 digit. Then, the function stops at the first character that is a not a valid\r
1066 hexadecimal character or Null-terminator, whichever on comes first.\r
1067\r
1068 If String has only pad spaces, then 0 is returned.\r
1069 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
1070 0 is returned.\r
1071\r
1072 If the number represented by String overflows according to the range defined by UINTN,\r
1073 then ASSERT().\r
1074 If String is NULL, then ASSERT().\r
1075 If PcdMaximumAsciiStringLength is not zero,\r
1076 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
1077 the Null-terminator, then ASSERT().\r
1078\r
17f695ed 1079 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1080\r
38bbd3d9 1081 @retval Value translated from String.\r
ac644614 1082\r
1083**/\r
1084UINTN\r
1085EFIAPI\r
1086AsciiStrHexToUintn (\r
17f695ed 1087 IN CONST CHAR8 *String\r
ac644614 1088 );\r
1089\r
1090\r
1091/**\r
1092 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r
1093\r
1094 This function returns a value of type UINT64 by interpreting the contents of\r
1095 the ASCII string String as a hexadecimal number. The format of the input ASCII\r
1096 string String is:\r
1097\r
1098 [spaces][zeros][x][hexadecimal digits].\r
1099\r
1100 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
1101 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
1102 appears in the input string, it must be prefixed with at least one 0. The function\r
1103 will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
1104 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
1105 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
1106 digit. Then, the function stops at the first character that is a not a valid\r
1107 hexadecimal character or Null-terminator, whichever on comes first.\r
1108\r
1109 If String has only pad spaces, then 0 is returned.\r
1110 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
1111 0 is returned.\r
1112\r
1113 If the number represented by String overflows according to the range defined by UINT64,\r
1114 then ASSERT().\r
1115 If String is NULL, then ASSERT().\r
1116 If PcdMaximumAsciiStringLength is not zero,\r
1117 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
1118 the Null-terminator, then ASSERT().\r
1119\r
17f695ed 1120 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1121\r
38bbd3d9 1122 @retval Value translated from String.\r
ac644614 1123\r
1124**/\r
1125UINT64\r
1126EFIAPI\r
1127AsciiStrHexToUint64 (\r
17f695ed 1128 IN CONST CHAR8 *String\r
ac644614 1129 );\r
1130\r
1131\r
1132/**\r
1133 Convert one Null-terminated ASCII string to a Null-terminated\r
1134 Unicode string and returns the Unicode string.\r
1135\r
1136 This function converts the contents of the ASCII string Source to the Unicode\r
1137 string Destination, and returns Destination. The function terminates the\r
1138 Unicode string Destination by appending a Null-terminator character at the end.\r
1139 The caller is responsible to make sure Destination points to a buffer with size\r
1140 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
1141\r
1142 If Destination is NULL, then ASSERT().\r
1143 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
1144 If Source is NULL, then ASSERT().\r
1145 If Source and Destination overlap, then ASSERT().\r
1146 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
1147 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1148 then ASSERT().\r
1149 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
1150 PcdMaximumUnicodeStringLength ASCII characters not including the\r
1151 Null-terminator, then ASSERT().\r
1152\r
1153 @param Source Pointer to a Null-terminated ASCII string.\r
1154 @param Destination Pointer to a Null-terminated Unicode string.\r
1155\r
9aa049d9 1156 @return Destination.\r
ac644614 1157\r
1158**/\r
1159CHAR16 *\r
1160EFIAPI\r
1161AsciiStrToUnicodeStr (\r
17f695ed 1162 IN CONST CHAR8 *Source,\r
1163 OUT CHAR16 *Destination\r
ac644614 1164 );\r
1165\r
1166\r
1167/**\r
1168 Converts an 8-bit value to an 8-bit BCD value.\r
1169\r
1170 Converts the 8-bit value specified by Value to BCD. The BCD value is\r
1171 returned.\r
1172\r
1173 If Value >= 100, then ASSERT().\r
1174\r
1175 @param Value The 8-bit value to convert to BCD. Range 0..99.\r
1176\r
9aa049d9 1177 @return The BCD value.\r
ac644614 1178\r
1179**/\r
1180UINT8\r
1181EFIAPI\r
1182DecimalToBcd8 (\r
1183 IN UINT8 Value\r
1184 );\r
1185\r
1186\r
1187/**\r
1188 Converts an 8-bit BCD value to an 8-bit value.\r
1189\r
1190 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r
1191 value is returned.\r
1192\r
1193 If Value >= 0xA0, then ASSERT().\r
1194 If (Value & 0x0F) >= 0x0A, then ASSERT().\r
1195\r
1196 @param Value The 8-bit BCD value to convert to an 8-bit value.\r
1197\r
1198 @return The 8-bit value is returned.\r
1199\r
1200**/\r
1201UINT8\r
1202EFIAPI\r
1203BcdToDecimal8 (\r
1204 IN UINT8 Value\r
1205 );\r
1206\r
1207\r
1208//\r
1209// Linked List Functions and Macros\r
1210//\r
1211\r
1212/**\r
1213 Initializes the head node of a doubly linked list that is declared as a\r
1214 global variable in a module.\r
1215\r
1216 Initializes the forward and backward links of a new linked list. After\r
1217 initializing a linked list with this macro, the other linked list functions\r
1218 may be used to add and remove nodes from the linked list. This macro results\r
1219 in smaller executables by initializing the linked list in the data section,\r
1220 instead if calling the InitializeListHead() function to perform the\r
1221 equivalent operation.\r
1222\r
1223 @param ListHead The head note of a list to initiailize.\r
1224\r
1225**/\r
17f695ed 1226#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r
ac644614 1227\r
1228\r
1229/**\r
1230 Initializes the head node of a doubly linked list, and returns the pointer to\r
1231 the head node of the doubly linked list.\r
1232\r
1233 Initializes the forward and backward links of a new linked list. After\r
1234 initializing a linked list with this function, the other linked list\r
1235 functions may be used to add and remove nodes from the linked list. It is up\r
1236 to the caller of this function to allocate the memory for ListHead.\r
1237\r
1238 If ListHead is NULL, then ASSERT().\r
1239\r
1240 @param ListHead A pointer to the head node of a new doubly linked list.\r
1241\r
1242 @return ListHead\r
1243\r
1244**/\r
1245LIST_ENTRY *\r
1246EFIAPI\r
1247InitializeListHead (\r
aa0583c7 1248 IN OUT LIST_ENTRY *ListHead\r
ac644614 1249 );\r
1250\r
1251\r
1252/**\r
1253 Adds a node to the beginning of a doubly linked list, and returns the pointer\r
1254 to the head node of the doubly linked list.\r
1255\r
1256 Adds the node Entry at the beginning of the doubly linked list denoted by\r
1257 ListHead, and returns ListHead.\r
1258\r
1259 If ListHead is NULL, then ASSERT().\r
1260 If Entry is NULL, then ASSERT().\r
17f695ed 1261 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
1262 InitializeListHead(), then ASSERT().\r
ac644614 1263 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
1264 of nodes in ListHead, including the ListHead node, is greater than or\r
1265 equal to PcdMaximumLinkedListLength, then ASSERT().\r
1266\r
1267 @param ListHead A pointer to the head node of a doubly linked list.\r
1268 @param Entry A pointer to a node that is to be inserted at the beginning\r
1269 of a doubly linked list.\r
1270\r
1271 @return ListHead\r
1272\r
1273**/\r
1274LIST_ENTRY *\r
1275EFIAPI\r
1276InsertHeadList (\r
aa0583c7 1277 IN OUT LIST_ENTRY *ListHead,\r
1278 IN OUT LIST_ENTRY *Entry\r
ac644614 1279 );\r
1280\r
1281\r
1282/**\r
1283 Adds a node to the end of a doubly linked list, and returns the pointer to\r
1284 the head node of the doubly linked list.\r
1285\r
1286 Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r
1287 and returns ListHead.\r
1288\r
1289 If ListHead is NULL, then ASSERT().\r
1290 If Entry is NULL, then ASSERT().\r
17f695ed 1291 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1292 InitializeListHead(), then ASSERT().\r
ac644614 1293 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
1294 of nodes in ListHead, including the ListHead node, is greater than or\r
1295 equal to PcdMaximumLinkedListLength, then ASSERT().\r
1296\r
1297 @param ListHead A pointer to the head node of a doubly linked list.\r
1298 @param Entry A pointer to a node that is to be added at the end of the\r
1299 doubly linked list.\r
1300\r
1301 @return ListHead\r
1302\r
1303**/\r
1304LIST_ENTRY *\r
1305EFIAPI\r
1306InsertTailList (\r
aa0583c7 1307 IN OUT LIST_ENTRY *ListHead,\r
1308 IN OUT LIST_ENTRY *Entry\r
ac644614 1309 );\r
1310\r
1311\r
1312/**\r
1313 Retrieves the first node of a doubly linked list.\r
1314\r
17f695ed 1315 Returns the first node of a doubly linked list. List must have been \r
1316 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
1317 If List is empty, then List is returned.\r
ac644614 1318\r
1319 If List is NULL, then ASSERT().\r
17f695ed 1320 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1321 InitializeListHead(), then ASSERT().\r
ac644614 1322 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1323 in List, including the List node, is greater than or equal to\r
1324 PcdMaximumLinkedListLength, then ASSERT().\r
1325\r
1326 @param List A pointer to the head node of a doubly linked list.\r
1327\r
1328 @return The first node of a doubly linked list.\r
1329 @retval NULL The list is empty.\r
1330\r
1331**/\r
1332LIST_ENTRY *\r
1333EFIAPI\r
1334GetFirstNode (\r
1335 IN CONST LIST_ENTRY *List\r
1336 );\r
1337\r
1338\r
1339/**\r
1340 Retrieves the next node of a doubly linked list.\r
1341\r
17f695ed 1342 Returns the node of a doubly linked list that follows Node. \r
1343 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
1344 or InitializeListHead(). If List is empty, then List is returned.\r
ac644614 1345\r
1346 If List is NULL, then ASSERT().\r
1347 If Node is NULL, then ASSERT().\r
17f695ed 1348 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1349 InitializeListHead(), then ASSERT().\r
ac644614 1350 If PcdMaximumLinkedListLenth is not zero, and List contains more than\r
1351 PcdMaximumLinkedListLenth nodes, then ASSERT().\r
1352 If Node is not a node in List, then ASSERT().\r
1353\r
1354 @param List A pointer to the head node of a doubly linked list.\r
1355 @param Node A pointer to a node in the doubly linked list.\r
1356\r
1357 @return Pointer to the next node if one exists. Otherwise a null value which\r
1358 is actually List is returned.\r
1359\r
1360**/\r
1361LIST_ENTRY *\r
1362EFIAPI\r
1363GetNextNode (\r
1364 IN CONST LIST_ENTRY *List,\r
1365 IN CONST LIST_ENTRY *Node\r
1366 );\r
1367\r
1368\r
1369/**\r
1370 Checks to see if a doubly linked list is empty or not.\r
1371\r
1372 Checks to see if the doubly linked list is empty. If the linked list contains\r
1373 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
1374\r
1375 If ListHead is NULL, then ASSERT().\r
17f695ed 1376 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1377 InitializeListHead(), then ASSERT().\r
ac644614 1378 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1379 in List, including the List node, is greater than or equal to\r
1380 PcdMaximumLinkedListLength, then ASSERT().\r
1381\r
1382 @param ListHead A pointer to the head node of a doubly linked list.\r
1383\r
1384 @retval TRUE The linked list is empty.\r
1385 @retval FALSE The linked list is not empty.\r
1386\r
1387**/\r
1388BOOLEAN\r
1389EFIAPI\r
1390IsListEmpty (\r
1391 IN CONST LIST_ENTRY *ListHead\r
1392 );\r
1393\r
1394\r
1395/**\r
aa0583c7 1396 Determines if a node in a doubly linked list is the head node of a the same\r
1397 doubly linked list. This function is typically used to terminate a loop that\r
1398 traverses all the nodes in a doubly linked list starting with the head node.\r
ac644614 1399\r
aa0583c7 1400 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r
1401 nodes in the doubly linked list specified by List. List must have been\r
17f695ed 1402 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
ac644614 1403\r
1404 If List is NULL, then ASSERT().\r
1405 If Node is NULL, then ASSERT().\r
17f695ed 1406 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r
1407 then ASSERT().\r
ac644614 1408 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1409 in List, including the List node, is greater than or equal to\r
1410 PcdMaximumLinkedListLength, then ASSERT().\r
1411 If Node is not a node in List and Node is not equal to List, then ASSERT().\r
1412\r
1413 @param List A pointer to the head node of a doubly linked list.\r
1414 @param Node A pointer to a node in the doubly linked list.\r
1415\r
1416 @retval TRUE Node is one of the nodes in the doubly linked list.\r
1417 @retval FALSE Node is not one of the nodes in the doubly linked list.\r
1418\r
1419**/\r
1420BOOLEAN\r
1421EFIAPI\r
1422IsNull (\r
1423 IN CONST LIST_ENTRY *List,\r
1424 IN CONST LIST_ENTRY *Node\r
1425 );\r
1426\r
1427\r
1428/**\r
1429 Determines if a node the last node in a doubly linked list.\r
1430\r
1431 Returns TRUE if Node is the last node in the doubly linked list specified by\r
1432 List. Otherwise, FALSE is returned. List must have been initialized with\r
17f695ed 1433 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
ac644614 1434\r
1435 If List is NULL, then ASSERT().\r
1436 If Node is NULL, then ASSERT().\r
17f695ed 1437 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
1438 InitializeListHead(), then ASSERT().\r
ac644614 1439 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1440 in List, including the List node, is greater than or equal to\r
1441 PcdMaximumLinkedListLength, then ASSERT().\r
1442 If Node is not a node in List, then ASSERT().\r
1443\r
1444 @param List A pointer to the head node of a doubly linked list.\r
1445 @param Node A pointer to a node in the doubly linked list.\r
1446\r
1447 @retval TRUE Node is the last node in the linked list.\r
1448 @retval FALSE Node is not the last node in the linked list.\r
1449\r
1450**/\r
1451BOOLEAN\r
1452EFIAPI\r
1453IsNodeAtEnd (\r
1454 IN CONST LIST_ENTRY *List,\r
1455 IN CONST LIST_ENTRY *Node\r
1456 );\r
1457\r
1458\r
1459/**\r
1460 Swaps the location of two nodes in a doubly linked list, and returns the\r
1461 first node after the swap.\r
1462\r
1463 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r
1464 Otherwise, the location of the FirstEntry node is swapped with the location\r
1465 of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
1466 same double linked list as FirstEntry and that double linked list must have\r
17f695ed 1467 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r
1468 SecondEntry is returned after the nodes are swapped.\r
ac644614 1469\r
1470 If FirstEntry is NULL, then ASSERT().\r
1471 If SecondEntry is NULL, then ASSERT().\r
1472 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r
1473 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
1474 linked list containing the FirstEntry and SecondEntry nodes, including\r
1475 the FirstEntry and SecondEntry nodes, is greater than or equal to\r
1476 PcdMaximumLinkedListLength, then ASSERT().\r
1477\r
1478 @param FirstEntry A pointer to a node in a linked list.\r
1479 @param SecondEntry A pointer to another node in the same linked list.\r
38bbd3d9 1480 \r
9aa049d9 1481 @return SecondEntry.\r
ac644614 1482\r
1483**/\r
1484LIST_ENTRY *\r
1485EFIAPI\r
1486SwapListEntries (\r
aa0583c7 1487 IN OUT LIST_ENTRY *FirstEntry,\r
1488 IN OUT LIST_ENTRY *SecondEntry\r
ac644614 1489 );\r
1490\r
1491\r
1492/**\r
1493 Removes a node from a doubly linked list, and returns the node that follows\r
1494 the removed node.\r
1495\r
1496 Removes the node Entry from a doubly linked list. It is up to the caller of\r
1497 this function to release the memory used by this node if that is required. On\r
1498 exit, the node following Entry in the doubly linked list is returned. If\r
1499 Entry is the only node in the linked list, then the head node of the linked\r
1500 list is returned.\r
1501\r
1502 If Entry is NULL, then ASSERT().\r
1503 If Entry is the head node of an empty list, then ASSERT().\r
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
1505 linked list containing Entry, including the Entry node, is greater than\r
1506 or equal to PcdMaximumLinkedListLength, then ASSERT().\r
1507\r
9aa049d9 1508 @param Entry A pointer to a node in a linked list.\r
ac644614 1509\r
9aa049d9 1510 @return Entry.\r
ac644614 1511\r
1512**/\r
1513LIST_ENTRY *\r
1514EFIAPI\r
1515RemoveEntryList (\r
1516 IN CONST LIST_ENTRY *Entry\r
1517 );\r
1518\r
1519//\r
1520// Math Services\r
1521//\r
1522\r
1523/**\r
1524 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r
1525 with zeros. The shifted value is returned.\r
1526\r
1527 This function shifts the 64-bit value Operand to the left by Count bits. The\r
1528 low Count bits are set to zero. The shifted value is returned.\r
1529\r
1530 If Count is greater than 63, then ASSERT().\r
1531\r
1532 @param Operand The 64-bit operand to shift left.\r
1533 @param Count The number of bits to shift left.\r
1534\r
9aa049d9 1535 @return Operand << Count.\r
ac644614 1536\r
1537**/\r
1538UINT64\r
1539EFIAPI\r
1540LShiftU64 (\r
1541 IN UINT64 Operand,\r
1542 IN UINTN Count\r
1543 );\r
1544\r
1545\r
1546/**\r
1547 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r
1548 filled with zeros. The shifted value is returned.\r
1549\r
1550 This function shifts the 64-bit value Operand to the right by Count bits. The\r
1551 high Count bits are set to zero. The shifted value is returned.\r
1552\r
1553 If Count is greater than 63, then ASSERT().\r
1554\r
1555 @param Operand The 64-bit operand to shift right.\r
1556 @param Count The number of bits to shift right.\r
1557\r
1558 @return Operand >> Count\r
1559\r
1560**/\r
1561UINT64\r
1562EFIAPI\r
1563RShiftU64 (\r
1564 IN UINT64 Operand,\r
1565 IN UINTN Count\r
1566 );\r
1567\r
1568\r
1569/**\r
1570 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r
1571 with original integer's bit 63. The shifted value is returned.\r
1572\r
1573 This function shifts the 64-bit value Operand to the right by Count bits. The\r
1574 high Count bits are set to bit 63 of Operand. The shifted value is returned.\r
1575\r
1576 If Count is greater than 63, then ASSERT().\r
1577\r
1578 @param Operand The 64-bit operand to shift right.\r
1579 @param Count The number of bits to shift right.\r
1580\r
1581 @return Operand >> Count\r
1582\r
1583**/\r
1584UINT64\r
1585EFIAPI\r
1586ARShiftU64 (\r
1587 IN UINT64 Operand,\r
1588 IN UINTN Count\r
1589 );\r
1590\r
1591\r
1592/**\r
1593 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r
1594 with the high bits that were rotated.\r
1595\r
1596 This function rotates the 32-bit value Operand to the left by Count bits. The\r
1597 low Count bits are fill with the high Count bits of Operand. The rotated\r
1598 value is returned.\r
1599\r
1600 If Count is greater than 31, then ASSERT().\r
1601\r
1602 @param Operand The 32-bit operand to rotate left.\r
1603 @param Count The number of bits to rotate left.\r
1604\r
17f695ed 1605 @return Operand << Count\r
ac644614 1606\r
1607**/\r
1608UINT32\r
1609EFIAPI\r
1610LRotU32 (\r
1611 IN UINT32 Operand,\r
1612 IN UINTN Count\r
1613 );\r
1614\r
1615\r
1616/**\r
1617 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r
1618 with the low bits that were rotated.\r
1619\r
1620 This function rotates the 32-bit value Operand to the right by Count bits.\r
1621 The high Count bits are fill with the low Count bits of Operand. The rotated\r
1622 value is returned.\r
1623\r
1624 If Count is greater than 31, then ASSERT().\r
1625\r
1626 @param Operand The 32-bit operand to rotate right.\r
1627 @param Count The number of bits to rotate right.\r
1628\r
1629 @return Operand >>> Count\r
1630\r
1631**/\r
1632UINT32\r
1633EFIAPI\r
1634RRotU32 (\r
1635 IN UINT32 Operand,\r
1636 IN UINTN Count\r
1637 );\r
1638\r
1639\r
1640/**\r
1641 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r
1642 with the high bits that were rotated.\r
1643\r
1644 This function rotates the 64-bit value Operand to the left by Count bits. The\r
1645 low Count bits are fill with the high Count bits of Operand. The rotated\r
1646 value is returned.\r
1647\r
1648 If Count is greater than 63, then ASSERT().\r
1649\r
1650 @param Operand The 64-bit operand to rotate left.\r
1651 @param Count The number of bits to rotate left.\r
1652\r
17f695ed 1653 @return Operand << Count\r
ac644614 1654\r
1655**/\r
1656UINT64\r
1657EFIAPI\r
1658LRotU64 (\r
1659 IN UINT64 Operand,\r
1660 IN UINTN Count\r
1661 );\r
1662\r
1663\r
1664/**\r
1665 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r
1666 with the high low bits that were rotated.\r
1667\r
1668 This function rotates the 64-bit value Operand to the right by Count bits.\r
1669 The high Count bits are fill with the low Count bits of Operand. The rotated\r
1670 value is returned.\r
1671\r
1672 If Count is greater than 63, then ASSERT().\r
1673\r
1674 @param Operand The 64-bit operand to rotate right.\r
1675 @param Count The number of bits to rotate right.\r
1676\r
17f695ed 1677 @return Operand >> Count\r
ac644614 1678\r
1679**/\r
1680UINT64\r
1681EFIAPI\r
1682RRotU64 (\r
1683 IN UINT64 Operand,\r
1684 IN UINTN Count\r
1685 );\r
1686\r
1687\r
1688/**\r
1689 Returns the bit position of the lowest bit set in a 32-bit value.\r
1690\r
1691 This function computes the bit position of the lowest bit set in the 32-bit\r
1692 value specified by Operand. If Operand is zero, then -1 is returned.\r
1693 Otherwise, a value between 0 and 31 is returned.\r
1694\r
1695 @param Operand The 32-bit operand to evaluate.\r
1696\r
9aa049d9 1697 @retval 0..31 The lowest bit set in Operand was found.\r
17f695ed 1698 @retval -1 Operand is zero.\r
ac644614 1699\r
1700**/\r
1701INTN\r
1702EFIAPI\r
1703LowBitSet32 (\r
1704 IN UINT32 Operand\r
1705 );\r
1706\r
1707\r
1708/**\r
1709 Returns the bit position of the lowest bit set in a 64-bit value.\r
1710\r
1711 This function computes the bit position of the lowest bit set in the 64-bit\r
1712 value specified by Operand. If Operand is zero, then -1 is returned.\r
1713 Otherwise, a value between 0 and 63 is returned.\r
1714\r
1715 @param Operand The 64-bit operand to evaluate.\r
1716\r
9aa049d9 1717 @retval 0..63 The lowest bit set in Operand was found.\r
17f695ed 1718 @retval -1 Operand is zero.\r
1719\r
ac644614 1720\r
1721**/\r
1722INTN\r
1723EFIAPI\r
1724LowBitSet64 (\r
1725 IN UINT64 Operand\r
1726 );\r
1727\r
1728\r
1729/**\r
1730 Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r
1731 to log2(x).\r
1732\r
1733 This function computes the bit position of the highest bit set in the 32-bit\r
1734 value specified by Operand. If Operand is zero, then -1 is returned.\r
1735 Otherwise, a value between 0 and 31 is returned.\r
1736\r
1737 @param Operand The 32-bit operand to evaluate.\r
1738\r
9aa049d9 1739 @retval 0..31 Position of the highest bit set in Operand if found.\r
17f695ed 1740 @retval -1 Operand is zero.\r
ac644614 1741\r
1742**/\r
1743INTN\r
1744EFIAPI\r
1745HighBitSet32 (\r
1746 IN UINT32 Operand\r
1747 );\r
1748\r
1749\r
1750/**\r
1751 Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r
1752 to log2(x).\r
1753\r
1754 This function computes the bit position of the highest bit set in the 64-bit\r
1755 value specified by Operand. If Operand is zero, then -1 is returned.\r
1756 Otherwise, a value between 0 and 63 is returned.\r
1757\r
1758 @param Operand The 64-bit operand to evaluate.\r
1759\r
9aa049d9 1760 @retval 0..63 Position of the highest bit set in Operand if found.\r
17f695ed 1761 @retval -1 Operand is zero.\r
ac644614 1762\r
1763**/\r
1764INTN\r
1765EFIAPI\r
1766HighBitSet64 (\r
1767 IN UINT64 Operand\r
1768 );\r
1769\r
1770\r
1771/**\r
1772 Returns the value of the highest bit set in a 32-bit value. Equivalent to\r
17f695ed 1773 1 << log2(x).\r
ac644614 1774\r
1775 This function computes the value of the highest bit set in the 32-bit value\r
1776 specified by Operand. If Operand is zero, then zero is returned.\r
1777\r
1778 @param Operand The 32-bit operand to evaluate.\r
1779\r
1780 @return 1 << HighBitSet32(Operand)\r
1781 @retval 0 Operand is zero.\r
1782\r
1783**/\r
1784UINT32\r
1785EFIAPI\r
1786GetPowerOfTwo32 (\r
1787 IN UINT32 Operand\r
1788 );\r
1789\r
1790\r
1791/**\r
1792 Returns the value of the highest bit set in a 64-bit value. Equivalent to\r
17f695ed 1793 1 << log2(x).\r
ac644614 1794\r
1795 This function computes the value of the highest bit set in the 64-bit value\r
1796 specified by Operand. If Operand is zero, then zero is returned.\r
1797\r
1798 @param Operand The 64-bit operand to evaluate.\r
1799\r
1800 @return 1 << HighBitSet64(Operand)\r
1801 @retval 0 Operand is zero.\r
1802\r
1803**/\r
1804UINT64\r
1805EFIAPI\r
1806GetPowerOfTwo64 (\r
1807 IN UINT64 Operand\r
1808 );\r
1809\r
1810\r
1811/**\r
1812 Switches the endianess of a 16-bit integer.\r
1813\r
1814 This function swaps the bytes in a 16-bit unsigned value to switch the value\r
1815 from little endian to big endian or vice versa. The byte swapped value is\r
1816 returned.\r
1817\r
1818 @param Value Operand A 16-bit unsigned value.\r
1819\r
17f695ed 1820 @return The byte swapped Operand.\r
ac644614 1821\r
1822**/\r
1823UINT16\r
1824EFIAPI\r
1825SwapBytes16 (\r
1826 IN UINT16 Value\r
1827 );\r
1828\r
1829\r
1830/**\r
1831 Switches the endianess of a 32-bit integer.\r
1832\r
1833 This function swaps the bytes in a 32-bit unsigned value to switch the value\r
1834 from little endian to big endian or vice versa. The byte swapped value is\r
1835 returned.\r
1836\r
1837 @param Value Operand A 32-bit unsigned value.\r
1838\r
17f695ed 1839 @return The byte swapped Operand.\r
ac644614 1840\r
1841**/\r
1842UINT32\r
1843EFIAPI\r
1844SwapBytes32 (\r
1845 IN UINT32 Value\r
1846 );\r
1847\r
1848\r
1849/**\r
1850 Switches the endianess of a 64-bit integer.\r
1851\r
1852 This function swaps the bytes in a 64-bit unsigned value to switch the value\r
1853 from little endian to big endian or vice versa. The byte swapped value is\r
1854 returned.\r
1855\r
1856 @param Value Operand A 64-bit unsigned value.\r
1857\r
17f695ed 1858 @return The byte swapped Operand.\r
ac644614 1859\r
1860**/\r
1861UINT64\r
1862EFIAPI\r
1863SwapBytes64 (\r
1864 IN UINT64 Value\r
1865 );\r
1866\r
1867\r
1868/**\r
1869 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r
1870 generates a 64-bit unsigned result.\r
1871\r
1872 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
1873 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
1874 bit unsigned result is returned.\r
1875\r
ac644614 1876 @param Multiplicand A 64-bit unsigned value.\r
1877 @param Multiplier A 32-bit unsigned value.\r
1878\r
1879 @return Multiplicand * Multiplier\r
1880\r
1881**/\r
1882UINT64\r
1883EFIAPI\r
1884MultU64x32 (\r
1885 IN UINT64 Multiplicand,\r
1886 IN UINT32 Multiplier\r
1887 );\r
1888\r
1889\r
1890/**\r
1891 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r
1892 generates a 64-bit unsigned result.\r
1893\r
1894 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
1895 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
1896 bit unsigned result is returned.\r
1897\r
1898 If the result overflows, then ASSERT().\r
1899\r
1900 @param Multiplicand A 64-bit unsigned value.\r
1901 @param Multiplier A 64-bit unsigned value.\r
1902\r
1903 @return Multiplicand * Multiplier\r
1904\r
1905**/\r
1906UINT64\r
1907EFIAPI\r
1908MultU64x64 (\r
1909 IN UINT64 Multiplicand,\r
1910 IN UINT64 Multiplier\r
1911 );\r
1912\r
1913\r
1914/**\r
1915 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r
1916 64-bit signed result.\r
1917\r
1918 This function multiples the 64-bit signed value Multiplicand by the 64-bit\r
1919 signed value Multiplier and generates a 64-bit signed result. This 64-bit\r
1920 signed result is returned.\r
1921\r
ac644614 1922 @param Multiplicand A 64-bit signed value.\r
1923 @param Multiplier A 64-bit signed value.\r
1924\r
1925 @return Multiplicand * Multiplier\r
1926\r
1927**/\r
1928INT64\r
1929EFIAPI\r
1930MultS64x64 (\r
1931 IN INT64 Multiplicand,\r
1932 IN INT64 Multiplier\r
1933 );\r
1934\r
1935\r
1936/**\r
1937 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1938 a 64-bit unsigned result.\r
1939\r
1940 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1941 unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
1942 function returns the 64-bit unsigned quotient.\r
1943\r
1944 If Divisor is 0, then ASSERT().\r
1945\r
1946 @param Dividend A 64-bit unsigned value.\r
1947 @param Divisor A 32-bit unsigned value.\r
1948\r
1949 @return Dividend / Divisor\r
1950\r
1951**/\r
1952UINT64\r
1953EFIAPI\r
1954DivU64x32 (\r
1955 IN UINT64 Dividend,\r
1956 IN UINT32 Divisor\r
1957 );\r
1958\r
1959\r
1960/**\r
1961 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1962 a 32-bit unsigned remainder.\r
1963\r
1964 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1965 unsigned value Divisor and generates a 32-bit remainder. This function\r
1966 returns the 32-bit unsigned remainder.\r
1967\r
1968 If Divisor is 0, then ASSERT().\r
1969\r
1970 @param Dividend A 64-bit unsigned value.\r
1971 @param Divisor A 32-bit unsigned value.\r
1972\r
1973 @return Dividend % Divisor\r
1974\r
1975**/\r
1976UINT32\r
1977EFIAPI\r
1978ModU64x32 (\r
1979 IN UINT64 Dividend,\r
1980 IN UINT32 Divisor\r
1981 );\r
1982\r
1983\r
1984/**\r
1985 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1986 a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
1987\r
1988 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1989 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
1990 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
1991 This function returns the 64-bit unsigned quotient.\r
1992\r
1993 If Divisor is 0, then ASSERT().\r
1994\r
1995 @param Dividend A 64-bit unsigned value.\r
1996 @param Divisor A 32-bit unsigned value.\r
1997 @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r
1998 optional and may be NULL.\r
1999\r
2000 @return Dividend / Divisor\r
2001\r
2002**/\r
2003UINT64\r
2004EFIAPI\r
2005DivU64x32Remainder (\r
2006 IN UINT64 Dividend,\r
2007 IN UINT32 Divisor,\r
2008 OUT UINT32 *Remainder OPTIONAL\r
2009 );\r
2010\r
2011\r
2012/**\r
2013 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r
2014 a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
2015\r
2016 This function divides the 64-bit unsigned value Dividend by the 64-bit\r
2017 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
2018 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
2019 This function returns the 64-bit unsigned quotient.\r
2020\r
2021 If Divisor is 0, then ASSERT().\r
2022\r
2023 @param Dividend A 64-bit unsigned value.\r
2024 @param Divisor A 64-bit unsigned value.\r
2025 @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r
2026 optional and may be NULL.\r
2027\r
2028 @return Dividend / Divisor\r
2029\r
2030**/\r
2031UINT64\r
2032EFIAPI\r
2033DivU64x64Remainder (\r
2034 IN UINT64 Dividend,\r
2035 IN UINT64 Divisor,\r
2036 OUT UINT64 *Remainder OPTIONAL\r
2037 );\r
2038\r
2039\r
2040/**\r
2041 Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r
2042 64-bit signed result and a optional 64-bit signed remainder.\r
2043\r
2044 This function divides the 64-bit signed value Dividend by the 64-bit signed\r
2045 value Divisor and generates a 64-bit signed quotient. If Remainder is not\r
2046 NULL, then the 64-bit signed remainder is returned in Remainder. This\r
2047 function returns the 64-bit signed quotient.\r
2048\r
9aa049d9 2049 It is the caller's responsibility to not call this function with a Divisor of 0.\r
17f695ed 2050 If Divisor is 0, then the quotient and remainder should be assumed to be \r
2051 the largest negative integer.\r
2052\r
ac644614 2053 If Divisor is 0, then ASSERT().\r
2054\r
2055 @param Dividend A 64-bit signed value.\r
2056 @param Divisor A 64-bit signed value.\r
2057 @param Remainder A pointer to a 64-bit signed value. This parameter is\r
2058 optional and may be NULL.\r
2059\r
2060 @return Dividend / Divisor\r
2061\r
2062**/\r
2063INT64\r
2064EFIAPI\r
2065DivS64x64Remainder (\r
2066 IN INT64 Dividend,\r
2067 IN INT64 Divisor,\r
2068 OUT INT64 *Remainder OPTIONAL\r
2069 );\r
2070\r
2071\r
2072/**\r
2073 Reads a 16-bit value from memory that may be unaligned.\r
2074\r
2075 This function returns the 16-bit value pointed to by Buffer. The function\r
2076 guarantees that the read operation does not produce an alignment fault.\r
2077\r
2078 If the Buffer is NULL, then ASSERT().\r
2079\r
5385a579 2080 @param Buffer Pointer to a 16-bit value that may be unaligned.\r
ac644614 2081\r
5385a579 2082 @return The 16-bit value read from Buffer.\r
ac644614 2083\r
2084**/\r
2085UINT16\r
2086EFIAPI\r
2087ReadUnaligned16 (\r
5385a579 2088 IN CONST UINT16 *Buffer\r
ac644614 2089 );\r
2090\r
2091\r
2092/**\r
2093 Writes a 16-bit value to memory that may be unaligned.\r
2094\r
2095 This function writes the 16-bit value specified by Value to Buffer. Value is\r
2096 returned. The function guarantees that the write operation does not produce\r
2097 an alignment fault.\r
2098\r
2099 If the Buffer is NULL, then ASSERT().\r
2100\r
5385a579 2101 @param Buffer Pointer to a 16-bit value that may be unaligned.\r
ac644614 2102 @param Value 16-bit value to write to Buffer.\r
2103\r
5385a579 2104 @return The 16-bit value to write to Buffer.\r
ac644614 2105\r
2106**/\r
2107UINT16\r
2108EFIAPI\r
2109WriteUnaligned16 (\r
5385a579 2110 OUT UINT16 *Buffer,\r
2111 IN UINT16 Value\r
ac644614 2112 );\r
2113\r
2114\r
2115/**\r
2116 Reads a 24-bit value from memory that may be unaligned.\r
2117\r
2118 This function returns the 24-bit value pointed to by Buffer. The function\r
2119 guarantees that the read operation does not produce an alignment fault.\r
2120\r
2121 If the Buffer is NULL, then ASSERT().\r
2122\r
2123 @param Buffer Pointer to a 24-bit value that may be unaligned.\r
2124\r
5385a579 2125 @return The 24-bit value read from Buffer.\r
ac644614 2126\r
2127**/\r
2128UINT32\r
2129EFIAPI\r
2130ReadUnaligned24 (\r
5385a579 2131 IN CONST UINT32 *Buffer\r
ac644614 2132 );\r
2133\r
2134\r
2135/**\r
2136 Writes a 24-bit value to memory that may be unaligned.\r
2137\r
2138 This function writes the 24-bit value specified by Value to Buffer. Value is\r
2139 returned. The function guarantees that the write operation does not produce\r
2140 an alignment fault.\r
2141\r
2142 If the Buffer is NULL, then ASSERT().\r
2143\r
2144 @param Buffer Pointer to a 24-bit value that may be unaligned.\r
2145 @param Value 24-bit value to write to Buffer.\r
2146\r
5385a579 2147 @return The 24-bit value to write to Buffer.\r
ac644614 2148\r
2149**/\r
2150UINT32\r
2151EFIAPI\r
2152WriteUnaligned24 (\r
5385a579 2153 OUT UINT32 *Buffer,\r
2154 IN UINT32 Value\r
ac644614 2155 );\r
2156\r
2157\r
2158/**\r
2159 Reads a 32-bit value from memory that may be unaligned.\r
2160\r
2161 This function returns the 32-bit value pointed to by Buffer. The function\r
2162 guarantees that the read operation does not produce an alignment fault.\r
2163\r
2164 If the Buffer is NULL, then ASSERT().\r
2165\r
5385a579 2166 @param Buffer Pointer to a 32-bit value that may be unaligned.\r
ac644614 2167\r
5385a579 2168 @return The 32-bit value read from Buffer.\r
ac644614 2169\r
2170**/\r
2171UINT32\r
2172EFIAPI\r
2173ReadUnaligned32 (\r
5385a579 2174 IN CONST UINT32 *Buffer\r
ac644614 2175 );\r
2176\r
2177\r
2178/**\r
2179 Writes a 32-bit value to memory that may be unaligned.\r
2180\r
2181 This function writes the 32-bit value specified by Value to Buffer. Value is\r
2182 returned. The function guarantees that the write operation does not produce\r
2183 an alignment fault.\r
2184\r
2185 If the Buffer is NULL, then ASSERT().\r
2186\r
5385a579 2187 @param Buffer Pointer to a 32-bit value that may be unaligned.\r
ac644614 2188 @param Value 32-bit value to write to Buffer.\r
2189\r
5385a579 2190 @return The 32-bit value to write to Buffer.\r
ac644614 2191\r
2192**/\r
2193UINT32\r
2194EFIAPI\r
2195WriteUnaligned32 (\r
5385a579 2196 OUT UINT32 *Buffer,\r
2197 IN UINT32 Value\r
ac644614 2198 );\r
2199\r
2200\r
2201/**\r
2202 Reads a 64-bit value from memory that may be unaligned.\r
2203\r
2204 This function returns the 64-bit value pointed to by Buffer. The function\r
2205 guarantees that the read operation does not produce an alignment fault.\r
2206\r
2207 If the Buffer is NULL, then ASSERT().\r
2208\r
5385a579 2209 @param Buffer Pointer to a 64-bit value that may be unaligned.\r
ac644614 2210\r
5385a579 2211 @return The 64-bit value read from Buffer.\r
ac644614 2212\r
2213**/\r
2214UINT64\r
2215EFIAPI\r
2216ReadUnaligned64 (\r
5385a579 2217 IN CONST UINT64 *Buffer\r
ac644614 2218 );\r
2219\r
2220\r
2221/**\r
2222 Writes a 64-bit value to memory that may be unaligned.\r
2223\r
2224 This function writes the 64-bit value specified by Value to Buffer. Value is\r
2225 returned. The function guarantees that the write operation does not produce\r
2226 an alignment fault.\r
2227\r
2228 If the Buffer is NULL, then ASSERT().\r
2229\r
5385a579 2230 @param Buffer Pointer to a 64-bit value that may be unaligned.\r
ac644614 2231 @param Value 64-bit value to write to Buffer.\r
2232\r
5385a579 2233 @return The 64-bit value to write to Buffer.\r
ac644614 2234\r
2235**/\r
2236UINT64\r
2237EFIAPI\r
2238WriteUnaligned64 (\r
5385a579 2239 OUT UINT64 *Buffer,\r
2240 IN UINT64 Value\r
ac644614 2241 );\r
2242\r
2243\r
2244//\r
2245// Bit Field Functions\r
2246//\r
2247\r
2248/**\r
2249 Returns a bit field from an 8-bit value.\r
2250\r
2251 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2252\r
2253 If 8-bit operations are not supported, then ASSERT().\r
2254 If StartBit is greater than 7, then ASSERT().\r
2255 If EndBit is greater than 7, then ASSERT().\r
2256 If EndBit is less than StartBit, then ASSERT().\r
2257\r
2258 @param Operand Operand on which to perform the bitfield operation.\r
2259 @param StartBit The ordinal of the least significant bit in the bit field.\r
2260 Range 0..7.\r
2261 @param EndBit The ordinal of the most significant bit in the bit field.\r
2262 Range 0..7.\r
2263\r
2264 @return The bit field read.\r
2265\r
2266**/\r
2267UINT8\r
2268EFIAPI\r
2269BitFieldRead8 (\r
2270 IN UINT8 Operand,\r
2271 IN UINTN StartBit,\r
2272 IN UINTN EndBit\r
2273 );\r
2274\r
2275\r
2276/**\r
2277 Writes a bit field to an 8-bit value, and returns the result.\r
2278\r
2279 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2280 Operand. All other bits in Operand are preserved. The new 8-bit value is\r
2281 returned.\r
2282\r
2283 If 8-bit operations are not supported, then ASSERT().\r
2284 If StartBit is greater than 7, then ASSERT().\r
2285 If EndBit is greater than 7, then ASSERT().\r
2286 If EndBit is less than StartBit, then ASSERT().\r
2287\r
2288 @param Operand Operand on which to perform the bitfield operation.\r
2289 @param StartBit The ordinal of the least significant bit in the bit field.\r
2290 Range 0..7.\r
2291 @param EndBit The ordinal of the most significant bit in the bit field.\r
2292 Range 0..7.\r
2293 @param Value New value of the bit field.\r
2294\r
2295 @return The new 8-bit value.\r
2296\r
2297**/\r
2298UINT8\r
2299EFIAPI\r
2300BitFieldWrite8 (\r
2301 IN UINT8 Operand,\r
2302 IN UINTN StartBit,\r
2303 IN UINTN EndBit,\r
2304 IN UINT8 Value\r
2305 );\r
2306\r
2307\r
2308/**\r
2309 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
2310 result.\r
2311\r
2312 Performs a bitwise inclusive OR between the bit field specified by StartBit\r
2313 and EndBit in Operand and the value specified by OrData. All other bits in\r
2314 Operand are preserved. The new 8-bit value is returned.\r
2315\r
2316 If 8-bit operations are not supported, then ASSERT().\r
2317 If StartBit is greater than 7, then ASSERT().\r
2318 If EndBit is greater than 7, then ASSERT().\r
2319 If EndBit is less than StartBit, then ASSERT().\r
2320\r
2321 @param Operand Operand on which to perform the bitfield operation.\r
2322 @param StartBit The ordinal of the least significant bit in the bit field.\r
2323 Range 0..7.\r
2324 @param EndBit The ordinal of the most significant bit in the bit field.\r
2325 Range 0..7.\r
2326 @param OrData The value to OR with the read value from the value\r
2327\r
2328 @return The new 8-bit value.\r
2329\r
2330**/\r
2331UINT8\r
2332EFIAPI\r
2333BitFieldOr8 (\r
2334 IN UINT8 Operand,\r
2335 IN UINTN StartBit,\r
2336 IN UINTN EndBit,\r
2337 IN UINT8 OrData\r
2338 );\r
2339\r
2340\r
2341/**\r
2342 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r
2343 the result.\r
2344\r
2345 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2346 in Operand and the value specified by AndData. All other bits in Operand are\r
2347 preserved. The new 8-bit value is returned.\r
2348\r
2349 If 8-bit operations are not supported, then ASSERT().\r
2350 If StartBit is greater than 7, then ASSERT().\r
2351 If EndBit is greater than 7, then ASSERT().\r
2352 If EndBit is less than StartBit, then ASSERT().\r
2353\r
2354 @param Operand Operand on which to perform the bitfield operation.\r
2355 @param StartBit The ordinal of the least significant bit in the bit field.\r
2356 Range 0..7.\r
2357 @param EndBit The ordinal of the most significant bit in the bit field.\r
2358 Range 0..7.\r
2359 @param AndData The value to AND with the read value from the value.\r
2360\r
2361 @return The new 8-bit value.\r
2362\r
2363**/\r
2364UINT8\r
2365EFIAPI\r
2366BitFieldAnd8 (\r
2367 IN UINT8 Operand,\r
2368 IN UINTN StartBit,\r
2369 IN UINTN EndBit,\r
2370 IN UINT8 AndData\r
2371 );\r
2372\r
2373\r
2374/**\r
2375 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r
2376 bitwise OR, and returns the result.\r
2377\r
2378 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2379 in Operand and the value specified by AndData, followed by a bitwise\r
2380 inclusive OR with value specified by OrData. All other bits in Operand are\r
2381 preserved. The new 8-bit value is returned.\r
2382\r
2383 If 8-bit operations are not supported, then ASSERT().\r
2384 If StartBit is greater than 7, then ASSERT().\r
2385 If EndBit is greater than 7, then ASSERT().\r
2386 If EndBit is less than StartBit, then ASSERT().\r
2387\r
2388 @param Operand Operand on which to perform the bitfield operation.\r
2389 @param StartBit The ordinal of the least significant bit in the bit field.\r
2390 Range 0..7.\r
2391 @param EndBit The ordinal of the most significant bit in the bit field.\r
2392 Range 0..7.\r
2393 @param AndData The value to AND with the read value from the value.\r
2394 @param OrData The value to OR with the result of the AND operation.\r
2395\r
2396 @return The new 8-bit value.\r
2397\r
2398**/\r
2399UINT8\r
2400EFIAPI\r
2401BitFieldAndThenOr8 (\r
2402 IN UINT8 Operand,\r
2403 IN UINTN StartBit,\r
2404 IN UINTN EndBit,\r
2405 IN UINT8 AndData,\r
2406 IN UINT8 OrData\r
2407 );\r
2408\r
2409\r
2410/**\r
2411 Returns a bit field from a 16-bit value.\r
2412\r
2413 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2414\r
2415 If 16-bit operations are not supported, then ASSERT().\r
2416 If StartBit is greater than 15, then ASSERT().\r
2417 If EndBit is greater than 15, then ASSERT().\r
2418 If EndBit is less than StartBit, then ASSERT().\r
2419\r
2420 @param Operand Operand on which to perform the bitfield operation.\r
2421 @param StartBit The ordinal of the least significant bit in the bit field.\r
2422 Range 0..15.\r
2423 @param EndBit The ordinal of the most significant bit in the bit field.\r
2424 Range 0..15.\r
2425\r
2426 @return The bit field read.\r
2427\r
2428**/\r
2429UINT16\r
2430EFIAPI\r
2431BitFieldRead16 (\r
2432 IN UINT16 Operand,\r
2433 IN UINTN StartBit,\r
2434 IN UINTN EndBit\r
2435 );\r
2436\r
2437\r
2438/**\r
2439 Writes a bit field to a 16-bit value, and returns the result.\r
2440\r
2441 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2442 Operand. All other bits in Operand are preserved. The new 16-bit value is\r
2443 returned.\r
2444\r
2445 If 16-bit operations are not supported, then ASSERT().\r
2446 If StartBit is greater than 15, then ASSERT().\r
2447 If EndBit is greater than 15, then ASSERT().\r
2448 If EndBit is less than StartBit, then ASSERT().\r
2449\r
2450 @param Operand Operand on which to perform the bitfield operation.\r
2451 @param StartBit The ordinal of the least significant bit in the bit field.\r
2452 Range 0..15.\r
2453 @param EndBit The ordinal of the most significant bit in the bit field.\r
2454 Range 0..15.\r
2455 @param Value New value of the bit field.\r
2456\r
2457 @return The new 16-bit value.\r
2458\r
2459**/\r
2460UINT16\r
2461EFIAPI\r
2462BitFieldWrite16 (\r
2463 IN UINT16 Operand,\r
2464 IN UINTN StartBit,\r
2465 IN UINTN EndBit,\r
2466 IN UINT16 Value\r
2467 );\r
2468\r
2469\r
2470/**\r
2471 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
2472 result.\r
2473\r
2474 Performs a bitwise inclusive OR between the bit field specified by StartBit\r
2475 and EndBit in Operand and the value specified by OrData. All other bits in\r
2476 Operand are preserved. The new 16-bit value is returned.\r
2477\r
2478 If 16-bit operations are not supported, then ASSERT().\r
2479 If StartBit is greater than 15, then ASSERT().\r
2480 If EndBit is greater than 15, then ASSERT().\r
2481 If EndBit is less than StartBit, then ASSERT().\r
2482\r
2483 @param Operand Operand on which to perform the bitfield operation.\r
2484 @param StartBit The ordinal of the least significant bit in the bit field.\r
2485 Range 0..15.\r
2486 @param EndBit The ordinal of the most significant bit in the bit field.\r
2487 Range 0..15.\r
2488 @param OrData The value to OR with the read value from the value\r
2489\r
2490 @return The new 16-bit value.\r
2491\r
2492**/\r
2493UINT16\r
2494EFIAPI\r
2495BitFieldOr16 (\r
2496 IN UINT16 Operand,\r
2497 IN UINTN StartBit,\r
2498 IN UINTN EndBit,\r
2499 IN UINT16 OrData\r
2500 );\r
2501\r
2502\r
2503/**\r
2504 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r
2505 the result.\r
2506\r
2507 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2508 in Operand and the value specified by AndData. All other bits in Operand are\r
2509 preserved. The new 16-bit value is returned.\r
2510\r
2511 If 16-bit operations are not supported, then ASSERT().\r
2512 If StartBit is greater than 15, then ASSERT().\r
2513 If EndBit is greater than 15, then ASSERT().\r
2514 If EndBit is less than StartBit, then ASSERT().\r
2515\r
2516 @param Operand Operand on which to perform the bitfield operation.\r
2517 @param StartBit The ordinal of the least significant bit in the bit field.\r
2518 Range 0..15.\r
2519 @param EndBit The ordinal of the most significant bit in the bit field.\r
2520 Range 0..15.\r
2521 @param AndData The value to AND with the read value from the value\r
2522\r
2523 @return The new 16-bit value.\r
2524\r
2525**/\r
2526UINT16\r
2527EFIAPI\r
2528BitFieldAnd16 (\r
2529 IN UINT16 Operand,\r
2530 IN UINTN StartBit,\r
2531 IN UINTN EndBit,\r
2532 IN UINT16 AndData\r
2533 );\r
2534\r
2535\r
2536/**\r
2537 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r
2538 bitwise OR, and returns the result.\r
2539\r
2540 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2541 in Operand and the value specified by AndData, followed by a bitwise\r
2542 inclusive OR with value specified by OrData. All other bits in Operand are\r
2543 preserved. The new 16-bit value is returned.\r
2544\r
2545 If 16-bit operations are not supported, then ASSERT().\r
2546 If StartBit is greater than 15, then ASSERT().\r
2547 If EndBit is greater than 15, then ASSERT().\r
2548 If EndBit is less than StartBit, then ASSERT().\r
2549\r
2550 @param Operand Operand on which to perform the bitfield operation.\r
2551 @param StartBit The ordinal of the least significant bit in the bit field.\r
2552 Range 0..15.\r
2553 @param EndBit The ordinal of the most significant bit in the bit field.\r
2554 Range 0..15.\r
2555 @param AndData The value to AND with the read value from the value.\r
2556 @param OrData The value to OR with the result of the AND operation.\r
2557\r
2558 @return The new 16-bit value.\r
2559\r
2560**/\r
2561UINT16\r
2562EFIAPI\r
2563BitFieldAndThenOr16 (\r
2564 IN UINT16 Operand,\r
2565 IN UINTN StartBit,\r
2566 IN UINTN EndBit,\r
2567 IN UINT16 AndData,\r
2568 IN UINT16 OrData\r
2569 );\r
2570\r
2571\r
2572/**\r
2573 Returns a bit field from a 32-bit value.\r
2574\r
2575 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2576\r
2577 If 32-bit operations are not supported, then ASSERT().\r
2578 If StartBit is greater than 31, then ASSERT().\r
2579 If EndBit is greater than 31, then ASSERT().\r
2580 If EndBit is less than StartBit, then ASSERT().\r
2581\r
2582 @param Operand Operand on which to perform the bitfield operation.\r
2583 @param StartBit The ordinal of the least significant bit in the bit field.\r
2584 Range 0..31.\r
2585 @param EndBit The ordinal of the most significant bit in the bit field.\r
2586 Range 0..31.\r
2587\r
2588 @return The bit field read.\r
2589\r
2590**/\r
2591UINT32\r
2592EFIAPI\r
2593BitFieldRead32 (\r
2594 IN UINT32 Operand,\r
2595 IN UINTN StartBit,\r
2596 IN UINTN EndBit\r
2597 );\r
2598\r
2599\r
2600/**\r
2601 Writes a bit field to a 32-bit value, and returns the result.\r
2602\r
2603 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2604 Operand. All other bits in Operand are preserved. The new 32-bit value is\r
2605 returned.\r
2606\r
2607 If 32-bit operations are not supported, then ASSERT().\r
2608 If StartBit is greater than 31, then ASSERT().\r
2609 If EndBit is greater than 31, then ASSERT().\r
2610 If EndBit is less than StartBit, then ASSERT().\r
2611\r
2612 @param Operand Operand on which to perform the bitfield operation.\r
2613 @param StartBit The ordinal of the least significant bit in the bit field.\r
2614 Range 0..31.\r
2615 @param EndBit The ordinal of the most significant bit in the bit field.\r
2616 Range 0..31.\r
2617 @param Value New value of the bit field.\r
2618\r
2619 @return The new 32-bit value.\r
2620\r
2621**/\r
2622UINT32\r
2623EFIAPI\r
2624BitFieldWrite32 (\r
2625 IN UINT32 Operand,\r
2626 IN UINTN StartBit,\r
2627 IN UINTN EndBit,\r
2628 IN UINT32 Value\r
2629 );\r
2630\r
2631\r
2632/**\r
2633 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
2634 result.\r
2635\r
2636 Performs a bitwise inclusive OR between the bit field specified by StartBit\r
2637 and EndBit in Operand and the value specified by OrData. All other bits in\r
2638 Operand are preserved. The new 32-bit value is returned.\r
2639\r
2640 If 32-bit operations are not supported, then ASSERT().\r
2641 If StartBit is greater than 31, then ASSERT().\r
2642 If EndBit is greater than 31, then ASSERT().\r
2643 If EndBit is less than StartBit, then ASSERT().\r
2644\r
2645 @param Operand Operand on which to perform the bitfield operation.\r
2646 @param StartBit The ordinal of the least significant bit in the bit field.\r
2647 Range 0..31.\r
2648 @param EndBit The ordinal of the most significant bit in the bit field.\r
2649 Range 0..31.\r
2650 @param OrData The value to OR with the read value from the value\r
2651\r
2652 @return The new 32-bit value.\r
2653\r
2654**/\r
2655UINT32\r
2656EFIAPI\r
2657BitFieldOr32 (\r
2658 IN UINT32 Operand,\r
2659 IN UINTN StartBit,\r
2660 IN UINTN EndBit,\r
2661 IN UINT32 OrData\r
2662 );\r
2663\r
2664\r
2665/**\r
2666 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r
2667 the result.\r
2668\r
2669 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2670 in Operand and the value specified by AndData. All other bits in Operand are\r
2671 preserved. The new 32-bit value is returned.\r
2672\r
2673 If 32-bit operations are not supported, then ASSERT().\r
2674 If StartBit is greater than 31, then ASSERT().\r
2675 If EndBit is greater than 31, then ASSERT().\r
2676 If EndBit is less than StartBit, then ASSERT().\r
2677\r
2678 @param Operand Operand on which to perform the bitfield operation.\r
2679 @param StartBit The ordinal of the least significant bit in the bit field.\r
2680 Range 0..31.\r
2681 @param EndBit The ordinal of the most significant bit in the bit field.\r
2682 Range 0..31.\r
2683 @param AndData The value to AND with the read value from the value\r
2684\r
2685 @return The new 32-bit value.\r
2686\r
2687**/\r
2688UINT32\r
2689EFIAPI\r
2690BitFieldAnd32 (\r
2691 IN UINT32 Operand,\r
2692 IN UINTN StartBit,\r
2693 IN UINTN EndBit,\r
2694 IN UINT32 AndData\r
2695 );\r
2696\r
2697\r
2698/**\r
2699 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r
2700 bitwise OR, and returns the result.\r
2701\r
2702 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2703 in Operand and the value specified by AndData, followed by a bitwise\r
2704 inclusive OR with value specified by OrData. All other bits in Operand are\r
2705 preserved. The new 32-bit value is returned.\r
2706\r
2707 If 32-bit operations are not supported, then ASSERT().\r
2708 If StartBit is greater than 31, then ASSERT().\r
2709 If EndBit is greater than 31, then ASSERT().\r
2710 If EndBit is less than StartBit, then ASSERT().\r
2711\r
2712 @param Operand Operand on which to perform the bitfield operation.\r
2713 @param StartBit The ordinal of the least significant bit in the bit field.\r
2714 Range 0..31.\r
2715 @param EndBit The ordinal of the most significant bit in the bit field.\r
2716 Range 0..31.\r
2717 @param AndData The value to AND with the read value from the value.\r
2718 @param OrData The value to OR with the result of the AND operation.\r
2719\r
2720 @return The new 32-bit value.\r
2721\r
2722**/\r
2723UINT32\r
2724EFIAPI\r
2725BitFieldAndThenOr32 (\r
2726 IN UINT32 Operand,\r
2727 IN UINTN StartBit,\r
2728 IN UINTN EndBit,\r
2729 IN UINT32 AndData,\r
2730 IN UINT32 OrData\r
2731 );\r
2732\r
2733\r
2734/**\r
2735 Returns a bit field from a 64-bit value.\r
2736\r
2737 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2738\r
2739 If 64-bit operations are not supported, then ASSERT().\r
2740 If StartBit is greater than 63, then ASSERT().\r
2741 If EndBit is greater than 63, then ASSERT().\r
2742 If EndBit is less than StartBit, then ASSERT().\r
2743\r
2744 @param Operand Operand on which to perform the bitfield operation.\r
2745 @param StartBit The ordinal of the least significant bit in the bit field.\r
2746 Range 0..63.\r
2747 @param EndBit The ordinal of the most significant bit in the bit field.\r
2748 Range 0..63.\r
2749\r
2750 @return The bit field read.\r
2751\r
2752**/\r
2753UINT64\r
2754EFIAPI\r
2755BitFieldRead64 (\r
2756 IN UINT64 Operand,\r
2757 IN UINTN StartBit,\r
2758 IN UINTN EndBit\r
2759 );\r
2760\r
2761\r
2762/**\r
2763 Writes a bit field to a 64-bit value, and returns the result.\r
2764\r
2765 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2766 Operand. All other bits in Operand are preserved. The new 64-bit value is\r
2767 returned.\r
2768\r
2769 If 64-bit operations are not supported, then ASSERT().\r
2770 If StartBit is greater than 63, then ASSERT().\r
2771 If EndBit is greater than 63, then ASSERT().\r
2772 If EndBit is less than StartBit, then ASSERT().\r
2773\r
2774 @param Operand Operand on which to perform the bitfield operation.\r
2775 @param StartBit The ordinal of the least significant bit in the bit field.\r
2776 Range 0..63.\r
2777 @param EndBit The ordinal of the most significant bit in the bit field.\r
2778 Range 0..63.\r
2779 @param Value New value of the bit field.\r
2780\r
2781 @return The new 64-bit value.\r
2782\r
2783**/\r
2784UINT64\r
2785EFIAPI\r
2786BitFieldWrite64 (\r
2787 IN UINT64 Operand,\r
2788 IN UINTN StartBit,\r
2789 IN UINTN EndBit,\r
2790 IN UINT64 Value\r
2791 );\r
2792\r
2793\r
2794/**\r
2795 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
2796 result.\r
2797\r
2798 Performs a bitwise inclusive OR between the bit field specified by StartBit\r
2799 and EndBit in Operand and the value specified by OrData. All other bits in\r
2800 Operand are preserved. The new 64-bit value is returned.\r
2801\r
2802 If 64-bit operations are not supported, then ASSERT().\r
2803 If StartBit is greater than 63, then ASSERT().\r
2804 If EndBit is greater than 63, then ASSERT().\r
2805 If EndBit is less than StartBit, then ASSERT().\r
2806\r
2807 @param Operand Operand on which to perform the bitfield operation.\r
2808 @param StartBit The ordinal of the least significant bit in the bit field.\r
2809 Range 0..63.\r
2810 @param EndBit The ordinal of the most significant bit in the bit field.\r
2811 Range 0..63.\r
2812 @param OrData The value to OR with the read value from the value\r
2813\r
2814 @return The new 64-bit value.\r
2815\r
2816**/\r
2817UINT64\r
2818EFIAPI\r
2819BitFieldOr64 (\r
2820 IN UINT64 Operand,\r
2821 IN UINTN StartBit,\r
2822 IN UINTN EndBit,\r
2823 IN UINT64 OrData\r
2824 );\r
2825\r
2826\r
2827/**\r
2828 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r
2829 the result.\r
2830\r
2831 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2832 in Operand and the value specified by AndData. All other bits in Operand are\r
2833 preserved. The new 64-bit value is returned.\r
2834\r
2835 If 64-bit operations are not supported, then ASSERT().\r
2836 If StartBit is greater than 63, then ASSERT().\r
2837 If EndBit is greater than 63, then ASSERT().\r
2838 If EndBit is less than StartBit, then ASSERT().\r
2839\r
2840 @param Operand Operand on which to perform the bitfield operation.\r
2841 @param StartBit The ordinal of the least significant bit in the bit field.\r
2842 Range 0..63.\r
2843 @param EndBit The ordinal of the most significant bit in the bit field.\r
2844 Range 0..63.\r
2845 @param AndData The value to AND with the read value from the value\r
2846\r
2847 @return The new 64-bit value.\r
2848\r
2849**/\r
2850UINT64\r
2851EFIAPI\r
2852BitFieldAnd64 (\r
2853 IN UINT64 Operand,\r
2854 IN UINTN StartBit,\r
2855 IN UINTN EndBit,\r
2856 IN UINT64 AndData\r
2857 );\r
2858\r
2859\r
2860/**\r
2861 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r
2862 bitwise OR, and returns the result.\r
2863\r
2864 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2865 in Operand and the value specified by AndData, followed by a bitwise\r
2866 inclusive OR with value specified by OrData. All other bits in Operand are\r
2867 preserved. The new 64-bit value is returned.\r
2868\r
2869 If 64-bit operations are not supported, then ASSERT().\r
2870 If StartBit is greater than 63, then ASSERT().\r
2871 If EndBit is greater than 63, then ASSERT().\r
2872 If EndBit is less than StartBit, then ASSERT().\r
2873\r
2874 @param Operand Operand on which to perform the bitfield operation.\r
2875 @param StartBit The ordinal of the least significant bit in the bit field.\r
2876 Range 0..63.\r
2877 @param EndBit The ordinal of the most significant bit in the bit field.\r
2878 Range 0..63.\r
2879 @param AndData The value to AND with the read value from the value.\r
2880 @param OrData The value to OR with the result of the AND operation.\r
2881\r
2882 @return The new 64-bit value.\r
2883\r
2884**/\r
2885UINT64\r
2886EFIAPI\r
2887BitFieldAndThenOr64 (\r
2888 IN UINT64 Operand,\r
2889 IN UINTN StartBit,\r
2890 IN UINTN EndBit,\r
2891 IN UINT64 AndData,\r
2892 IN UINT64 OrData\r
2893 );\r
2894\r
2895\r
2896//\r
2897// Base Library Synchronization Functions\r
2898//\r
2899\r
2900/**\r
2901 Retrieves the architecture specific spin lock alignment requirements for\r
2902 optimal spin lock performance.\r
2903\r
2904 This function retrieves the spin lock alignment requirements for optimal\r
2905 performance on a given CPU architecture. The spin lock alignment must be a\r
2906 power of two and is returned by this function. If there are no alignment\r
2907 requirements, then 1 must be returned. The spin lock synchronization\r
2908 functions must function correctly if the spin lock size and alignment values\r
2909 returned by this function are not used at all. These values are hints to the\r
2910 consumers of the spin lock synchronization functions to obtain optimal spin\r
2911 lock performance.\r
2912\r
2913 @return The architecture specific spin lock alignment.\r
2914\r
2915**/\r
2916UINTN\r
2917EFIAPI\r
2918GetSpinLockProperties (\r
2919 VOID\r
2920 );\r
2921\r
2922\r
2923/**\r
2924 Initializes a spin lock to the released state and returns the spin lock.\r
2925\r
2926 This function initializes the spin lock specified by SpinLock to the released\r
2927 state, and returns SpinLock. Optimal performance can be achieved by calling\r
2928 GetSpinLockProperties() to determine the size and alignment requirements for\r
2929 SpinLock.\r
2930\r
2931 If SpinLock is NULL, then ASSERT().\r
2932\r
2933 @param SpinLock A pointer to the spin lock to initialize to the released\r
2934 state.\r
2935\r
38bbd3d9 2936 @return SpinLock in release state.\r
ac644614 2937\r
2938**/\r
2939SPIN_LOCK *\r
2940EFIAPI\r
2941InitializeSpinLock (\r
282b7ec6 2942 OUT SPIN_LOCK *SpinLock\r
ac644614 2943 );\r
2944\r
2945\r
2946/**\r
2947 Waits until a spin lock can be placed in the acquired state.\r
2948\r
2949 This function checks the state of the spin lock specified by SpinLock. If\r
2950 SpinLock is in the released state, then this function places SpinLock in the\r
2951 acquired state and returns SpinLock. Otherwise, this function waits\r
2952 indefinitely for the spin lock to be released, and then places it in the\r
2953 acquired state and returns SpinLock. All state transitions of SpinLock must\r
2954 be performed using MP safe mechanisms.\r
2955\r
2956 If SpinLock is NULL, then ASSERT().\r
2957 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
2958 If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r
2959 PcdSpinLockTimeout microseconds, then ASSERT().\r
2960\r
2961 @param SpinLock A pointer to the spin lock to place in the acquired state.\r
2962\r
9aa049d9 2963 @return SpinLock acquired lock.\r
ac644614 2964\r
2965**/\r
2966SPIN_LOCK *\r
2967EFIAPI\r
2968AcquireSpinLock (\r
aa0583c7 2969 IN OUT SPIN_LOCK *SpinLock\r
ac644614 2970 );\r
2971\r
2972\r
2973/**\r
2974 Attempts to place a spin lock in the acquired state.\r
2975\r
2976 This function checks the state of the spin lock specified by SpinLock. If\r
2977 SpinLock is in the released state, then this function places SpinLock in the\r
2978 acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r
2979 transitions of SpinLock must be performed using MP safe mechanisms.\r
2980\r
2981 If SpinLock is NULL, then ASSERT().\r
2982 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
2983\r
2984 @param SpinLock A pointer to the spin lock to place in the acquired state.\r
2985\r
2986 @retval TRUE SpinLock was placed in the acquired state.\r
2987 @retval FALSE SpinLock could not be acquired.\r
2988\r
2989**/\r
2990BOOLEAN\r
2991EFIAPI\r
2992AcquireSpinLockOrFail (\r
aa0583c7 2993 IN OUT SPIN_LOCK *SpinLock\r
ac644614 2994 );\r
2995\r
2996\r
2997/**\r
2998 Releases a spin lock.\r
2999\r
3000 This function places the spin lock specified by SpinLock in the release state\r
3001 and returns SpinLock.\r
3002\r
3003 If SpinLock is NULL, then ASSERT().\r
3004 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
3005\r
3006 @param SpinLock A pointer to the spin lock to release.\r
3007\r
38bbd3d9 3008 @return SpinLock released lock.\r
ac644614 3009\r
3010**/\r
3011SPIN_LOCK *\r
3012EFIAPI\r
3013ReleaseSpinLock (\r
aa0583c7 3014 IN OUT SPIN_LOCK *SpinLock\r
ac644614 3015 );\r
3016\r
3017\r
3018/**\r
3019 Performs an atomic increment of an 32-bit unsigned integer.\r
3020\r
3021 Performs an atomic increment of the 32-bit unsigned integer specified by\r
3022 Value and returns the incremented value. The increment operation must be\r
3023 performed using MP safe mechanisms. The state of the return value is not\r
3024 guaranteed to be MP safe.\r
3025\r
3026 If Value is NULL, then ASSERT().\r
3027\r
3028 @param Value A pointer to the 32-bit value to increment.\r
3029\r
3030 @return The incremented value.\r
3031\r
3032**/\r
3033UINT32\r
3034EFIAPI\r
3035InterlockedIncrement (\r
3036 IN UINT32 *Value\r
3037 );\r
3038\r
3039\r
3040/**\r
3041 Performs an atomic decrement of an 32-bit unsigned integer.\r
3042\r
3043 Performs an atomic decrement of the 32-bit unsigned integer specified by\r
3044 Value and returns the decremented value. The decrement operation must be\r
3045 performed using MP safe mechanisms. The state of the return value is not\r
3046 guaranteed to be MP safe.\r
3047\r
3048 If Value is NULL, then ASSERT().\r
3049\r
3050 @param Value A pointer to the 32-bit value to decrement.\r
3051\r
3052 @return The decremented value.\r
3053\r
3054**/\r
3055UINT32\r
3056EFIAPI\r
3057InterlockedDecrement (\r
3058 IN UINT32 *Value\r
3059 );\r
3060\r
3061\r
3062/**\r
3063 Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
3064\r
3065 Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
3066 specified by Value. If Value is equal to CompareValue, then Value is set to\r
3067 ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r
3068 then Value is returned. The compare exchange operation must be performed using\r
3069 MP safe mechanisms.\r
3070\r
3071 If Value is NULL, then ASSERT().\r
3072\r
3073 @param Value A pointer to the 32-bit value for the compare exchange\r
3074 operation.\r
3075 @param CompareValue 32-bit value used in compare operation.\r
3076 @param ExchangeValue 32-bit value used in exchange operation.\r
3077\r
3078 @return The original *Value before exchange.\r
3079\r
3080**/\r
3081UINT32\r
3082EFIAPI\r
3083InterlockedCompareExchange32 (\r
3084 IN OUT UINT32 *Value,\r
3085 IN UINT32 CompareValue,\r
3086 IN UINT32 ExchangeValue\r
3087 );\r
3088\r
3089\r
3090/**\r
3091 Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
3092\r
3093 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
3094 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
3095 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r
3096 The compare exchange operation must be performed using MP safe mechanisms.\r
3097\r
3098 If Value is NULL, then ASSERT().\r
3099\r
3100 @param Value A pointer to the 64-bit value for the compare exchange\r
3101 operation.\r
3102 @param CompareValue 64-bit value used in compare operation.\r
3103 @param ExchangeValue 64-bit value used in exchange operation.\r
3104\r
3105 @return The original *Value before exchange.\r
3106\r
3107**/\r
3108UINT64\r
3109EFIAPI\r
3110InterlockedCompareExchange64 (\r
3111 IN OUT UINT64 *Value,\r
3112 IN UINT64 CompareValue,\r
3113 IN UINT64 ExchangeValue\r
3114 );\r
3115\r
3116\r
3117/**\r
3118 Performs an atomic compare exchange operation on a pointer value.\r
3119\r
3120 Performs an atomic compare exchange operation on the pointer value specified\r
3121 by Value. If Value is equal to CompareValue, then Value is set to\r
3122 ExchangeValue and CompareValue is returned. If Value is not equal to\r
3123 CompareValue, then Value is returned. The compare exchange operation must be\r
3124 performed using MP safe mechanisms.\r
3125\r
3126 If Value is NULL, then ASSERT().\r
3127\r
3128 @param Value A pointer to the pointer value for the compare exchange\r
3129 operation.\r
3130 @param CompareValue Pointer value used in compare operation.\r
3131 @param ExchangeValue Pointer value used in exchange operation.\r
3132\r
38bbd3d9 3133 @return The original *Value before exchange.\r
ac644614 3134**/\r
3135VOID *\r
3136EFIAPI\r
3137InterlockedCompareExchangePointer (\r
3138 IN OUT VOID **Value,\r
3139 IN VOID *CompareValue,\r
3140 IN VOID *ExchangeValue\r
3141 );\r
3142\r
3143\r
3144//\r
3145// Base Library Checksum Functions\r
3146//\r
3147\r
3148/**\r
17f695ed 3149 Returns the sum of all elements in a buffer in unit of UINT8.\r
ac644614 3150 During calculation, the carry bits are dropped.\r
3151\r
3152 This function calculates the sum of all elements in a buffer\r
3153 in unit of UINT8. The carry bits in result of addition are dropped.\r
3154 The result is returned as UINT8. If Length is Zero, then Zero is\r
3155 returned.\r
3156\r
3157 If Buffer is NULL, then ASSERT().\r
3158 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3159\r
1106ffe1 3160 @param Buffer Pointer to the buffer to carry out the sum operation.\r
17f695ed 3161 @param Length The size, in bytes, of Buffer.\r
ac644614 3162\r
3163 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3164\r
3165**/\r
3166UINT8\r
3167EFIAPI\r
3168CalculateSum8 (\r
ee6c452c 3169 IN CONST UINT8 *Buffer,\r
3170 IN UINTN Length\r
ac644614 3171 );\r
3172\r
3173\r
3174/**\r
3175 Returns the two's complement checksum of all elements in a buffer\r
3176 of 8-bit values.\r
3177\r
3178 This function first calculates the sum of the 8-bit values in the\r
3179 buffer specified by Buffer and Length. The carry bits in the result\r
3180 of addition are dropped. Then, the two's complement of the sum is\r
3181 returned. If Length is 0, then 0 is returned.\r
3182\r
3183 If Buffer is NULL, then ASSERT().\r
3184 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3185\r
1106ffe1 3186 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3187 @param Length The size, in bytes, of Buffer.\r
ac644614 3188\r
ee6c452c 3189 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3190\r
3191**/\r
3192UINT8\r
3193EFIAPI\r
3194CalculateCheckSum8 (\r
ee6c452c 3195 IN CONST UINT8 *Buffer,\r
3196 IN UINTN Length\r
ac644614 3197 );\r
3198\r
3199\r
3200/**\r
3201 Returns the sum of all elements in a buffer of 16-bit values. During\r
3202 calculation, the carry bits are dropped.\r
3203\r
3204 This function calculates the sum of the 16-bit values in the buffer\r
3205 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
3206 The 16-bit result is returned. If Length is 0, then 0 is returned.\r
3207\r
3208 If Buffer is NULL, then ASSERT().\r
3209 If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
3210 If Length is not aligned on a 16-bit boundary, then ASSERT().\r
3211 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3212\r
1106ffe1 3213 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3214 @param Length The size, in bytes, of Buffer.\r
ac644614 3215\r
3216 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3217\r
3218**/\r
3219UINT16\r
3220EFIAPI\r
3221CalculateSum16 (\r
ee6c452c 3222 IN CONST UINT16 *Buffer,\r
3223 IN UINTN Length\r
ac644614 3224 );\r
3225\r
3226\r
3227/**\r
3228 Returns the two's complement checksum of all elements in a buffer of\r
3229 16-bit values.\r
3230\r
3231 This function first calculates the sum of the 16-bit values in the buffer\r
3232 specified by Buffer and Length. The carry bits in the result of addition\r
3233 are dropped. Then, the two's complement of the sum is returned. If Length\r
3234 is 0, then 0 is returned.\r
3235\r
3236 If Buffer is NULL, then ASSERT().\r
3237 If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
3238 If Length is not aligned on a 16-bit boundary, then ASSERT().\r
3239 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3240\r
1106ffe1 3241 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3242 @param Length The size, in bytes, of Buffer.\r
ac644614 3243\r
ee6c452c 3244 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3245\r
3246**/\r
3247UINT16\r
3248EFIAPI\r
3249CalculateCheckSum16 (\r
ee6c452c 3250 IN CONST UINT16 *Buffer,\r
3251 IN UINTN Length\r
ac644614 3252 );\r
3253\r
3254\r
3255/**\r
17f695ed 3256 Returns the sum of all elements in a buffer of 32-bit values. During\r
ac644614 3257 calculation, the carry bits are dropped.\r
3258\r
3259 This function calculates the sum of the 32-bit values in the buffer\r
3260 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
17f695ed 3261 The 32-bit result is returned. If Length is 0, then 0 is returned.\r
ac644614 3262\r
3263 If Buffer is NULL, then ASSERT().\r
3264 If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
3265 If Length is not aligned on a 32-bit boundary, then ASSERT().\r
3266 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3267\r
1106ffe1 3268 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3269 @param Length The size, in bytes, of Buffer.\r
ac644614 3270\r
3271 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3272\r
3273**/\r
3274UINT32\r
3275EFIAPI\r
3276CalculateSum32 (\r
ee6c452c 3277 IN CONST UINT32 *Buffer,\r
3278 IN UINTN Length\r
ac644614 3279 );\r
3280\r
3281\r
3282/**\r
3283 Returns the two's complement checksum of all elements in a buffer of\r
3284 32-bit values.\r
3285\r
3286 This function first calculates the sum of the 32-bit values in the buffer\r
3287 specified by Buffer and Length. The carry bits in the result of addition\r
3288 are dropped. Then, the two's complement of the sum is returned. If Length\r
3289 is 0, then 0 is returned.\r
3290\r
3291 If Buffer is NULL, then ASSERT().\r
3292 If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
3293 If Length is not aligned on a 32-bit boundary, then ASSERT().\r
3294 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3295\r
1106ffe1 3296 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3297 @param Length The size, in bytes, of Buffer.\r
ac644614 3298\r
ee6c452c 3299 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3300\r
3301**/\r
3302UINT32\r
3303EFIAPI\r
3304CalculateCheckSum32 (\r
ee6c452c 3305 IN CONST UINT32 *Buffer,\r
3306 IN UINTN Length\r
ac644614 3307 );\r
3308\r
3309\r
3310/**\r
3311 Returns the sum of all elements in a buffer of 64-bit values. During\r
3312 calculation, the carry bits are dropped.\r
3313\r
3314 This function calculates the sum of the 64-bit values in the buffer\r
3315 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
3316 The 64-bit result is returned. If Length is 0, then 0 is returned.\r
3317\r
3318 If Buffer is NULL, then ASSERT().\r
3319 If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
3320 If Length is not aligned on a 64-bit boundary, then ASSERT().\r
3321 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3322\r
1106ffe1 3323 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3324 @param Length The size, in bytes, of Buffer.\r
ac644614 3325\r
3326 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3327\r
3328**/\r
3329UINT64\r
3330EFIAPI\r
3331CalculateSum64 (\r
ee6c452c 3332 IN CONST UINT64 *Buffer,\r
3333 IN UINTN Length\r
ac644614 3334 );\r
3335\r
3336\r
3337/**\r
3338 Returns the two's complement checksum of all elements in a buffer of\r
3339 64-bit values.\r
3340\r
3341 This function first calculates the sum of the 64-bit values in the buffer\r
3342 specified by Buffer and Length. The carry bits in the result of addition\r
3343 are dropped. Then, the two's complement of the sum is returned. If Length\r
3344 is 0, then 0 is returned.\r
3345\r
3346 If Buffer is NULL, then ASSERT().\r
3347 If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
3348 If Length is not aligned on a 64-bit boundary, then ASSERT().\r
3349 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3350\r
1106ffe1 3351 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3352 @param Length The size, in bytes, of Buffer.\r
ac644614 3353\r
ee6c452c 3354 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3355\r
3356**/\r
3357UINT64\r
3358EFIAPI\r
3359CalculateCheckSum64 (\r
ee6c452c 3360 IN CONST UINT64 *Buffer,\r
3361 IN UINTN Length\r
ac644614 3362 );\r
3363\r
3364\r
1106ffe1 3365///\r
3366/// Base Library CPU Functions\r
3367///\r
ac644614 3368typedef\r
3369VOID\r
9810cdd8 3370(EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r
ac644614 3371 IN VOID *Context1, OPTIONAL\r
3372 IN VOID *Context2 OPTIONAL\r
3373 );\r
3374\r
3375\r
3376/**\r
3377 Used to serialize load and store operations.\r
3378\r
3379 All loads and stores that proceed calls to this function are guaranteed to be\r
3380 globally visible when this function returns.\r
3381\r
3382**/\r
3383VOID\r
3384EFIAPI\r
3385MemoryFence (\r
3386 VOID\r
3387 );\r
3388\r
3389\r
3390/**\r
3391 Saves the current CPU context that can be restored with a call to LongJump()\r
3392 and returns 0.\r
3393\r
3394 Saves the current CPU context in the buffer specified by JumpBuffer and\r
3395 returns 0. The initial call to SetJump() must always return 0. Subsequent\r
3396 calls to LongJump() cause a non-zero value to be returned by SetJump().\r
3397\r
3398 If JumpBuffer is NULL, then ASSERT().\r
3399 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
17f695ed 3400 \r
3401 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r
3402 The same structure must never be used for more than one CPU architecture context.\r
3403 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r
3404 SetJump()/LongJump() is not currently supported for the EBC processor type. \r
ac644614 3405\r
3406 @param JumpBuffer A pointer to CPU context buffer.\r
3407\r
3408 @retval 0 Indicates a return from SetJump().\r
3409\r
3410**/\r
3411UINTN\r
3412EFIAPI\r
3413SetJump (\r
3414 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
3415 );\r
3416\r
3417\r
3418/**\r
3419 Restores the CPU context that was saved with SetJump().\r
3420\r
3421 Restores the CPU context from the buffer specified by JumpBuffer. This\r
3422 function never returns to the caller. Instead is resumes execution based on\r
3423 the state of JumpBuffer.\r
3424\r
3425 If JumpBuffer is NULL, then ASSERT().\r
3426 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
3427 If Value is 0, then ASSERT().\r
3428\r
3429 @param JumpBuffer A pointer to CPU context buffer.\r
3430 @param Value The value to return when the SetJump() context is\r
3431 restored and must be non-zero.\r
3432\r
3433**/\r
3434VOID\r
3435EFIAPI\r
3436LongJump (\r
3437 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r
3438 IN UINTN Value\r
3439 );\r
3440\r
3441\r
3442/**\r
3443 Enables CPU interrupts.\r
3444\r
ac644614 3445**/\r
3446VOID\r
3447EFIAPI\r
3448EnableInterrupts (\r
3449 VOID\r
3450 );\r
3451\r
3452\r
3453/**\r
3454 Disables CPU interrupts.\r
3455\r
ac644614 3456**/\r
3457VOID\r
3458EFIAPI\r
3459DisableInterrupts (\r
3460 VOID\r
3461 );\r
3462\r
3463\r
3464/**\r
3465 Disables CPU interrupts and returns the interrupt state prior to the disable\r
3466 operation.\r
3467\r
ac644614 3468 @retval TRUE CPU interrupts were enabled on entry to this call.\r
3469 @retval FALSE CPU interrupts were disabled on entry to this call.\r
3470\r
3471**/\r
3472BOOLEAN\r
3473EFIAPI\r
3474SaveAndDisableInterrupts (\r
3475 VOID\r
3476 );\r
3477\r
3478\r
3479/**\r
3480 Enables CPU interrupts for the smallest window required to capture any\r
3481 pending interrupts.\r
3482\r
ac644614 3483**/\r
3484VOID\r
3485EFIAPI\r
3486EnableDisableInterrupts (\r
3487 VOID\r
3488 );\r
3489\r
3490\r
3491/**\r
3492 Retrieves the current CPU interrupt state.\r
3493\r
38bbd3d9 3494 Returns TRUE is interrupts are currently enabled. Otherwise\r
3495 returns FALSE.\r
ac644614 3496\r
3497 @retval TRUE CPU interrupts are enabled.\r
3498 @retval FALSE CPU interrupts are disabled.\r
3499\r
3500**/\r
3501BOOLEAN\r
3502EFIAPI\r
3503GetInterruptState (\r
3504 VOID\r
3505 );\r
3506\r
3507\r
3508/**\r
3509 Set the current CPU interrupt state.\r
3510\r
3511 Sets the current CPU interrupt state to the state specified by\r
3512 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r
3513 InterruptState is FALSE, then interrupts are disabled. InterruptState is\r
3514 returned.\r
3515\r
3516 @param InterruptState TRUE if interrupts should enabled. FALSE if\r
3517 interrupts should be disabled.\r
3518\r
3519 @return InterruptState\r
3520\r
3521**/\r
3522BOOLEAN\r
3523EFIAPI\r
3524SetInterruptState (\r
3525 IN BOOLEAN InterruptState\r
3526 );\r
3527\r
3528\r
3529/**\r
3530 Requests CPU to pause for a short period of time.\r
3531\r
3532 Requests CPU to pause for a short period of time. Typically used in MP\r
3533 systems to prevent memory starvation while waiting for a spin lock.\r
3534\r
3535**/\r
3536VOID\r
3537EFIAPI\r
3538CpuPause (\r
3539 VOID\r
3540 );\r
3541\r
3542\r
3543/**\r
3544 Transfers control to a function starting with a new stack.\r
3545\r
3546 Transfers control to the function specified by EntryPoint using the\r
3547 new stack specified by NewStack and passing in the parameters specified\r
3548 by Context1 and Context2. Context1 and Context2 are optional and may\r
3549 be NULL. The function EntryPoint must never return. This function\r
3550 supports a variable number of arguments following the NewStack parameter.\r
3551 These additional arguments are ignored on IA-32, x64, and EBC.\r
3552 IPF CPUs expect one additional parameter of type VOID * that specifies\r
3553 the new backing store pointer.\r
3554\r
3555 If EntryPoint is NULL, then ASSERT().\r
3556 If NewStack is NULL, then ASSERT().\r
3557\r
3558 @param EntryPoint A pointer to function to call with the new stack.\r
3559 @param Context1 A pointer to the context to pass into the EntryPoint\r
3560 function.\r
3561 @param Context2 A pointer to the context to pass into the EntryPoint\r
3562 function.\r
3563 @param NewStack A pointer to the new stack to use for the EntryPoint\r
3564 function.\r
285010e7 3565 @param ... This variable argument list is ignored for IA32, x64, and EBC. \r
3566 For IPF, this variable argument list is expected to contain \r
3567 a single parameter of type VOID * that specifies the new backing \r
3568 store pointer.\r
42eedea9 3569\r
ac644614 3570\r
3571**/\r
3572VOID\r
3573EFIAPI\r
3574SwitchStack (\r
3575 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
3576 IN VOID *Context1, OPTIONAL\r
3577 IN VOID *Context2, OPTIONAL\r
3578 IN VOID *NewStack,\r
3579 ...\r
3580 );\r
3581\r
3582\r
3583/**\r
3584 Generates a breakpoint on the CPU.\r
3585\r
3586 Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
3587 that code can resume normal execution after the breakpoint.\r
3588\r
3589**/\r
3590VOID\r
3591EFIAPI\r
3592CpuBreakpoint (\r
3593 VOID\r
3594 );\r
3595\r
3596\r
3597/**\r
3598 Executes an infinite loop.\r
3599\r
3600 Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
3601 past the loop and the code that follows the loop must execute properly. This\r
3602 implies that the infinite loop must not cause the code that follow it to be\r
3603 optimized away.\r
3604\r
3605**/\r
3606VOID\r
3607EFIAPI\r
3608CpuDeadLoop (\r
3609 VOID\r
3610 );\r
ac644614 3611#if defined (MDE_CPU_IPF)\r
3612\r
3613/**\r
3614 Flush a range of cache lines in the cache coherency domain of the calling\r
3615 CPU.\r
3616\r
cc39b88b 3617 Flushes the cache lines specified by Address and Length. If Address is not aligned \r
3618 on a cache line boundary, then entire cache line containing Address is flushed. \r
3619 If Address + Length is not aligned on a cache line boundary, then the entire cache \r
3620 line containing Address + Length - 1 is flushed. This function may choose to flush \r
3621 the entire cache if that is more efficient than flushing the specified range. If \r
3622 Length is 0, the no cache lines are flushed. Address is returned. \r
3623 This function is only available on IPF.\r
ac644614 3624\r
3625 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
3626\r
3627 @param Address The base address of the instruction lines to invalidate. If\r
3628 the CPU is in a physical addressing mode, then Address is a\r
3629 physical address. If the CPU is in a virtual addressing mode,\r
3630 then Address is a virtual address.\r
3631\r
3632 @param Length The number of bytes to invalidate from the instruction cache.\r
3633\r
cc39b88b 3634 @return Address.\r
ac644614 3635\r
3636**/\r
3637VOID *\r
3638EFIAPI\r
cc39b88b 3639AsmFlushCacheRange (\r
ac644614 3640 IN VOID *Address,\r
3641 IN UINTN Length\r
3642 );\r
3643\r
3644\r
3645/**\r
3646 Executes a FC instruction\r
3647 Executes a FC instruction on the cache line specified by Address.\r
3648 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
3649 An implementation may flush a larger region. This function is only available on IPF.\r
3650\r
ee6c452c 3651 @param Address The Address of cache line to be flushed.\r
ac644614 3652\r
3653 @return The address of FC instruction executed.\r
3654\r
3655**/\r
3656UINT64\r
3657EFIAPI\r
3658AsmFc (\r
3659 IN UINT64 Address\r
3660 );\r
3661\r
3662\r
3663/**\r
3664 Executes a FC.I instruction.\r
3665 Executes a FC.I instruction on the cache line specified by Address.\r
3666 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
3667 An implementation may flush a larger region. This function is only available on IPF.\r
3668\r
ee6c452c 3669 @param Address The Address of cache line to be flushed.\r
ac644614 3670\r
3671 @return The address of FC.I instruction executed.\r
3672\r
3673**/\r
3674UINT64\r
3675EFIAPI\r
3676AsmFci (\r
3677 IN UINT64 Address\r
3678 );\r
3679\r
3680\r
3681/**\r
3682 Reads the current value of a Processor Identifier Register (CPUID).\r
17f695ed 3683 \r
3684 Reads and returns the current value of Processor Identifier Register specified by Index. \r
ac644614 3685 The Index of largest implemented CPUID (One less than the number of implemented CPUID\r
3686 registers) is determined by CPUID [3] bits {7:0}.\r
3687 No parameter checking is performed on Index. If the Index value is beyond the\r
3688 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r
3689 must either guarantee that Index is valid, or the caller must set up fault handlers to\r
3690 catch the faults. This function is only available on IPF.\r
3691\r
ee6c452c 3692 @param Index The 8-bit Processor Identifier Register index to read.\r
ac644614 3693\r
3694 @return The current value of Processor Identifier Register specified by Index.\r
3695\r
3696**/\r
3697UINT64\r
3698EFIAPI\r
3699AsmReadCpuid (\r
3700 IN UINT8 Index\r
3701 );\r
3702\r
3703\r
3704/**\r
3705 Reads the current value of 64-bit Processor Status Register (PSR).\r
3706 This function is only available on IPF.\r
3707\r
3708 @return The current value of PSR.\r
3709\r
3710**/\r
3711UINT64\r
3712EFIAPI\r
3713AsmReadPsr (\r
3714 VOID\r
3715 );\r
3716\r
3717\r
3718/**\r
3719 Writes the current value of 64-bit Processor Status Register (PSR).\r
22388319 3720\r
ac644614 3721 No parameter checking is performed on Value. All bits of Value corresponding to\r
22388319 3722 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r
3723 The caller must either guarantee that Value is valid, or the caller must set up\r
3724 fault handlers to catch the faults. This function is only available on IPF.\r
ac644614 3725\r
ee6c452c 3726 @param Value The 64-bit value to write to PSR.\r
ac644614 3727\r
3728 @return The 64-bit value written to the PSR.\r
3729\r
3730**/\r
3731UINT64\r
3732EFIAPI\r
3733AsmWritePsr (\r
3734 IN UINT64 Value\r
3735 );\r
3736\r
3737\r
3738/**\r
3739 Reads the current value of 64-bit Kernel Register #0 (KR0).\r
3740 This function is only available on IPF.\r
3741\r
3742 @return The current value of KR0.\r
3743\r
3744**/\r
3745UINT64\r
3746EFIAPI\r
3747AsmReadKr0 (\r
3748 VOID\r
3749 );\r
3750\r
3751\r
3752/**\r
3753 Reads the current value of 64-bit Kernel Register #1 (KR1).\r
3754 This function is only available on IPF.\r
3755\r
3756 @return The current value of KR1.\r
3757\r
3758**/\r
3759UINT64\r
3760EFIAPI\r
3761AsmReadKr1 (\r
3762 VOID\r
3763 );\r
3764\r
3765\r
3766/**\r
3767 Reads the current value of 64-bit Kernel Register #2 (KR2).\r
3768 This function is only available on IPF.\r
3769\r
3770 @return The current value of KR2.\r
3771\r
3772**/\r
3773UINT64\r
3774EFIAPI\r
3775AsmReadKr2 (\r
3776 VOID\r
3777 );\r
3778\r
3779\r
3780/**\r
3781 Reads the current value of 64-bit Kernel Register #3 (KR3).\r
3782 This function is only available on IPF.\r
3783\r
3784 @return The current value of KR3.\r
3785\r
3786**/\r
3787UINT64\r
3788EFIAPI\r
3789AsmReadKr3 (\r
3790 VOID\r
3791 );\r
3792\r
3793\r
3794/**\r
3795 Reads the current value of 64-bit Kernel Register #4 (KR4).\r
3796 This function is only available on IPF.\r
3797\r
3798 @return The current value of KR4.\r
3799\r
3800**/\r
3801UINT64\r
3802EFIAPI\r
3803AsmReadKr4 (\r
3804 VOID\r
3805 );\r
3806\r
3807\r
3808/**\r
3809 Reads the current value of 64-bit Kernel Register #5 (KR5).\r
3810 This function is only available on IPF.\r
3811\r
3812 @return The current value of KR5.\r
3813\r
3814**/\r
3815UINT64\r
3816EFIAPI\r
3817AsmReadKr5 (\r
3818 VOID\r
3819 );\r
3820\r
3821\r
3822/**\r
3823 Reads the current value of 64-bit Kernel Register #6 (KR6).\r
3824 This function is only available on IPF.\r
3825\r
3826 @return The current value of KR6.\r
3827\r
3828**/\r
3829UINT64\r
3830EFIAPI\r
3831AsmReadKr6 (\r
3832 VOID\r
3833 );\r
3834\r
3835\r
3836/**\r
3837 Reads the current value of 64-bit Kernel Register #7 (KR7).\r
3838 This function is only available on IPF.\r
3839\r
3840 @return The current value of KR7.\r
3841\r
3842**/\r
3843UINT64\r
3844EFIAPI\r
3845AsmReadKr7 (\r
3846 VOID\r
3847 );\r
3848\r
3849\r
3850/**\r
3851 Write the current value of 64-bit Kernel Register #0 (KR0).\r
3852 This function is only available on IPF.\r
3853\r
ee6c452c 3854 @param Value The 64-bit value to write to KR0.\r
ac644614 3855\r
3856 @return The 64-bit value written to the KR0.\r
3857\r
3858**/\r
3859UINT64\r
3860EFIAPI\r
3861AsmWriteKr0 (\r
3862 IN UINT64 Value\r
3863 );\r
3864\r
3865\r
3866/**\r
3867 Write the current value of 64-bit Kernel Register #1 (KR1).\r
3868 This function is only available on IPF.\r
3869\r
ee6c452c 3870 @param Value The 64-bit value to write to KR1.\r
ac644614 3871\r
3872 @return The 64-bit value written to the KR1.\r
3873\r
3874**/\r
3875UINT64\r
3876EFIAPI\r
3877AsmWriteKr1 (\r
3878 IN UINT64 Value\r
3879 );\r
3880\r
3881\r
3882/**\r
3883 Write the current value of 64-bit Kernel Register #2 (KR2).\r
3884 This function is only available on IPF.\r
3885\r
ee6c452c 3886 @param Value The 64-bit value to write to KR2.\r
ac644614 3887\r
3888 @return The 64-bit value written to the KR2.\r
3889\r
3890**/\r
3891UINT64\r
3892EFIAPI\r
3893AsmWriteKr2 (\r
3894 IN UINT64 Value\r
3895 );\r
3896\r
3897\r
3898/**\r
3899 Write the current value of 64-bit Kernel Register #3 (KR3).\r
3900 This function is only available on IPF.\r
3901\r
ee6c452c 3902 @param Value The 64-bit value to write to KR3.\r
ac644614 3903\r
3904 @return The 64-bit value written to the KR3.\r
3905\r
3906**/\r
3907UINT64\r
3908EFIAPI\r
3909AsmWriteKr3 (\r
3910 IN UINT64 Value\r
3911 );\r
3912\r
3913\r
3914/**\r
3915 Write the current value of 64-bit Kernel Register #4 (KR4).\r
3916 This function is only available on IPF.\r
3917\r
ee6c452c 3918 @param Value The 64-bit value to write to KR4.\r
ac644614 3919\r
3920 @return The 64-bit value written to the KR4.\r
3921\r
3922**/\r
3923UINT64\r
3924EFIAPI\r
3925AsmWriteKr4 (\r
3926 IN UINT64 Value\r
3927 );\r
3928\r
3929\r
3930/**\r
3931 Write the current value of 64-bit Kernel Register #5 (KR5).\r
3932 This function is only available on IPF.\r
3933\r
ee6c452c 3934 @param Value The 64-bit value to write to KR5.\r
ac644614 3935\r
3936 @return The 64-bit value written to the KR5.\r
3937\r
3938**/\r
3939UINT64\r
3940EFIAPI\r
3941AsmWriteKr5 (\r
3942 IN UINT64 Value\r
3943 );\r
3944\r
3945\r
3946/**\r
3947 Write the current value of 64-bit Kernel Register #6 (KR6).\r
3948 This function is only available on IPF.\r
3949\r
ee6c452c 3950 @param Value The 64-bit value to write to KR6.\r
ac644614 3951\r
3952 @return The 64-bit value written to the KR6.\r
3953\r
3954**/\r
3955UINT64\r
3956EFIAPI\r
3957AsmWriteKr6 (\r
3958 IN UINT64 Value\r
3959 );\r
3960\r
3961\r
3962/**\r
3963 Write the current value of 64-bit Kernel Register #7 (KR7).\r
3964 This function is only available on IPF.\r
3965\r
ee6c452c 3966 @param Value The 64-bit value to write to KR7.\r
ac644614 3967\r
3968 @return The 64-bit value written to the KR7.\r
3969\r
3970**/\r
3971UINT64\r
3972EFIAPI\r
3973AsmWriteKr7 (\r
3974 IN UINT64 Value\r
3975 );\r
3976\r
3977\r
3978/**\r
3979 Reads the current value of Interval Timer Counter Register (ITC).\r
3980 This function is only available on IPF.\r
3981\r
3982 @return The current value of ITC.\r
3983\r
3984**/\r
3985UINT64\r
3986EFIAPI\r
3987AsmReadItc (\r
3988 VOID\r
3989 );\r
3990\r
3991\r
3992/**\r
3993 Reads the current value of Interval Timer Vector Register (ITV).\r
3994 This function is only available on IPF.\r
3995\r
3996 @return The current value of ITV.\r
3997\r
3998**/\r
3999UINT64\r
4000EFIAPI\r
4001AsmReadItv (\r
4002 VOID\r
4003 );\r
4004\r
4005\r
4006/**\r
4007 Reads the current value of Interval Timer Match Register (ITM).\r
4008 This function is only available on IPF.\r
4009\r
4010 @return The current value of ITM.\r
4011**/\r
4012UINT64\r
4013EFIAPI\r
4014AsmReadItm (\r
4015 VOID\r
4016 );\r
4017\r
4018\r
4019/**\r
4020 Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r
4021 This function is only available on IPF.\r
4022\r
ee6c452c 4023 @param Value The 64-bit value to write to ITC.\r
ac644614 4024\r
4025 @return The 64-bit value written to the ITC.\r
4026\r
4027**/\r
4028UINT64\r
4029EFIAPI\r
4030AsmWriteItc (\r
4031 IN UINT64 Value\r
4032 );\r
4033\r
4034\r
4035/**\r
4036 Writes the current value of 64-bit Interval Timer Match Register (ITM).\r
4037 This function is only available on IPF.\r
4038\r
ee6c452c 4039 @param Value The 64-bit value to write to ITM.\r
ac644614 4040\r
4041 @return The 64-bit value written to the ITM.\r
4042\r
4043**/\r
4044UINT64\r
4045EFIAPI\r
4046AsmWriteItm (\r
4047 IN UINT64 Value\r
4048 );\r
4049\r
4050\r
4051/**\r
4052 Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r
4053 No parameter checking is performed on Value. All bits of Value corresponding to\r
4054 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r
4055 The caller must either guarantee that Value is valid, or the caller must set up\r
4056 fault handlers to catch the faults.\r
4057 This function is only available on IPF.\r
4058\r
ee6c452c 4059 @param Value The 64-bit value to write to ITV.\r
ac644614 4060\r
4061 @return The 64-bit value written to the ITV.\r
4062\r
4063**/\r
4064UINT64\r
4065EFIAPI\r
4066AsmWriteItv (\r
4067 IN UINT64 Value\r
4068 );\r
4069\r
4070\r
4071/**\r
4072 Reads the current value of Default Control Register (DCR).\r
4073 This function is only available on IPF.\r
4074\r
4075 @return The current value of DCR.\r
4076\r
4077**/\r
4078UINT64\r
4079EFIAPI\r
4080AsmReadDcr (\r
4081 VOID\r
4082 );\r
4083\r
4084\r
4085/**\r
4086 Reads the current value of Interruption Vector Address Register (IVA).\r
4087 This function is only available on IPF.\r
4088\r
4089 @return The current value of IVA.\r
4090**/\r
4091UINT64\r
4092EFIAPI\r
4093AsmReadIva (\r
4094 VOID\r
4095 );\r
4096\r
4097\r
4098/**\r
4099 Reads the current value of Page Table Address Register (PTA).\r
4100 This function is only available on IPF.\r
4101\r
4102 @return The current value of PTA.\r
4103\r
4104**/\r
4105UINT64\r
4106EFIAPI\r
4107AsmReadPta (\r
4108 VOID\r
4109 );\r
4110\r
4111\r
4112/**\r
4113 Writes the current value of 64-bit Default Control Register (DCR).\r
4114 No parameter checking is performed on Value. All bits of Value corresponding to\r
4115 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
4116 The caller must either guarantee that Value is valid, or the caller must set up\r
4117 fault handlers to catch the faults.\r
4118 This function is only available on IPF.\r
4119\r
ee6c452c 4120 @param Value The 64-bit value to write to DCR.\r
ac644614 4121\r
4122 @return The 64-bit value written to the DCR.\r
4123\r
4124**/\r
4125UINT64\r
4126EFIAPI\r
4127AsmWriteDcr (\r
4128 IN UINT64 Value\r
4129 );\r
4130\r
4131\r
4132/**\r
4133 Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r
4134 The size of vector table is 32 K bytes and is 32 K bytes aligned\r
4135 the low 15 bits of Value is ignored when written.\r
4136 This function is only available on IPF.\r
4137\r
ee6c452c 4138 @param Value The 64-bit value to write to IVA.\r
ac644614 4139\r
4140 @return The 64-bit value written to the IVA.\r
4141\r
4142**/\r
4143UINT64\r
4144EFIAPI\r
4145AsmWriteIva (\r
4146 IN UINT64 Value\r
4147 );\r
4148\r
4149\r
4150/**\r
4151 Writes the current value of 64-bit Page Table Address Register (PTA).\r
4152 No parameter checking is performed on Value. All bits of Value corresponding to\r
4153 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
4154 The caller must either guarantee that Value is valid, or the caller must set up\r
4155 fault handlers to catch the faults.\r
4156 This function is only available on IPF.\r
4157\r
ee6c452c 4158 @param Value The 64-bit value to write to PTA.\r
ac644614 4159\r
4160 @return The 64-bit value written to the PTA.\r
4161**/\r
4162UINT64\r
4163EFIAPI\r
4164AsmWritePta (\r
4165 IN UINT64 Value\r
4166 );\r
4167\r
4168\r
4169/**\r
4170 Reads the current value of Local Interrupt ID Register (LID).\r
4171 This function is only available on IPF.\r
4172\r
4173 @return The current value of LID.\r
4174\r
4175**/\r
4176UINT64\r
4177EFIAPI\r
4178AsmReadLid (\r
4179 VOID\r
4180 );\r
4181\r
4182\r
4183/**\r
4184 Reads the current value of External Interrupt Vector Register (IVR).\r
4185 This function is only available on IPF.\r
4186\r
4187 @return The current value of IVR.\r
4188\r
4189**/\r
4190UINT64\r
4191EFIAPI\r
4192AsmReadIvr (\r
4193 VOID\r
4194 );\r
4195\r
4196\r
4197/**\r
4198 Reads the current value of Task Priority Register (TPR).\r
4199 This function is only available on IPF.\r
4200\r
4201 @return The current value of TPR.\r
4202\r
4203**/\r
4204UINT64\r
4205EFIAPI\r
4206AsmReadTpr (\r
4207 VOID\r
4208 );\r
4209\r
4210\r
4211/**\r
4212 Reads the current value of External Interrupt Request Register #0 (IRR0).\r
4213 This function is only available on IPF.\r
4214\r
4215 @return The current value of IRR0.\r
4216\r
4217**/\r
4218UINT64\r
4219EFIAPI\r
4220AsmReadIrr0 (\r
4221 VOID\r
4222 );\r
4223\r
4224\r
4225/**\r
4226 Reads the current value of External Interrupt Request Register #1 (IRR1).\r
4227 This function is only available on IPF.\r
4228\r
4229 @return The current value of IRR1.\r
4230\r
4231**/\r
4232UINT64\r
4233EFIAPI\r
4234AsmReadIrr1 (\r
4235 VOID\r
4236 );\r
4237\r
4238\r
4239/**\r
4240 Reads the current value of External Interrupt Request Register #2 (IRR2).\r
4241 This function is only available on IPF.\r
4242\r
4243 @return The current value of IRR2.\r
4244\r
4245**/\r
4246UINT64\r
4247EFIAPI\r
4248AsmReadIrr2 (\r
4249 VOID\r
4250 );\r
4251\r
4252\r
4253/**\r
4254 Reads the current value of External Interrupt Request Register #3 (IRR3).\r
4255 This function is only available on IPF.\r
4256\r
4257 @return The current value of IRR3.\r
4258\r
4259**/\r
4260UINT64\r
4261EFIAPI\r
4262AsmReadIrr3 (\r
4263 VOID\r
4264 );\r
4265\r
4266\r
4267/**\r
4268 Reads the current value of Performance Monitor Vector Register (PMV).\r
4269 This function is only available on IPF.\r
4270\r
4271 @return The current value of PMV.\r
4272\r
4273**/\r
4274UINT64\r
4275EFIAPI\r
4276AsmReadPmv (\r
4277 VOID\r
4278 );\r
4279\r
4280\r
4281/**\r
4282 Reads the current value of Corrected Machine Check Vector Register (CMCV).\r
4283 This function is only available on IPF.\r
4284\r
4285 @return The current value of CMCV.\r
4286\r
4287**/\r
4288UINT64\r
4289EFIAPI\r
4290AsmReadCmcv (\r
4291 VOID\r
4292 );\r
4293\r
4294\r
4295/**\r
4296 Reads the current value of Local Redirection Register #0 (LRR0).\r
4297 This function is only available on IPF.\r
4298\r
4299 @return The current value of LRR0.\r
4300\r
4301**/\r
4302UINT64\r
4303EFIAPI\r
4304AsmReadLrr0 (\r
4305 VOID\r
4306 );\r
4307\r
4308\r
4309/**\r
4310 Reads the current value of Local Redirection Register #1 (LRR1).\r
4311 This function is only available on IPF.\r
4312\r
4313 @return The current value of LRR1.\r
4314\r
4315**/\r
4316UINT64\r
4317EFIAPI\r
4318AsmReadLrr1 (\r
4319 VOID\r
4320 );\r
4321\r
4322\r
4323/**\r
4324 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r
4325 No parameter checking is performed on Value. All bits of Value corresponding to\r
4326 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r
4327 The caller must either guarantee that Value is valid, or the caller must set up\r
4328 fault handlers to catch the faults.\r
4329 This function is only available on IPF.\r
4330\r
ee6c452c 4331 @param Value The 64-bit value to write to LID.\r
ac644614 4332\r
4333 @return The 64-bit value written to the LID.\r
4334\r
4335**/\r
4336UINT64\r
4337EFIAPI\r
4338AsmWriteLid (\r
4339 IN UINT64 Value\r
4340 );\r
4341\r
4342\r
4343/**\r
4344 Writes the current value of 64-bit Task Priority Register (TPR).\r
4345 No parameter checking is performed on Value. All bits of Value corresponding to\r
4346 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r
4347 The caller must either guarantee that Value is valid, or the caller must set up\r
4348 fault handlers to catch the faults.\r
4349 This function is only available on IPF.\r
4350\r
ee6c452c 4351 @param Value The 64-bit value to write to TPR.\r
ac644614 4352\r
4353 @return The 64-bit value written to the TPR.\r
4354\r
4355**/\r
4356UINT64\r
4357EFIAPI\r
4358AsmWriteTpr (\r
4359 IN UINT64 Value\r
4360 );\r
4361\r
4362\r
4363/**\r
4364 Performs a write operation on End OF External Interrupt Register (EOI).\r
4365 Writes a value of 0 to the EOI Register. This function is only available on IPF.\r
4366\r
4367**/\r
4368VOID\r
4369EFIAPI\r
4370AsmWriteEoi (\r
4371 VOID\r
4372 );\r
4373\r
4374\r
4375/**\r
4376 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r
4377 No parameter checking is performed on Value. All bits of Value corresponding\r
4378 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r
4379 The caller must either guarantee that Value is valid, or the caller must set up\r
4380 fault handlers to catch the faults.\r
4381 This function is only available on IPF.\r
4382\r
ee6c452c 4383 @param Value The 64-bit value to write to PMV.\r
ac644614 4384\r
4385 @return The 64-bit value written to the PMV.\r
4386\r
4387**/\r
4388UINT64\r
4389EFIAPI\r
4390AsmWritePmv (\r
4391 IN UINT64 Value\r
4392 );\r
4393\r
4394\r
4395/**\r
4396 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r
4397 No parameter checking is performed on Value. All bits of Value corresponding\r
4398 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r
4399 The caller must either guarantee that Value is valid, or the caller must set up\r
4400 fault handlers to catch the faults.\r
4401 This function is only available on IPF.\r
4402\r
ee6c452c 4403 @param Value The 64-bit value to write to CMCV.\r
ac644614 4404\r
4405 @return The 64-bit value written to the CMCV.\r
4406\r
4407**/\r
4408UINT64\r
4409EFIAPI\r
4410AsmWriteCmcv (\r
4411 IN UINT64 Value\r
4412 );\r
4413\r
4414\r
4415/**\r
4416 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r
4417 No parameter checking is performed on Value. All bits of Value corresponding\r
4418 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r
4419 The caller must either guarantee that Value is valid, or the caller must set up\r
4420 fault handlers to catch the faults.\r
4421 This function is only available on IPF.\r
4422\r
ee6c452c 4423 @param Value The 64-bit value to write to LRR0.\r
ac644614 4424\r
4425 @return The 64-bit value written to the LRR0.\r
4426\r
4427**/\r
4428UINT64\r
4429EFIAPI\r
4430AsmWriteLrr0 (\r
4431 IN UINT64 Value\r
4432 );\r
4433\r
4434\r
4435/**\r
4436 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r
4437 No parameter checking is performed on Value. All bits of Value corresponding\r
4438 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r
4439 The caller must either guarantee that Value is valid, or the caller must\r
4440 set up fault handlers to catch the faults.\r
4441 This function is only available on IPF.\r
4442\r
ee6c452c 4443 @param Value The 64-bit value to write to LRR1.\r
ac644614 4444\r
4445 @return The 64-bit value written to the LRR1.\r
4446\r
4447**/\r
4448UINT64\r
4449EFIAPI\r
4450AsmWriteLrr1 (\r
4451 IN UINT64 Value\r
4452 );\r
4453\r
4454\r
4455/**\r
4456 Reads the current value of Instruction Breakpoint Register (IBR).\r
4457 \r
4458 The Instruction Breakpoint Registers are used in pairs. The even numbered\r
4459 registers contain breakpoint addresses, and the odd numbered registers contain\r
4460 breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r
4461 on all processor models. Implemented registers are contiguous starting with\r
4462 register 0. No parameter checking is performed on Index, and if the Index value\r
4463 is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
4464 occur. The caller must either guarantee that Index is valid, or the caller must\r
4465 set up fault handlers to catch the faults.\r
4466 This function is only available on IPF.\r
4467\r
ee6c452c 4468 @param Index The 8-bit Instruction Breakpoint Register index to read.\r
ac644614 4469\r
4470 @return The current value of Instruction Breakpoint Register specified by Index.\r
4471\r
4472**/\r
4473UINT64\r
4474EFIAPI\r
4475AsmReadIbr (\r
4476 IN UINT8 Index\r
4477 );\r
4478\r
4479\r
4480/**\r
4481 Reads the current value of Data Breakpoint Register (DBR).\r
4482\r
4483 The Data Breakpoint Registers are used in pairs. The even numbered registers\r
4484 contain breakpoint addresses, and odd numbered registers contain breakpoint\r
4485 mask conditions. At least 4 data registers pairs are implemented on all processor\r
4486 models. Implemented registers are contiguous starting with register 0.\r
4487 No parameter checking is performed on Index. If the Index value is beyond\r
4488 the implemented DBR register range, a Reserved Register/Field fault may occur.\r
4489 The caller must either guarantee that Index is valid, or the caller must set up\r
4490 fault handlers to catch the faults.\r
4491 This function is only available on IPF.\r
4492\r
ee6c452c 4493 @param Index The 8-bit Data Breakpoint Register index to read.\r
ac644614 4494\r
4495 @return The current value of Data Breakpoint Register specified by Index.\r
4496\r
4497**/\r
4498UINT64\r
4499EFIAPI\r
4500AsmReadDbr (\r
4501 IN UINT8 Index\r
4502 );\r
4503\r
4504\r
4505/**\r
4506 Reads the current value of Performance Monitor Configuration Register (PMC).\r
4507\r
4508 All processor implementations provide at least 4 performance counters\r
4509 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
4510 status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
4511 additional implementation-dependent PMC and PMD to increase the number of\r
4512 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
4513 register set is implementation dependent. No parameter checking is performed\r
4514 on Index. If the Index value is beyond the implemented PMC register range,\r
4515 zero value will be returned.\r
4516 This function is only available on IPF.\r
4517\r
ee6c452c 4518 @param Index The 8-bit Performance Monitor Configuration Register index to read.\r
ac644614 4519\r
4520 @return The current value of Performance Monitor Configuration Register\r
4521 specified by Index.\r
4522\r
4523**/\r
4524UINT64\r
4525EFIAPI\r
4526AsmReadPmc (\r
4527 IN UINT8 Index\r
4528 );\r
4529\r
4530\r
4531/**\r
4532 Reads the current value of Performance Monitor Data Register (PMD).\r
4533\r
4534 All processor implementations provide at least 4 performance counters\r
4535 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r
4536 overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r
4537 provide additional implementation-dependent PMC and PMD to increase the number\r
4538 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
4539 register set is implementation dependent. No parameter checking is performed\r
4540 on Index. If the Index value is beyond the implemented PMD register range,\r
4541 zero value will be returned.\r
4542 This function is only available on IPF.\r
4543\r
ee6c452c 4544 @param Index The 8-bit Performance Monitor Data Register index to read.\r
ac644614 4545\r
4546 @return The current value of Performance Monitor Data Register specified by Index.\r
4547\r
4548**/\r
4549UINT64\r
4550EFIAPI\r
4551AsmReadPmd (\r
4552 IN UINT8 Index\r
4553 );\r
4554\r
4555\r
4556/**\r
4557 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r
4558\r
4559 Writes current value of Instruction Breakpoint Register specified by Index.\r
4560 The Instruction Breakpoint Registers are used in pairs. The even numbered\r
4561 registers contain breakpoint addresses, and odd numbered registers contain\r
4562 breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r
4563 on all processor models. Implemented registers are contiguous starting with\r
4564 register 0. No parameter checking is performed on Index. If the Index value\r
4565 is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
4566 occur. The caller must either guarantee that Index is valid, or the caller must\r
4567 set up fault handlers to catch the faults.\r
4568 This function is only available on IPF.\r
4569\r
ee6c452c 4570 @param Index The 8-bit Instruction Breakpoint Register index to write.\r
4571 @param Value The 64-bit value to write to IBR.\r
ac644614 4572\r
4573 @return The 64-bit value written to the IBR.\r
4574\r
4575**/\r
4576UINT64\r
4577EFIAPI\r
4578AsmWriteIbr (\r
4579 IN UINT8 Index,\r
4580 IN UINT64 Value\r
4581 );\r
4582\r
4583\r
4584/**\r
4585 Writes the current value of 64-bit Data Breakpoint Register (DBR).\r
4586\r
4587 Writes current value of Data Breakpoint Register specified by Index.\r
4588 The Data Breakpoint Registers are used in pairs. The even numbered registers\r
4589 contain breakpoint addresses, and odd numbered registers contain breakpoint\r
4590 mask conditions. At least 4 data registers pairs are implemented on all processor\r
4591 models. Implemented registers are contiguous starting with register 0. No parameter\r
4592 checking is performed on Index. If the Index value is beyond the implemented\r
4593 DBR register range, a Reserved Register/Field fault may occur. The caller must\r
4594 either guarantee that Index is valid, or the caller must set up fault handlers to\r
4595 catch the faults.\r
4596 This function is only available on IPF.\r
4597\r
ee6c452c 4598 @param Index The 8-bit Data Breakpoint Register index to write.\r
4599 @param Value The 64-bit value to write to DBR.\r
ac644614 4600\r
4601 @return The 64-bit value written to the DBR.\r
4602\r
4603**/\r
4604UINT64\r
4605EFIAPI\r
4606AsmWriteDbr (\r
4607 IN UINT8 Index,\r
4608 IN UINT64 Value\r
4609 );\r
4610\r
4611\r
4612/**\r
4613 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r
4614\r
4615 Writes current value of Performance Monitor Configuration Register specified by Index.\r
4616 All processor implementations provide at least 4 performance counters\r
4617 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r
4618 registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r
4619 implementation-dependent PMC and PMD to increase the number of 'generic' performance\r
4620 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r
4621 dependent. No parameter checking is performed on Index. If the Index value is\r
4622 beyond the implemented PMC register range, the write is ignored.\r
4623 This function is only available on IPF.\r
4624\r
ee6c452c 4625 @param Index The 8-bit Performance Monitor Configuration Register index to write.\r
4626 @param Value The 64-bit value to write to PMC.\r
ac644614 4627\r
4628 @return The 64-bit value written to the PMC.\r
4629\r
4630**/\r
4631UINT64\r
4632EFIAPI\r
4633AsmWritePmc (\r
4634 IN UINT8 Index,\r
4635 IN UINT64 Value\r
4636 );\r
4637\r
4638\r
4639/**\r
4640 Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r
4641\r
4642 Writes current value of Performance Monitor Data Register specified by Index.\r
4643 All processor implementations provide at least 4 performance counters\r
4644 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
4645 status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
4646 additional implementation-dependent PMC and PMD to increase the number of 'generic'\r
4647 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r
4648 is implementation dependent. No parameter checking is performed on Index. If the\r
4649 Index value is beyond the implemented PMD register range, the write is ignored.\r
4650 This function is only available on IPF.\r
4651\r
ee6c452c 4652 @param Index The 8-bit Performance Monitor Data Register index to write.\r
4653 @param Value The 64-bit value to write to PMD.\r
ac644614 4654\r
4655 @return The 64-bit value written to the PMD.\r
4656\r
4657**/\r
4658UINT64\r
4659EFIAPI\r
4660AsmWritePmd (\r
4661 IN UINT8 Index,\r
4662 IN UINT64 Value\r
4663 );\r
4664\r
4665\r
4666/**\r
4667 Reads the current value of 64-bit Global Pointer (GP).\r
4668\r
4669 Reads and returns the current value of GP.\r
4670 This function is only available on IPF.\r
4671\r
4672 @return The current value of GP.\r
4673\r
4674**/\r
4675UINT64\r
4676EFIAPI\r
4677AsmReadGp (\r
4678 VOID\r
4679 );\r
4680\r
4681\r
4682/**\r
4683 Write the current value of 64-bit Global Pointer (GP).\r
4684\r
4685 Writes the current value of GP. The 64-bit value written to the GP is returned.\r
4686 No parameter checking is performed on Value.\r
4687 This function is only available on IPF.\r
4688\r
4689 @param Value The 64-bit value to write to GP.\r
4690\r
4691 @return The 64-bit value written to the GP.\r
4692\r
4693**/\r
4694UINT64\r
4695EFIAPI\r
4696AsmWriteGp (\r
4697 IN UINT64 Value\r
4698 );\r
4699\r
4700\r
4701/**\r
4702 Reads the current value of 64-bit Stack Pointer (SP).\r
4703\r
4704 Reads and returns the current value of SP.\r
4705 This function is only available on IPF.\r
4706\r
4707 @return The current value of SP.\r
4708\r
4709**/\r
4710UINT64\r
4711EFIAPI\r
4712AsmReadSp (\r
4713 VOID\r
4714 );\r
4715\r
4716\r
aad6137d 4717///\r
4718/// Valid Index value for AsmReadControlRegister()\r
4719///\r
4720#define IPF_CONTROL_REGISTER_DCR 0\r
4721#define IPF_CONTROL_REGISTER_ITM 1\r
4722#define IPF_CONTROL_REGISTER_IVA 2\r
4723#define IPF_CONTROL_REGISTER_PTA 8\r
4724#define IPF_CONTROL_REGISTER_IPSR 16\r
4725#define IPF_CONTROL_REGISTER_ISR 17\r
4726#define IPF_CONTROL_REGISTER_IIP 19\r
4727#define IPF_CONTROL_REGISTER_IFA 20\r
4728#define IPF_CONTROL_REGISTER_ITIR 21\r
4729#define IPF_CONTROL_REGISTER_IIPA 22\r
4730#define IPF_CONTROL_REGISTER_IFS 23\r
4731#define IPF_CONTROL_REGISTER_IIM 24\r
4732#define IPF_CONTROL_REGISTER_IHA 25\r
4733#define IPF_CONTROL_REGISTER_LID 64\r
4734#define IPF_CONTROL_REGISTER_IVR 65\r
4735#define IPF_CONTROL_REGISTER_TPR 66\r
4736#define IPF_CONTROL_REGISTER_EOI 67\r
4737#define IPF_CONTROL_REGISTER_IRR0 68\r
4738#define IPF_CONTROL_REGISTER_IRR1 69\r
4739#define IPF_CONTROL_REGISTER_IRR2 70\r
4740#define IPF_CONTROL_REGISTER_IRR3 71\r
4741#define IPF_CONTROL_REGISTER_ITV 72\r
4742#define IPF_CONTROL_REGISTER_PMV 73\r
4743#define IPF_CONTROL_REGISTER_CMCV 74\r
4744#define IPF_CONTROL_REGISTER_LRR0 80\r
4745#define IPF_CONTROL_REGISTER_LRR1 81\r
4746\r
4747/**\r
4748 Reads a 64-bit control register.\r
4749\r
4750 Reads and returns the control register specified by Index. The valid Index valued are defined\r
4751 above in "Related Definitions".\r
4752 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.\r
4753\r
4754 @param Index The index of the control register to read.\r
4755\r
4756 @return The control register specified by Index.\r
4757\r
4758**/\r
4759UINT64\r
4760EFIAPI\r
4761AsmReadControlRegister (\r
4762 IN UINT64 Index\r
4763 );\r
4764\r
4765\r
4766///\r
4767/// Valid Index value for AsmReadApplicationRegister()\r
4768///\r
4769#define IPF_APPLICATION_REGISTER_K0 0\r
4770#define IPF_APPLICATION_REGISTER_K1 1\r
4771#define IPF_APPLICATION_REGISTER_K2 2\r
4772#define IPF_APPLICATION_REGISTER_K3 3\r
4773#define IPF_APPLICATION_REGISTER_K4 4\r
4774#define IPF_APPLICATION_REGISTER_K5 5\r
4775#define IPF_APPLICATION_REGISTER_K6 6\r
4776#define IPF_APPLICATION_REGISTER_K7 7\r
4777#define IPF_APPLICATION_REGISTER_RSC 16\r
4778#define IPF_APPLICATION_REGISTER_BSP 17\r
4779#define IPF_APPLICATION_REGISTER_BSPSTORE 18\r
4780#define IPF_APPLICATION_REGISTER_RNAT 19\r
4781#define IPF_APPLICATION_REGISTER_FCR 21\r
4782#define IPF_APPLICATION_REGISTER_EFLAG 24\r
4783#define IPF_APPLICATION_REGISTER_CSD 25\r
4784#define IPF_APPLICATION_REGISTER_SSD 26\r
4785#define IPF_APPLICATION_REGISTER_CFLG 27\r
4786#define IPF_APPLICATION_REGISTER_FSR 28\r
4787#define IPF_APPLICATION_REGISTER_FIR 29\r
4788#define IPF_APPLICATION_REGISTER_FDR 30\r
4789#define IPF_APPLICATION_REGISTER_CCV 32\r
4790#define IPF_APPLICATION_REGISTER_UNAT 36\r
4791#define IPF_APPLICATION_REGISTER_FPSR 40\r
4792#define IPF_APPLICATION_REGISTER_ITC 44\r
4793#define IPF_APPLICATION_REGISTER_PFS 64\r
4794#define IPF_APPLICATION_REGISTER_LC 65\r
4795#define IPF_APPLICATION_REGISTER_EC 66\r
4796\r
4797/**\r
4798 Reads a 64-bit application register.\r
4799\r
4800 Reads and returns the application register specified by Index. The valid Index valued are defined\r
4801 above in "Related Definitions".\r
4802 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.\r
4803\r
4804 @param Index The index of the application register to read.\r
4805\r
4806 @return The application register specified by Index.\r
4807\r
4808**/\r
4809UINT64\r
4810EFIAPI\r
4811AsmReadApplicationRegister (\r
4812 IN UINT64 Index\r
4813 );\r
4814\r
4815\r
ac644614 4816/**\r
4817 Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r
4818\r
4819 Determines the current execution mode of the CPU.\r
4820 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r
4821 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r
4822 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r
4823 and -1 is returned.\r
4824 This function is only available on IPF.\r
4825\r
17f695ed 4826 @retval 1 The CPU is in virtual mode.\r
4827 @retval 0 The CPU is in physical mode.\r
4828 @retval -1 The CPU is in mixed mode.\r
ac644614 4829\r
4830**/\r
4831INT64\r
4832EFIAPI\r
4833AsmCpuVirtual (\r
4834 VOID\r
4835 );\r
4836\r
4837\r
4838/**\r
4839 Makes a PAL procedure call.\r
4840\r
4841 This is a wrapper function to make a PAL procedure call. Based on the Index\r
4842 value this API will make static or stacked PAL call. The following table\r
4843 describes the usage of PAL Procedure Index Assignment. Architected procedures\r
4844 may be designated as required or optional. If a PAL procedure is specified\r
4845 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r
4846 Status field of the PAL_CALL_RETURN structure.\r
4847 This indicates that the procedure is not present in this PAL implementation.\r
4848 It is the caller's responsibility to check for this return code after calling\r
4849 any optional PAL procedure.\r
4850 No parameter checking is performed on the 5 input parameters, but there are\r
4851 some common rules that the caller should follow when making a PAL call. Any\r
4852 address passed to PAL as buffers for return parameters must be 8-byte aligned.\r
4853 Unaligned addresses may cause undefined results. For those parameters defined\r
4854 as reserved or some fields defined as reserved must be zero filled or the invalid\r
4855 argument return value may be returned or undefined result may occur during the\r
4856 execution of the procedure. If the PalEntryPoint does not point to a valid\r
4857 PAL entry point then the system behavior is undefined. This function is only\r
4858 available on IPF.\r
4859\r
ee6c452c 4860 @param PalEntryPoint The PAL procedure calls entry point.\r
4861 @param Index The PAL procedure Index number.\r
4862 @param Arg2 The 2nd parameter for PAL procedure calls.\r
4863 @param Arg3 The 3rd parameter for PAL procedure calls.\r
4864 @param Arg4 The 4th parameter for PAL procedure calls.\r
ac644614 4865\r
4866 @return structure returned from the PAL Call procedure, including the status and return value.\r
4867\r
4868**/\r
4869PAL_CALL_RETURN\r
4870EFIAPI\r
4871AsmPalCall (\r
4872 IN UINT64 PalEntryPoint,\r
4873 IN UINT64 Index,\r
4874 IN UINT64 Arg2,\r
4875 IN UINT64 Arg3,\r
4876 IN UINT64 Arg4\r
4877 );\r
4878\r
4879\r
ac644614 4880#elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
1106ffe1 4881///\r
030cd1a2 4882/// IA32 and x64 Specific Functions\r
1106ffe1 4883/// Byte packed structure for 16-bit Real Mode EFLAGS\r
4884///\r
ac644614 4885typedef union {\r
4886 struct {\r
1106ffe1 4887 UINT32 CF:1; /// Carry Flag\r
4888 UINT32 Reserved_0:1; /// Reserved\r
4889 UINT32 PF:1; /// Parity Flag\r
4890 UINT32 Reserved_1:1; /// Reserved\r
4891 UINT32 AF:1; /// Auxiliary Carry Flag\r
4892 UINT32 Reserved_2:1; /// Reserved\r
4893 UINT32 ZF:1; /// Zero Flag\r
4894 UINT32 SF:1; /// Sign Flag\r
4895 UINT32 TF:1; /// Trap Flag\r
4896 UINT32 IF:1; /// Interrupt Enable Flag\r
4897 UINT32 DF:1; /// Direction Flag\r
4898 UINT32 OF:1; /// Overflow Flag\r
4899 UINT32 IOPL:2; /// I/O Privilege Level\r
4900 UINT32 NT:1; /// Nested Task\r
4901 UINT32 Reserved_3:1; /// Reserved\r
ac644614 4902 } Bits;\r
4903 UINT16 Uint16;\r
4904} IA32_FLAGS16;\r
4905\r
1106ffe1 4906///\r
4907/// Byte packed structure for EFLAGS/RFLAGS\r
4908/// 32-bits on IA-32\r
030cd1a2 4909/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
1106ffe1 4910///\r
ac644614 4911typedef union {\r
4912 struct {\r
1106ffe1 4913 UINT32 CF:1; /// Carry Flag\r
4914 UINT32 Reserved_0:1; /// Reserved\r
4915 UINT32 PF:1; /// Parity Flag\r
4916 UINT32 Reserved_1:1; /// Reserved\r
4917 UINT32 AF:1; /// Auxiliary Carry Flag\r
4918 UINT32 Reserved_2:1; /// Reserved\r
4919 UINT32 ZF:1; /// Zero Flag\r
4920 UINT32 SF:1; /// Sign Flag\r
4921 UINT32 TF:1; /// Trap Flag\r
4922 UINT32 IF:1; /// Interrupt Enable Flag\r
4923 UINT32 DF:1; /// Direction Flag\r
4924 UINT32 OF:1; /// Overflow Flag\r
4925 UINT32 IOPL:2; /// I/O Privilege Level\r
4926 UINT32 NT:1; /// Nested Task\r
4927 UINT32 Reserved_3:1; /// Reserved\r
4928 UINT32 RF:1; /// Resume Flag\r
4929 UINT32 VM:1; /// Virtual 8086 Mode\r
4930 UINT32 AC:1; /// Alignment Check\r
4931 UINT32 VIF:1; /// Virtual Interrupt Flag\r
4932 UINT32 VIP:1; /// Virtual Interrupt Pending\r
4933 UINT32 ID:1; /// ID Flag\r
4934 UINT32 Reserved_4:10; /// Reserved\r
ac644614 4935 } Bits;\r
4936 UINTN UintN;\r
4937} IA32_EFLAGS32;\r
4938\r
1106ffe1 4939///\r
4940/// Byte packed structure for Control Register 0 (CR0)\r
4941/// 32-bits on IA-32\r
030cd1a2 4942/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
1106ffe1 4943///\r
ac644614 4944typedef union {\r
4945 struct {\r
1106ffe1 4946 UINT32 PE:1; /// Protection Enable\r
4947 UINT32 MP:1; /// Monitor Coprocessor\r
4948 UINT32 EM:1; /// Emulation\r
4949 UINT32 TS:1; /// Task Switched\r
4950 UINT32 ET:1; /// Extension Type\r
4951 UINT32 NE:1; /// Numeric Error\r
4952 UINT32 Reserved_0:10; /// Reserved\r
4953 UINT32 WP:1; /// Write Protect\r
4954 UINT32 Reserved_1:1; /// Reserved\r
4955 UINT32 AM:1; /// Alignment Mask\r
4956 UINT32 Reserved_2:10; /// Reserved\r
4957 UINT32 NW:1; /// Mot Write-through\r
4958 UINT32 CD:1; /// Cache Disable\r
4959 UINT32 PG:1; /// Paging\r
ac644614 4960 } Bits;\r
4961 UINTN UintN;\r
4962} IA32_CR0;\r
4963\r
1106ffe1 4964///\r
4965/// Byte packed structure for Control Register 4 (CR4)\r
4966/// 32-bits on IA-32\r
030cd1a2 4967/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
1106ffe1 4968///\r
ac644614 4969typedef union {\r
4970 struct {\r
1106ffe1 4971 UINT32 VME:1; /// Virtual-8086 Mode Extensions\r
4972 UINT32 PVI:1; /// Protected-Mode Virtual Interrupts\r
4973 UINT32 TSD:1; /// Time Stamp Disable\r
4974 UINT32 DE:1; /// Debugging Extensions\r
4975 UINT32 PSE:1; /// Page Size Extensions\r
4976 UINT32 PAE:1; /// Physical Address Extension\r
4977 UINT32 MCE:1; /// Machine Check Enable\r
4978 UINT32 PGE:1; /// Page Global Enable\r
4979 UINT32 PCE:1; /// Performance Monitoring Counter\r
4980 /// Enable\r
4981 UINT32 OSFXSR:1; /// Operating System Support for\r
4982 /// FXSAVE and FXRSTOR instructions\r
4983 UINT32 OSXMMEXCPT:1; /// Operating System Support for\r
4984 /// Unmasked SIMD Floating Point\r
4985 /// Exceptions\r
4986 UINT32 Reserved_0:2; /// Reserved\r
4987 UINT32 VMXE:1; /// VMX Enable\r
4988 UINT32 Reserved_1:18; /// Reseved\r
ac644614 4989 } Bits;\r
4990 UINTN UintN;\r
4991} IA32_CR4;\r
4992\r
1106ffe1 4993///\r
4994/// Byte packed structure for an IDTR, GDTR, LDTR descriptor\r
1106ffe1 4995///\r
ac644614 4996#pragma pack (1)\r
4997typedef struct {\r
4998 UINT16 Limit;\r
4999 UINTN Base;\r
5000} IA32_DESCRIPTOR;\r
5001#pragma pack ()\r
5002\r
5003#define IA32_IDT_GATE_TYPE_TASK 0x85\r
5004#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r
5005#define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r
5006#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r
5007#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r
5008\r
1106ffe1 5009///\r
5010/// Byte packed structure for an Interrupt Gate Descriptor\r
5011///\r
dc317713 5012#if defined (MDE_CPU_IA32)\r
5013\r
5014typedef union {\r
5015 struct {\r
5016 UINT32 OffsetLow:16; // Offset bits 15..0\r
5017 UINT32 Selector:16; // Selector\r
5018 UINT32 Reserved_0:8; // Reserved\r
5019 UINT32 GateType:8; // Gate Type. See #defines above\r
5020 UINT32 OffsetHigh:16; // Offset bits 31..16\r
5021 } Bits;\r
5022 UINT64 Uint64;\r
5023} IA32_IDT_GATE_DESCRIPTOR;\r
5024\r
5025#endif\r
5026\r
5027#if defined (MDE_CPU_X64)\r
5028\r
ac644614 5029typedef union {\r
5030 struct {\r
dc317713 5031 UINT32 OffsetLow:16; // Offset bits 15..0\r
5032 UINT32 Selector:16; // Selector\r
5033 UINT32 Reserved_0:8; // Reserved\r
5034 UINT32 GateType:8; // Gate Type. See #defines above\r
5035 UINT32 OffsetHigh:16; // Offset bits 31..16\r
5036 UINT32 OffsetUpper:32; // Offset bits 63..32\r
5037 UINT32 Reserved_1:32; // Reserved\r
ac644614 5038 } Bits;\r
5039 UINT64 Uint64;\r
dc317713 5040 UINT64 Uint64_1;\r
ac644614 5041} IA32_IDT_GATE_DESCRIPTOR;\r
5042\r
dc317713 5043#endif\r
5044\r
1106ffe1 5045///\r
5046/// Byte packed structure for an FP/SSE/SSE2 context\r
5047///\r
ac644614 5048typedef struct {\r
5049 UINT8 Buffer[512];\r
5050} IA32_FX_BUFFER;\r
5051\r
1106ffe1 5052///\r
5053/// Structures for the 16-bit real mode thunks\r
5054///\r
ac644614 5055typedef struct {\r
5056 UINT32 Reserved1;\r
5057 UINT32 Reserved2;\r
5058 UINT32 Reserved3;\r
5059 UINT32 Reserved4;\r
5060 UINT8 BL;\r
5061 UINT8 BH;\r
5062 UINT16 Reserved5;\r
5063 UINT8 DL;\r
5064 UINT8 DH;\r
5065 UINT16 Reserved6;\r
5066 UINT8 CL;\r
5067 UINT8 CH;\r
5068 UINT16 Reserved7;\r
5069 UINT8 AL;\r
5070 UINT8 AH;\r
5071 UINT16 Reserved8;\r
5072} IA32_BYTE_REGS;\r
5073\r
5074typedef struct {\r
5075 UINT16 DI;\r
5076 UINT16 Reserved1;\r
5077 UINT16 SI;\r
5078 UINT16 Reserved2;\r
5079 UINT16 BP;\r
5080 UINT16 Reserved3;\r
5081 UINT16 SP;\r
5082 UINT16 Reserved4;\r
5083 UINT16 BX;\r
5084 UINT16 Reserved5;\r
5085 UINT16 DX;\r
5086 UINT16 Reserved6;\r
5087 UINT16 CX;\r
5088 UINT16 Reserved7;\r
5089 UINT16 AX;\r
5090 UINT16 Reserved8;\r
5091} IA32_WORD_REGS;\r
5092\r
5093typedef struct {\r
5094 UINT32 EDI;\r
5095 UINT32 ESI;\r
5096 UINT32 EBP;\r
5097 UINT32 ESP;\r
5098 UINT32 EBX;\r
5099 UINT32 EDX;\r
5100 UINT32 ECX;\r
5101 UINT32 EAX;\r
5102 UINT16 DS;\r
5103 UINT16 ES;\r
5104 UINT16 FS;\r
5105 UINT16 GS;\r
5106 IA32_EFLAGS32 EFLAGS;\r
5107 UINT32 Eip;\r
5108 UINT16 CS;\r
5109 UINT16 SS;\r
5110} IA32_DWORD_REGS;\r
5111\r
5112typedef union {\r
5113 IA32_DWORD_REGS E;\r
5114 IA32_WORD_REGS X;\r
5115 IA32_BYTE_REGS H;\r
5116} IA32_REGISTER_SET;\r
5117\r
1106ffe1 5118///\r
5119/// Byte packed structure for an 16-bit real mode thunks\r
5120///\r
ac644614 5121typedef struct {\r
5122 IA32_REGISTER_SET *RealModeState;\r
5123 VOID *RealModeBuffer;\r
5124 UINT32 RealModeBufferSize;\r
5125 UINT32 ThunkAttributes;\r
5126} THUNK_CONTEXT;\r
5127\r
5128#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r
5129#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r
5130#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
5131\r
5132/**\r
5133 Retrieves CPUID information.\r
5134\r
5135 Executes the CPUID instruction with EAX set to the value specified by Index.\r
5136 This function always returns Index.\r
5137 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
5138 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
5139 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
5140 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
030cd1a2 5141 This function is only available on IA-32 and x64.\r
ac644614 5142\r
5143 @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r
5144 instruction.\r
5145 @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
5146 instruction. This is an optional parameter that may be NULL.\r
5147 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
5148 instruction. This is an optional parameter that may be NULL.\r
5149 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
5150 instruction. This is an optional parameter that may be NULL.\r
5151 @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
5152 instruction. This is an optional parameter that may be NULL.\r
5153\r
5154 @return Index\r
5155\r
5156**/\r
5157UINT32\r
5158EFIAPI\r
5159AsmCpuid (\r
5160 IN UINT32 Index,\r
5161 OUT UINT32 *Eax, OPTIONAL\r
5162 OUT UINT32 *Ebx, OPTIONAL\r
5163 OUT UINT32 *Ecx, OPTIONAL\r
5164 OUT UINT32 *Edx OPTIONAL\r
5165 );\r
5166\r
5167\r
5168/**\r
5169 Retrieves CPUID information using an extended leaf identifier.\r
5170\r
5171 Executes the CPUID instruction with EAX set to the value specified by Index\r
5172 and ECX set to the value specified by SubIndex. This function always returns\r
5173 Index. This function is only available on IA-32 and x64.\r
5174\r
5175 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
5176 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
5177 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
5178 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
5179\r
5180 @param Index The 32-bit value to load into EAX prior to invoking the\r
5181 CPUID instruction.\r
5182 @param SubIndex The 32-bit value to load into ECX prior to invoking the\r
5183 CPUID instruction.\r
5184 @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
5185 instruction. This is an optional parameter that may be\r
5186 NULL.\r
5187 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
5188 instruction. This is an optional parameter that may be\r
5189 NULL.\r
5190 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
5191 instruction. This is an optional parameter that may be\r
5192 NULL.\r
5193 @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
5194 instruction. This is an optional parameter that may be\r
5195 NULL.\r
5196\r
5197 @return Index\r
5198\r
5199**/\r
5200UINT32\r
5201EFIAPI\r
5202AsmCpuidEx (\r
5203 IN UINT32 Index,\r
5204 IN UINT32 SubIndex,\r
5205 OUT UINT32 *Eax, OPTIONAL\r
5206 OUT UINT32 *Ebx, OPTIONAL\r
5207 OUT UINT32 *Ecx, OPTIONAL\r
5208 OUT UINT32 *Edx OPTIONAL\r
5209 );\r
5210\r
5211\r
be5f1614 5212/**\r
5213 Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
5214\r
5215 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
5216 and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r
5217\r
5218**/\r
5219VOID\r
5220EFIAPI\r
5221AsmDisableCache (\r
5222 VOID\r
5223 );\r
5224\r
5225\r
5226/**\r
5227 Perform a WBINVD and clear both the CD and NW bits of CR0.\r
5228\r
5229 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r
5230 bits of CR0 to 0. This function is only available on IA-32 and x64.\r
5231\r
5232**/\r
5233VOID\r
5234EFIAPI\r
5235AsmEnableCache (\r
5236 VOID\r
5237 );\r
5238\r
5239\r
ac644614 5240/**\r
5241 Returns the lower 32-bits of a Machine Specific Register(MSR).\r
5242\r
5243 Reads and returns the lower 32-bits of the MSR specified by Index.\r
5244 No parameter checking is performed on Index, and some Index values may cause\r
5245 CPU exceptions. The caller must either guarantee that Index is valid, or the\r
5246 caller must set up exception handlers to catch the exceptions. This function\r
030cd1a2 5247 is only available on IA-32 and x64.\r
ac644614 5248\r
5249 @param Index The 32-bit MSR index to read.\r
5250\r
5251 @return The lower 32 bits of the MSR identified by Index.\r
5252\r
5253**/\r
5254UINT32\r
5255EFIAPI\r
5256AsmReadMsr32 (\r
5257 IN UINT32 Index\r
5258 );\r
5259\r
5260\r
5261/**\r
17f695ed 5262 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r
5263 The upper 32-bits of the MSR are set to zero.\r
ac644614 5264\r
5265 Writes the 32-bit value specified by Value to the MSR specified by Index. The\r
5266 upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r
5267 the MSR is returned. No parameter checking is performed on Index or Value,\r
5268 and some of these may cause CPU exceptions. The caller must either guarantee\r
5269 that Index and Value are valid, or the caller must establish proper exception\r
030cd1a2 5270 handlers. This function is only available on IA-32 and x64.\r
ac644614 5271\r
5272 @param Index The 32-bit MSR index to write.\r
5273 @param Value The 32-bit value to write to the MSR.\r
5274\r
5275 @return Value\r
5276\r
5277**/\r
5278UINT32\r
5279EFIAPI\r
5280AsmWriteMsr32 (\r
5281 IN UINT32 Index,\r
5282 IN UINT32 Value\r
5283 );\r
5284\r
5285\r
5286/**\r
5287 Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r
5288 writes the result back to the 64-bit MSR.\r
5289\r
5290 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
5291 between the lower 32-bits of the read result and the value specified by\r
5292 OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
5293 32-bits of the value written to the MSR is returned. No parameter checking is\r
5294 performed on Index or OrData, and some of these may cause CPU exceptions. The\r
5295 caller must either guarantee that Index and OrData are valid, or the caller\r
5296 must establish proper exception handlers. This function is only available on\r
030cd1a2 5297 IA-32 and x64.\r
ac644614 5298\r
5299 @param Index The 32-bit MSR index to write.\r
5300 @param OrData The value to OR with the read value from the MSR.\r
5301\r
5302 @return The lower 32-bit value written to the MSR.\r
5303\r
5304**/\r
5305UINT32\r
5306EFIAPI\r
5307AsmMsrOr32 (\r
5308 IN UINT32 Index,\r
5309 IN UINT32 OrData\r
5310 );\r
5311\r
5312\r
5313/**\r
5314 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
5315 the result back to the 64-bit MSR.\r
5316\r
5317 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5318 lower 32-bits of the read result and the value specified by AndData, and\r
5319 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r
5320 the value written to the MSR is returned. No parameter checking is performed\r
5321 on Index or AndData, and some of these may cause CPU exceptions. The caller\r
5322 must either guarantee that Index and AndData are valid, or the caller must\r
5323 establish proper exception handlers. This function is only available on IA-32\r
030cd1a2 5324 and x64.\r
ac644614 5325\r
5326 @param Index The 32-bit MSR index to write.\r
5327 @param AndData The value to AND with the read value from the MSR.\r
5328\r
5329 @return The lower 32-bit value written to the MSR.\r
5330\r
5331**/\r
5332UINT32\r
5333EFIAPI\r
5334AsmMsrAnd32 (\r
5335 IN UINT32 Index,\r
5336 IN UINT32 AndData\r
5337 );\r
5338\r
5339\r
5340/**\r
5341 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r
5342 on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
5343\r
5344 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5345 lower 32-bits of the read result and the value specified by AndData\r
5346 preserving the upper 32-bits, performs a bitwise inclusive OR between the\r
5347 result of the AND operation and the value specified by OrData, and writes the\r
5348 result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
5349 written to the MSR is returned. No parameter checking is performed on Index,\r
5350 AndData, or OrData, and some of these may cause CPU exceptions. The caller\r
5351 must either guarantee that Index, AndData, and OrData are valid, or the\r
5352 caller must establish proper exception handlers. This function is only\r
030cd1a2 5353 available on IA-32 and x64.\r
ac644614 5354\r
5355 @param Index The 32-bit MSR index to write.\r
5356 @param AndData The value to AND with the read value from the MSR.\r
5357 @param OrData The value to OR with the result of the AND operation.\r
5358\r
5359 @return The lower 32-bit value written to the MSR.\r
5360\r
5361**/\r
5362UINT32\r
5363EFIAPI\r
5364AsmMsrAndThenOr32 (\r
5365 IN UINT32 Index,\r
5366 IN UINT32 AndData,\r
5367 IN UINT32 OrData\r
5368 );\r
5369\r
5370\r
5371/**\r
5372 Reads a bit field of an MSR.\r
5373\r
5374 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r
5375 specified by the StartBit and the EndBit. The value of the bit field is\r
5376 returned. The caller must either guarantee that Index is valid, or the caller\r
5377 must set up exception handlers to catch the exceptions. This function is only\r
030cd1a2 5378 available on IA-32 and x64.\r
ac644614 5379\r
5380 If StartBit is greater than 31, then ASSERT().\r
5381 If EndBit is greater than 31, then ASSERT().\r
5382 If EndBit is less than StartBit, then ASSERT().\r
5383\r
5384 @param Index The 32-bit MSR index to read.\r
5385 @param StartBit The ordinal of the least significant bit in the bit field.\r
5386 Range 0..31.\r
5387 @param EndBit The ordinal of the most significant bit in the bit field.\r
5388 Range 0..31.\r
5389\r
5390 @return The bit field read from the MSR.\r
5391\r
5392**/\r
5393UINT32\r
5394EFIAPI\r
5395AsmMsrBitFieldRead32 (\r
5396 IN UINT32 Index,\r
5397 IN UINTN StartBit,\r
5398 IN UINTN EndBit\r
5399 );\r
5400\r
5401\r
5402/**\r
5403 Writes a bit field to an MSR.\r
5404\r
5405 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
5406 field is specified by the StartBit and the EndBit. All other bits in the\r
5407 destination MSR are preserved. The lower 32-bits of the MSR written is\r
5408 returned. Extra left bits in Value are stripped. The caller must either\r
5409 guarantee that Index and the data written is valid, or the caller must set up\r
5410 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5411 on IA-32 and x64.\r
ac644614 5412\r
5413 If StartBit is greater than 31, then ASSERT().\r
5414 If EndBit is greater than 31, then ASSERT().\r
5415 If EndBit is less than StartBit, then ASSERT().\r
5416\r
5417 @param Index The 32-bit MSR index to write.\r
5418 @param StartBit The ordinal of the least significant bit in the bit field.\r
5419 Range 0..31.\r
5420 @param EndBit The ordinal of the most significant bit in the bit field.\r
5421 Range 0..31.\r
5422 @param Value New value of the bit field.\r
5423\r
5424 @return The lower 32-bit of the value written to the MSR.\r
5425\r
5426**/\r
5427UINT32\r
5428EFIAPI\r
5429AsmMsrBitFieldWrite32 (\r
5430 IN UINT32 Index,\r
5431 IN UINTN StartBit,\r
5432 IN UINTN EndBit,\r
5433 IN UINT32 Value\r
5434 );\r
5435\r
5436\r
5437/**\r
5438 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
5439 result back to the bit field in the 64-bit MSR.\r
5440\r
5441 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
5442 between the read result and the value specified by OrData, and writes the\r
5443 result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
5444 written to the MSR are returned. Extra left bits in OrData are stripped. The\r
5445 caller must either guarantee that Index and the data written is valid, or\r
5446 the caller must set up exception handlers to catch the exceptions. This\r
030cd1a2 5447 function is only available on IA-32 and x64.\r
ac644614 5448\r
5449 If StartBit is greater than 31, then ASSERT().\r
5450 If EndBit is greater than 31, then ASSERT().\r
5451 If EndBit is less than StartBit, then ASSERT().\r
5452\r
5453 @param Index The 32-bit MSR index to write.\r
5454 @param StartBit The ordinal of the least significant bit in the bit field.\r
5455 Range 0..31.\r
5456 @param EndBit The ordinal of the most significant bit in the bit field.\r
5457 Range 0..31.\r
5458 @param OrData The value to OR with the read value from the MSR.\r
5459\r
5460 @return The lower 32-bit of the value written to the MSR.\r
5461\r
5462**/\r
5463UINT32\r
5464EFIAPI\r
5465AsmMsrBitFieldOr32 (\r
5466 IN UINT32 Index,\r
5467 IN UINTN StartBit,\r
5468 IN UINTN EndBit,\r
5469 IN UINT32 OrData\r
5470 );\r
5471\r
5472\r
5473/**\r
5474 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
5475 result back to the bit field in the 64-bit MSR.\r
5476\r
5477 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5478 read result and the value specified by AndData, and writes the result to the\r
5479 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r
5480 MSR are returned. Extra left bits in AndData are stripped. The caller must\r
5481 either guarantee that Index and the data written is valid, or the caller must\r
5482 set up exception handlers to catch the exceptions. This function is only\r
030cd1a2 5483 available on IA-32 and x64.\r
ac644614 5484\r
5485 If StartBit is greater than 31, then ASSERT().\r
5486 If EndBit is greater than 31, then ASSERT().\r
5487 If EndBit is less than StartBit, then ASSERT().\r
5488\r
5489 @param Index The 32-bit MSR index to write.\r
5490 @param StartBit The ordinal of the least significant bit in the bit field.\r
5491 Range 0..31.\r
5492 @param EndBit The ordinal of the most significant bit in the bit field.\r
5493 Range 0..31.\r
5494 @param AndData The value to AND with the read value from the MSR.\r
5495\r
5496 @return The lower 32-bit of the value written to the MSR.\r
5497\r
5498**/\r
5499UINT32\r
5500EFIAPI\r
5501AsmMsrBitFieldAnd32 (\r
5502 IN UINT32 Index,\r
5503 IN UINTN StartBit,\r
5504 IN UINTN EndBit,\r
5505 IN UINT32 AndData\r
5506 );\r
5507\r
5508\r
5509/**\r
5510 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
5511 bitwise inclusive OR, and writes the result back to the bit field in the\r
5512 64-bit MSR.\r
5513\r
5514 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
5515 bitwise inclusive OR between the read result and the value specified by\r
5516 AndData, and writes the result to the 64-bit MSR specified by Index. The\r
5517 lower 32-bits of the value written to the MSR are returned. Extra left bits\r
5518 in both AndData and OrData are stripped. The caller must either guarantee\r
5519 that Index and the data written is valid, or the caller must set up exception\r
5520 handlers to catch the exceptions. This function is only available on IA-32\r
030cd1a2 5521 and x64.\r
ac644614 5522\r
5523 If StartBit is greater than 31, then ASSERT().\r
5524 If EndBit is greater than 31, then ASSERT().\r
5525 If EndBit is less than StartBit, then ASSERT().\r
5526\r
5527 @param Index The 32-bit MSR index to write.\r
5528 @param StartBit The ordinal of the least significant bit in the bit field.\r
5529 Range 0..31.\r
5530 @param EndBit The ordinal of the most significant bit in the bit field.\r
5531 Range 0..31.\r
5532 @param AndData The value to AND with the read value from the MSR.\r
5533 @param OrData The value to OR with the result of the AND operation.\r
5534\r
5535 @return The lower 32-bit of the value written to the MSR.\r
5536\r
5537**/\r
5538UINT32\r
5539EFIAPI\r
5540AsmMsrBitFieldAndThenOr32 (\r
5541 IN UINT32 Index,\r
5542 IN UINTN StartBit,\r
5543 IN UINTN EndBit,\r
5544 IN UINT32 AndData,\r
5545 IN UINT32 OrData\r
5546 );\r
5547\r
5548\r
5549/**\r
5550 Returns a 64-bit Machine Specific Register(MSR).\r
5551\r
5552 Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
5553 performed on Index, and some Index values may cause CPU exceptions. The\r
5554 caller must either guarantee that Index is valid, or the caller must set up\r
5555 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5556 on IA-32 and x64.\r
ac644614 5557\r
5558 @param Index The 32-bit MSR index to read.\r
5559\r
5560 @return The value of the MSR identified by Index.\r
5561\r
5562**/\r
5563UINT64\r
5564EFIAPI\r
5565AsmReadMsr64 (\r
5566 IN UINT32 Index\r
5567 );\r
5568\r
5569\r
5570/**\r
5571 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
5572 value.\r
5573\r
5574 Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
5575 64-bit value written to the MSR is returned. No parameter checking is\r
5576 performed on Index or Value, and some of these may cause CPU exceptions. The\r
5577 caller must either guarantee that Index and Value are valid, or the caller\r
5578 must establish proper exception handlers. This function is only available on\r
030cd1a2 5579 IA-32 and x64.\r
ac644614 5580\r
5581 @param Index The 32-bit MSR index to write.\r
5582 @param Value The 64-bit value to write to the MSR.\r
5583\r
5584 @return Value\r
5585\r
5586**/\r
5587UINT64\r
5588EFIAPI\r
5589AsmWriteMsr64 (\r
5590 IN UINT32 Index,\r
5591 IN UINT64 Value\r
5592 );\r
5593\r
5594\r
5595/**\r
5596 Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r
5597 back to the 64-bit MSR.\r
5598\r
5599 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
5600 between the read result and the value specified by OrData, and writes the\r
5601 result to the 64-bit MSR specified by Index. The value written to the MSR is\r
5602 returned. No parameter checking is performed on Index or OrData, and some of\r
5603 these may cause CPU exceptions. The caller must either guarantee that Index\r
5604 and OrData are valid, or the caller must establish proper exception handlers.\r
030cd1a2 5605 This function is only available on IA-32 and x64.\r
ac644614 5606\r
5607 @param Index The 32-bit MSR index to write.\r
5608 @param OrData The value to OR with the read value from the MSR.\r
5609\r
5610 @return The value written back to the MSR.\r
5611\r
5612**/\r
5613UINT64\r
5614EFIAPI\r
5615AsmMsrOr64 (\r
5616 IN UINT32 Index,\r
5617 IN UINT64 OrData\r
5618 );\r
5619\r
5620\r
5621/**\r
5622 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
5623 64-bit MSR.\r
5624\r
5625 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5626 read result and the value specified by OrData, and writes the result to the\r
5627 64-bit MSR specified by Index. The value written to the MSR is returned. No\r
5628 parameter checking is performed on Index or OrData, and some of these may\r
5629 cause CPU exceptions. The caller must either guarantee that Index and OrData\r
5630 are valid, or the caller must establish proper exception handlers. This\r
030cd1a2 5631 function is only available on IA-32 and x64.\r
ac644614 5632\r
5633 @param Index The 32-bit MSR index to write.\r
5634 @param AndData The value to AND with the read value from the MSR.\r
5635\r
5636 @return The value written back to the MSR.\r
5637\r
5638**/\r
5639UINT64\r
5640EFIAPI\r
5641AsmMsrAnd64 (\r
5642 IN UINT32 Index,\r
5643 IN UINT64 AndData\r
5644 );\r
5645\r
5646\r
5647/**\r
5648 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r
5649 OR, and writes the result back to the 64-bit MSR.\r
5650\r
5651 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
5652 result and the value specified by AndData, performs a bitwise inclusive OR\r
5653 between the result of the AND operation and the value specified by OrData,\r
5654 and writes the result to the 64-bit MSR specified by Index. The value written\r
5655 to the MSR is returned. No parameter checking is performed on Index, AndData,\r
5656 or OrData, and some of these may cause CPU exceptions. The caller must either\r
5657 guarantee that Index, AndData, and OrData are valid, or the caller must\r
5658 establish proper exception handlers. This function is only available on IA-32\r
030cd1a2 5659 and x64.\r
ac644614 5660\r
5661 @param Index The 32-bit MSR index to write.\r
5662 @param AndData The value to AND with the read value from the MSR.\r
5663 @param OrData The value to OR with the result of the AND operation.\r
5664\r
5665 @return The value written back to the MSR.\r
5666\r
5667**/\r
5668UINT64\r
5669EFIAPI\r
5670AsmMsrAndThenOr64 (\r
5671 IN UINT32 Index,\r
5672 IN UINT64 AndData,\r
5673 IN UINT64 OrData\r
5674 );\r
5675\r
5676\r
5677/**\r
5678 Reads a bit field of an MSR.\r
5679\r
5680 Reads the bit field in the 64-bit MSR. The bit field is specified by the\r
5681 StartBit and the EndBit. The value of the bit field is returned. The caller\r
5682 must either guarantee that Index is valid, or the caller must set up\r
5683 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5684 on IA-32 and x64.\r
ac644614 5685\r
5686 If StartBit is greater than 63, then ASSERT().\r
5687 If EndBit is greater than 63, then ASSERT().\r
5688 If EndBit is less than StartBit, then ASSERT().\r
5689\r
5690 @param Index The 32-bit MSR index to read.\r
5691 @param StartBit The ordinal of the least significant bit in the bit field.\r
5692 Range 0..63.\r
5693 @param EndBit The ordinal of the most significant bit in the bit field.\r
5694 Range 0..63.\r
5695\r
5696 @return The value read from the MSR.\r
5697\r
5698**/\r
5699UINT64\r
5700EFIAPI\r
5701AsmMsrBitFieldRead64 (\r
5702 IN UINT32 Index,\r
5703 IN UINTN StartBit,\r
5704 IN UINTN EndBit\r
5705 );\r
5706\r
5707\r
5708/**\r
5709 Writes a bit field to an MSR.\r
5710\r
5711 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
5712 the StartBit and the EndBit. All other bits in the destination MSR are\r
5713 preserved. The MSR written is returned. Extra left bits in Value are\r
5714 stripped. The caller must either guarantee that Index and the data written is\r
5715 valid, or the caller must set up exception handlers to catch the exceptions.\r
030cd1a2 5716 This function is only available on IA-32 and x64.\r
ac644614 5717\r
5718 If StartBit is greater than 63, then ASSERT().\r
5719 If EndBit is greater than 63, then ASSERT().\r
5720 If EndBit is less than StartBit, then ASSERT().\r
5721\r
5722 @param Index The 32-bit MSR index to write.\r
5723 @param StartBit The ordinal of the least significant bit in the bit field.\r
5724 Range 0..63.\r
5725 @param EndBit The ordinal of the most significant bit in the bit field.\r
5726 Range 0..63.\r
5727 @param Value New value of the bit field.\r
5728\r
5729 @return The value written back to the MSR.\r
5730\r
5731**/\r
5732UINT64\r
5733EFIAPI\r
5734AsmMsrBitFieldWrite64 (\r
5735 IN UINT32 Index,\r
5736 IN UINTN StartBit,\r
5737 IN UINTN EndBit,\r
5738 IN UINT64 Value\r
5739 );\r
5740\r
5741\r
5742/**\r
5743 Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r
5744 writes the result back to the bit field in the 64-bit MSR.\r
5745\r
5746 Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
5747 between the read result and the value specified by OrData, and writes the\r
5748 result to the 64-bit MSR specified by Index. The value written to the MSR is\r
5749 returned. Extra left bits in OrData are stripped. The caller must either\r
5750 guarantee that Index and the data written is valid, or the caller must set up\r
5751 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5752 on IA-32 and x64.\r
ac644614 5753\r
5754 If StartBit is greater than 63, then ASSERT().\r
5755 If EndBit is greater than 63, then ASSERT().\r
5756 If EndBit is less than StartBit, then ASSERT().\r
5757\r
5758 @param Index The 32-bit MSR index to write.\r
5759 @param StartBit The ordinal of the least significant bit in the bit field.\r
5760 Range 0..63.\r
5761 @param EndBit The ordinal of the most significant bit in the bit field.\r
5762 Range 0..63.\r
5763 @param OrData The value to OR with the read value from the bit field.\r
5764\r
5765 @return The value written back to the MSR.\r
5766\r
5767**/\r
5768UINT64\r
5769EFIAPI\r
5770AsmMsrBitFieldOr64 (\r
5771 IN UINT32 Index,\r
5772 IN UINTN StartBit,\r
5773 IN UINTN EndBit,\r
5774 IN UINT64 OrData\r
5775 );\r
5776\r
5777\r
5778/**\r
5779 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
5780 result back to the bit field in the 64-bit MSR.\r
5781\r
5782 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5783 read result and the value specified by AndData, and writes the result to the\r
5784 64-bit MSR specified by Index. The value written to the MSR is returned.\r
5785 Extra left bits in AndData are stripped. The caller must either guarantee\r
5786 that Index and the data written is valid, or the caller must set up exception\r
5787 handlers to catch the exceptions. This function is only available on IA-32\r
030cd1a2 5788 and x64.\r
ac644614 5789\r
5790 If StartBit is greater than 63, then ASSERT().\r
5791 If EndBit is greater than 63, then ASSERT().\r
5792 If EndBit is less than StartBit, then ASSERT().\r
5793\r
5794 @param Index The 32-bit MSR index to write.\r
5795 @param StartBit The ordinal of the least significant bit in the bit field.\r
5796 Range 0..63.\r
5797 @param EndBit The ordinal of the most significant bit in the bit field.\r
5798 Range 0..63.\r
5799 @param AndData The value to AND with the read value from the bit field.\r
5800\r
5801 @return The value written back to the MSR.\r
5802\r
5803**/\r
5804UINT64\r
5805EFIAPI\r
5806AsmMsrBitFieldAnd64 (\r
5807 IN UINT32 Index,\r
5808 IN UINTN StartBit,\r
5809 IN UINTN EndBit,\r
5810 IN UINT64 AndData\r
5811 );\r
5812\r
5813\r
5814/**\r
5815 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
5816 bitwise inclusive OR, and writes the result back to the bit field in the\r
5817 64-bit MSR.\r
5818\r
5819 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
5820 a bitwise inclusive OR between the read result and the value specified by\r
5821 AndData, and writes the result to the 64-bit MSR specified by Index. The\r
5822 value written to the MSR is returned. Extra left bits in both AndData and\r
5823 OrData are stripped. The caller must either guarantee that Index and the data\r
5824 written is valid, or the caller must set up exception handlers to catch the\r
030cd1a2 5825 exceptions. This function is only available on IA-32 and x64.\r
ac644614 5826\r
5827 If StartBit is greater than 63, then ASSERT().\r
5828 If EndBit is greater than 63, then ASSERT().\r
5829 If EndBit is less than StartBit, then ASSERT().\r
5830\r
5831 @param Index The 32-bit MSR index to write.\r
5832 @param StartBit The ordinal of the least significant bit in the bit field.\r
5833 Range 0..63.\r
5834 @param EndBit The ordinal of the most significant bit in the bit field.\r
5835 Range 0..63.\r
5836 @param AndData The value to AND with the read value from the bit field.\r
5837 @param OrData The value to OR with the result of the AND operation.\r
5838\r
5839 @return The value written back to the MSR.\r
5840\r
5841**/\r
5842UINT64\r
5843EFIAPI\r
5844AsmMsrBitFieldAndThenOr64 (\r
5845 IN UINT32 Index,\r
5846 IN UINTN StartBit,\r
5847 IN UINTN EndBit,\r
5848 IN UINT64 AndData,\r
5849 IN UINT64 OrData\r
5850 );\r
5851\r
5852\r
5853/**\r
5854 Reads the current value of the EFLAGS register.\r
5855\r
5856 Reads and returns the current value of the EFLAGS register. This function is\r
030cd1a2 5857 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r
5858 64-bit value on x64.\r
ac644614 5859\r
030cd1a2 5860 @return EFLAGS on IA-32 or RFLAGS on x64.\r
ac644614 5861\r
5862**/\r
5863UINTN\r
5864EFIAPI\r
5865AsmReadEflags (\r
5866 VOID\r
5867 );\r
5868\r
5869\r
5870/**\r
5871 Reads the current value of the Control Register 0 (CR0).\r
5872\r
5873 Reads and returns the current value of CR0. This function is only available\r
030cd1a2 5874 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5875 x64.\r
ac644614 5876\r
5877 @return The value of the Control Register 0 (CR0).\r
5878\r
5879**/\r
5880UINTN\r
5881EFIAPI\r
5882AsmReadCr0 (\r
5883 VOID\r
5884 );\r
5885\r
5886\r
5887/**\r
5888 Reads the current value of the Control Register 2 (CR2).\r
5889\r
5890 Reads and returns the current value of CR2. This function is only available\r
030cd1a2 5891 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5892 x64.\r
ac644614 5893\r
5894 @return The value of the Control Register 2 (CR2).\r
5895\r
5896**/\r
5897UINTN\r
5898EFIAPI\r
5899AsmReadCr2 (\r
5900 VOID\r
5901 );\r
5902\r
5903\r
5904/**\r
5905 Reads the current value of the Control Register 3 (CR3).\r
5906\r
5907 Reads and returns the current value of CR3. This function is only available\r
030cd1a2 5908 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5909 x64.\r
ac644614 5910\r
5911 @return The value of the Control Register 3 (CR3).\r
5912\r
5913**/\r
5914UINTN\r
5915EFIAPI\r
5916AsmReadCr3 (\r
5917 VOID\r
5918 );\r
5919\r
5920\r
5921/**\r
5922 Reads the current value of the Control Register 4 (CR4).\r
5923\r
5924 Reads and returns the current value of CR4. This function is only available\r
030cd1a2 5925 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5926 x64.\r
ac644614 5927\r
5928 @return The value of the Control Register 4 (CR4).\r
5929\r
5930**/\r
5931UINTN\r
5932EFIAPI\r
5933AsmReadCr4 (\r
5934 VOID\r
5935 );\r
5936\r
5937\r
5938/**\r
5939 Writes a value to Control Register 0 (CR0).\r
5940\r
5941 Writes and returns a new value to CR0. This function is only available on\r
030cd1a2 5942 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 5943\r
5944 @param Cr0 The value to write to CR0.\r
5945\r
5946 @return The value written to CR0.\r
5947\r
5948**/\r
5949UINTN\r
5950EFIAPI\r
5951AsmWriteCr0 (\r
5952 UINTN Cr0\r
5953 );\r
5954\r
5955\r
5956/**\r
5957 Writes a value to Control Register 2 (CR2).\r
5958\r
5959 Writes and returns a new value to CR2. This function is only available on\r
030cd1a2 5960 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 5961\r
5962 @param Cr2 The value to write to CR2.\r
5963\r
5964 @return The value written to CR2.\r
5965\r
5966**/\r
5967UINTN\r
5968EFIAPI\r
5969AsmWriteCr2 (\r
5970 UINTN Cr2\r
5971 );\r
5972\r
5973\r
5974/**\r
5975 Writes a value to Control Register 3 (CR3).\r
5976\r
5977 Writes and returns a new value to CR3. This function is only available on\r
030cd1a2 5978 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 5979\r
5980 @param Cr3 The value to write to CR3.\r
5981\r
5982 @return The value written to CR3.\r
5983\r
5984**/\r
5985UINTN\r
5986EFIAPI\r
5987AsmWriteCr3 (\r
5988 UINTN Cr3\r
5989 );\r
5990\r
5991\r
5992/**\r
5993 Writes a value to Control Register 4 (CR4).\r
5994\r
5995 Writes and returns a new value to CR4. This function is only available on\r
030cd1a2 5996 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 5997\r
5998 @param Cr4 The value to write to CR4.\r
5999\r
6000 @return The value written to CR4.\r
6001\r
6002**/\r
6003UINTN\r
6004EFIAPI\r
6005AsmWriteCr4 (\r
6006 UINTN Cr4\r
6007 );\r
6008\r
6009\r
6010/**\r
6011 Reads the current value of Debug Register 0 (DR0).\r
6012\r
6013 Reads and returns the current value of DR0. This function is only available\r
030cd1a2 6014 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6015 x64.\r
ac644614 6016\r
6017 @return The value of Debug Register 0 (DR0).\r
6018\r
6019**/\r
6020UINTN\r
6021EFIAPI\r
6022AsmReadDr0 (\r
6023 VOID\r
6024 );\r
6025\r
6026\r
6027/**\r
6028 Reads the current value of Debug Register 1 (DR1).\r
6029\r
6030 Reads and returns the current value of DR1. This function is only available\r
030cd1a2 6031 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6032 x64.\r
ac644614 6033\r
6034 @return The value of Debug Register 1 (DR1).\r
6035\r
6036**/\r
6037UINTN\r
6038EFIAPI\r
6039AsmReadDr1 (\r
6040 VOID\r
6041 );\r
6042\r
6043\r
6044/**\r
6045 Reads the current value of Debug Register 2 (DR2).\r
6046\r
6047 Reads and returns the current value of DR2. This function is only available\r
030cd1a2 6048 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6049 x64.\r
ac644614 6050\r
6051 @return The value of Debug Register 2 (DR2).\r
6052\r
6053**/\r
6054UINTN\r
6055EFIAPI\r
6056AsmReadDr2 (\r
6057 VOID\r
6058 );\r
6059\r
6060\r
6061/**\r
6062 Reads the current value of Debug Register 3 (DR3).\r
6063\r
6064 Reads and returns the current value of DR3. This function is only available\r
030cd1a2 6065 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6066 x64.\r
ac644614 6067\r
6068 @return The value of Debug Register 3 (DR3).\r
6069\r
6070**/\r
6071UINTN\r
6072EFIAPI\r
6073AsmReadDr3 (\r
6074 VOID\r
6075 );\r
6076\r
6077\r
6078/**\r
6079 Reads the current value of Debug Register 4 (DR4).\r
6080\r
6081 Reads and returns the current value of DR4. This function is only available\r
030cd1a2 6082 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6083 x64.\r
ac644614 6084\r
6085 @return The value of Debug Register 4 (DR4).\r
6086\r
6087**/\r
6088UINTN\r
6089EFIAPI\r
6090AsmReadDr4 (\r
6091 VOID\r
6092 );\r
6093\r
6094\r
6095/**\r
6096 Reads the current value of Debug Register 5 (DR5).\r
6097\r
6098 Reads and returns the current value of DR5. This function is only available\r
030cd1a2 6099 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6100 x64.\r
ac644614 6101\r
6102 @return The value of Debug Register 5 (DR5).\r
6103\r
6104**/\r
6105UINTN\r
6106EFIAPI\r
6107AsmReadDr5 (\r
6108 VOID\r
6109 );\r
6110\r
6111\r
6112/**\r
6113 Reads the current value of Debug Register 6 (DR6).\r
6114\r
6115 Reads and returns the current value of DR6. This function is only available\r
030cd1a2 6116 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6117 x64.\r
ac644614 6118\r
6119 @return The value of Debug Register 6 (DR6).\r
6120\r
6121**/\r
6122UINTN\r
6123EFIAPI\r
6124AsmReadDr6 (\r
6125 VOID\r
6126 );\r
6127\r
6128\r
6129/**\r
6130 Reads the current value of Debug Register 7 (DR7).\r
6131\r
6132 Reads and returns the current value of DR7. This function is only available\r
030cd1a2 6133 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6134 x64.\r
ac644614 6135\r
6136 @return The value of Debug Register 7 (DR7).\r
6137\r
6138**/\r
6139UINTN\r
6140EFIAPI\r
6141AsmReadDr7 (\r
6142 VOID\r
6143 );\r
6144\r
6145\r
6146/**\r
6147 Writes a value to Debug Register 0 (DR0).\r
6148\r
6149 Writes and returns a new value to DR0. This function is only available on\r
030cd1a2 6150 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6151\r
6152 @param Dr0 The value to write to Dr0.\r
6153\r
6154 @return The value written to Debug Register 0 (DR0).\r
6155\r
6156**/\r
6157UINTN\r
6158EFIAPI\r
6159AsmWriteDr0 (\r
6160 UINTN Dr0\r
6161 );\r
6162\r
6163\r
6164/**\r
6165 Writes a value to Debug Register 1 (DR1).\r
6166\r
6167 Writes and returns a new value to DR1. This function is only available on\r
030cd1a2 6168 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6169\r
6170 @param Dr1 The value to write to Dr1.\r
6171\r
6172 @return The value written to Debug Register 1 (DR1).\r
6173\r
6174**/\r
6175UINTN\r
6176EFIAPI\r
6177AsmWriteDr1 (\r
6178 UINTN Dr1\r
6179 );\r
6180\r
6181\r
6182/**\r
6183 Writes a value to Debug Register 2 (DR2).\r
6184\r
6185 Writes and returns a new value to DR2. This function is only available on\r
030cd1a2 6186 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6187\r
6188 @param Dr2 The value to write to Dr2.\r
6189\r
6190 @return The value written to Debug Register 2 (DR2).\r
6191\r
6192**/\r
6193UINTN\r
6194EFIAPI\r
6195AsmWriteDr2 (\r
6196 UINTN Dr2\r
6197 );\r
6198\r
6199\r
6200/**\r
6201 Writes a value to Debug Register 3 (DR3).\r
6202\r
6203 Writes and returns a new value to DR3. This function is only available on\r
030cd1a2 6204 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6205\r
6206 @param Dr3 The value to write to Dr3.\r
6207\r
6208 @return The value written to Debug Register 3 (DR3).\r
6209\r
6210**/\r
6211UINTN\r
6212EFIAPI\r
6213AsmWriteDr3 (\r
6214 UINTN Dr3\r
6215 );\r
6216\r
6217\r
6218/**\r
6219 Writes a value to Debug Register 4 (DR4).\r
6220\r
6221 Writes and returns a new value to DR4. This function is only available on\r
030cd1a2 6222 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6223\r
6224 @param Dr4 The value to write to Dr4.\r
6225\r
6226 @return The value written to Debug Register 4 (DR4).\r
6227\r
6228**/\r
6229UINTN\r
6230EFIAPI\r
6231AsmWriteDr4 (\r
6232 UINTN Dr4\r
6233 );\r
6234\r
6235\r
6236/**\r
6237 Writes a value to Debug Register 5 (DR5).\r
6238\r
6239 Writes and returns a new value to DR5. This function is only available on\r
030cd1a2 6240 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6241\r
6242 @param Dr5 The value to write to Dr5.\r
6243\r
6244 @return The value written to Debug Register 5 (DR5).\r
6245\r
6246**/\r
6247UINTN\r
6248EFIAPI\r
6249AsmWriteDr5 (\r
6250 UINTN Dr5\r
6251 );\r
6252\r
6253\r
6254/**\r
6255 Writes a value to Debug Register 6 (DR6).\r
6256\r
6257 Writes and returns a new value to DR6. This function is only available on\r
030cd1a2 6258 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6259\r
6260 @param Dr6 The value to write to Dr6.\r
6261\r
6262 @return The value written to Debug Register 6 (DR6).\r
6263\r
6264**/\r
6265UINTN\r
6266EFIAPI\r
6267AsmWriteDr6 (\r
6268 UINTN Dr6\r
6269 );\r
6270\r
6271\r
6272/**\r
6273 Writes a value to Debug Register 7 (DR7).\r
6274\r
6275 Writes and returns a new value to DR7. This function is only available on\r
030cd1a2 6276 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6277\r
6278 @param Dr7 The value to write to Dr7.\r
6279\r
6280 @return The value written to Debug Register 7 (DR7).\r
6281\r
6282**/\r
6283UINTN\r
6284EFIAPI\r
6285AsmWriteDr7 (\r
6286 UINTN Dr7\r
6287 );\r
6288\r
6289\r
6290/**\r
6291 Reads the current value of Code Segment Register (CS).\r
6292\r
6293 Reads and returns the current value of CS. This function is only available on\r
030cd1a2 6294 IA-32 and x64.\r
ac644614 6295\r
6296 @return The current value of CS.\r
6297\r
6298**/\r
6299UINT16\r
6300EFIAPI\r
6301AsmReadCs (\r
6302 VOID\r
6303 );\r
6304\r
6305\r
6306/**\r
6307 Reads the current value of Data Segment Register (DS).\r
6308\r
6309 Reads and returns the current value of DS. This function is only available on\r
030cd1a2 6310 IA-32 and x64.\r
ac644614 6311\r
6312 @return The current value of DS.\r
6313\r
6314**/\r
6315UINT16\r
6316EFIAPI\r
6317AsmReadDs (\r
6318 VOID\r
6319 );\r
6320\r
6321\r
6322/**\r
6323 Reads the current value of Extra Segment Register (ES).\r
6324\r
6325 Reads and returns the current value of ES. This function is only available on\r
030cd1a2 6326 IA-32 and x64.\r
ac644614 6327\r
6328 @return The current value of ES.\r
6329\r
6330**/\r
6331UINT16\r
6332EFIAPI\r
6333AsmReadEs (\r
6334 VOID\r
6335 );\r
6336\r
6337\r
6338/**\r
6339 Reads the current value of FS Data Segment Register (FS).\r
6340\r
6341 Reads and returns the current value of FS. This function is only available on\r
030cd1a2 6342 IA-32 and x64.\r
ac644614 6343\r
6344 @return The current value of FS.\r
6345\r
6346**/\r
6347UINT16\r
6348EFIAPI\r
6349AsmReadFs (\r
6350 VOID\r
6351 );\r
6352\r
6353\r
6354/**\r
6355 Reads the current value of GS Data Segment Register (GS).\r
6356\r
6357 Reads and returns the current value of GS. This function is only available on\r
030cd1a2 6358 IA-32 and x64.\r
ac644614 6359\r
6360 @return The current value of GS.\r
6361\r
6362**/\r
6363UINT16\r
6364EFIAPI\r
6365AsmReadGs (\r
6366 VOID\r
6367 );\r
6368\r
6369\r
6370/**\r
6371 Reads the current value of Stack Segment Register (SS).\r
6372\r
6373 Reads and returns the current value of SS. This function is only available on\r
030cd1a2 6374 IA-32 and x64.\r
ac644614 6375\r
6376 @return The current value of SS.\r
6377\r
6378**/\r
6379UINT16\r
6380EFIAPI\r
6381AsmReadSs (\r
6382 VOID\r
6383 );\r
6384\r
6385\r
6386/**\r
6387 Reads the current value of Task Register (TR).\r
6388\r
6389 Reads and returns the current value of TR. This function is only available on\r
030cd1a2 6390 IA-32 and x64.\r
ac644614 6391\r
6392 @return The current value of TR.\r
6393\r
6394**/\r
6395UINT16\r
6396EFIAPI\r
6397AsmReadTr (\r
6398 VOID\r
6399 );\r
6400\r
6401\r
6402/**\r
6403 Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
6404\r
6405 Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
030cd1a2 6406 function is only available on IA-32 and x64.\r
ac644614 6407\r
6408 If Gdtr is NULL, then ASSERT().\r
6409\r
6410 @param Gdtr Pointer to a GDTR descriptor.\r
6411\r
6412**/\r
6413VOID\r
6414EFIAPI\r
6415AsmReadGdtr (\r
6416 OUT IA32_DESCRIPTOR *Gdtr\r
6417 );\r
6418\r
6419\r
6420/**\r
6421 Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
6422\r
6423 Writes and the current GDTR descriptor specified by Gdtr. This function is\r
030cd1a2 6424 only available on IA-32 and x64.\r
ac644614 6425\r
6426 If Gdtr is NULL, then ASSERT().\r
6427\r
6428 @param Gdtr Pointer to a GDTR descriptor.\r
6429\r
6430**/\r
6431VOID\r
6432EFIAPI\r
6433AsmWriteGdtr (\r
6434 IN CONST IA32_DESCRIPTOR *Gdtr\r
6435 );\r
6436\r
6437\r
6438/**\r
17f695ed 6439 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
ac644614 6440\r
6441 Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
030cd1a2 6442 function is only available on IA-32 and x64.\r
ac644614 6443\r
6444 If Idtr is NULL, then ASSERT().\r
6445\r
6446 @param Idtr Pointer to a IDTR descriptor.\r
6447\r
6448**/\r
6449VOID\r
6450EFIAPI\r
6451AsmReadIdtr (\r
6452 OUT IA32_DESCRIPTOR *Idtr\r
6453 );\r
6454\r
6455\r
6456/**\r
17f695ed 6457 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
ac644614 6458\r
6459 Writes the current IDTR descriptor and returns it in Idtr. This function is\r
030cd1a2 6460 only available on IA-32 and x64.\r
ac644614 6461\r
6462 If Idtr is NULL, then ASSERT().\r
6463\r
6464 @param Idtr Pointer to a IDTR descriptor.\r
6465\r
6466**/\r
6467VOID\r
6468EFIAPI\r
6469AsmWriteIdtr (\r
6470 IN CONST IA32_DESCRIPTOR *Idtr\r
6471 );\r
6472\r
6473\r
6474/**\r
6475 Reads the current Local Descriptor Table Register(LDTR) selector.\r
6476\r
6477 Reads and returns the current 16-bit LDTR descriptor value. This function is\r
030cd1a2 6478 only available on IA-32 and x64.\r
ac644614 6479\r
6480 @return The current selector of LDT.\r
6481\r
6482**/\r
6483UINT16\r
6484EFIAPI\r
6485AsmReadLdtr (\r
6486 VOID\r
6487 );\r
6488\r
6489\r
6490/**\r
17f695ed 6491 Writes the current Local Descriptor Table Register (LDTR) selector.\r
ac644614 6492\r
6493 Writes and the current LDTR descriptor specified by Ldtr. This function is\r
030cd1a2 6494 only available on IA-32 and x64.\r
ac644614 6495\r
6496 @param Ldtr 16-bit LDTR selector value.\r
6497\r
6498**/\r
6499VOID\r
6500EFIAPI\r
6501AsmWriteLdtr (\r
6502 IN UINT16 Ldtr\r
6503 );\r
6504\r
6505\r
6506/**\r
6507 Save the current floating point/SSE/SSE2 context to a buffer.\r
6508\r
6509 Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
6510 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
030cd1a2 6511 available on IA-32 and x64.\r
ac644614 6512\r
6513 If Buffer is NULL, then ASSERT().\r
6514 If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
6515\r
6516 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
6517\r
6518**/\r
6519VOID\r
6520EFIAPI\r
6521AsmFxSave (\r
6522 OUT IA32_FX_BUFFER *Buffer\r
6523 );\r
6524\r
6525\r
6526/**\r
6527 Restores the current floating point/SSE/SSE2 context from a buffer.\r
6528\r
6529 Restores the current floating point/SSE/SSE2 state from the buffer specified\r
6530 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
030cd1a2 6531 only available on IA-32 and x64.\r
ac644614 6532\r
6533 If Buffer is NULL, then ASSERT().\r
6534 If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
6535 If Buffer was not saved with AsmFxSave(), then ASSERT().\r
6536\r
6537 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
6538\r
6539**/\r
6540VOID\r
6541EFIAPI\r
6542AsmFxRestore (\r
6543 IN CONST IA32_FX_BUFFER *Buffer\r
6544 );\r
6545\r
6546\r
6547/**\r
6548 Reads the current value of 64-bit MMX Register #0 (MM0).\r
6549\r
6550 Reads and returns the current value of MM0. This function is only available\r
030cd1a2 6551 on IA-32 and x64.\r
ac644614 6552\r
6553 @return The current value of MM0.\r
6554\r
6555**/\r
6556UINT64\r
6557EFIAPI\r
6558AsmReadMm0 (\r
6559 VOID\r
6560 );\r
6561\r
6562\r
6563/**\r
6564 Reads the current value of 64-bit MMX Register #1 (MM1).\r
6565\r
6566 Reads and returns the current value of MM1. This function is only available\r
030cd1a2 6567 on IA-32 and x64.\r
ac644614 6568\r
6569 @return The current value of MM1.\r
6570\r
6571**/\r
6572UINT64\r
6573EFIAPI\r
6574AsmReadMm1 (\r
6575 VOID\r
6576 );\r
6577\r
6578\r
6579/**\r
6580 Reads the current value of 64-bit MMX Register #2 (MM2).\r
6581\r
6582 Reads and returns the current value of MM2. This function is only available\r
030cd1a2 6583 on IA-32 and x64.\r
ac644614 6584\r
6585 @return The current value of MM2.\r
6586\r
6587**/\r
6588UINT64\r
6589EFIAPI\r
6590AsmReadMm2 (\r
6591 VOID\r
6592 );\r
6593\r
6594\r
6595/**\r
6596 Reads the current value of 64-bit MMX Register #3 (MM3).\r
6597\r
6598 Reads and returns the current value of MM3. This function is only available\r
030cd1a2 6599 on IA-32 and x64.\r
ac644614 6600\r
6601 @return The current value of MM3.\r
6602\r
6603**/\r
6604UINT64\r
6605EFIAPI\r
6606AsmReadMm3 (\r
6607 VOID\r
6608 );\r
6609\r
6610\r
6611/**\r
6612 Reads the current value of 64-bit MMX Register #4 (MM4).\r
6613\r
6614 Reads and returns the current value of MM4. This function is only available\r
030cd1a2 6615 on IA-32 and x64.\r
ac644614 6616\r
6617 @return The current value of MM4.\r
6618\r
6619**/\r
6620UINT64\r
6621EFIAPI\r
6622AsmReadMm4 (\r
6623 VOID\r
6624 );\r
6625\r
6626\r
6627/**\r
6628 Reads the current value of 64-bit MMX Register #5 (MM5).\r
6629\r
6630 Reads and returns the current value of MM5. This function is only available\r
030cd1a2 6631 on IA-32 and x64.\r
ac644614 6632\r
6633 @return The current value of MM5.\r
6634\r
6635**/\r
6636UINT64\r
6637EFIAPI\r
6638AsmReadMm5 (\r
6639 VOID\r
6640 );\r
6641\r
6642\r
6643/**\r
6644 Reads the current value of 64-bit MMX Register #6 (MM6).\r
6645\r
6646 Reads and returns the current value of MM6. This function is only available\r
030cd1a2 6647 on IA-32 and x64.\r
ac644614 6648\r
6649 @return The current value of MM6.\r
6650\r
6651**/\r
6652UINT64\r
6653EFIAPI\r
6654AsmReadMm6 (\r
6655 VOID\r
6656 );\r
6657\r
6658\r
6659/**\r
6660 Reads the current value of 64-bit MMX Register #7 (MM7).\r
6661\r
6662 Reads and returns the current value of MM7. This function is only available\r
030cd1a2 6663 on IA-32 and x64.\r
ac644614 6664\r
6665 @return The current value of MM7.\r
6666\r
6667**/\r
6668UINT64\r
6669EFIAPI\r
6670AsmReadMm7 (\r
6671 VOID\r
6672 );\r
6673\r
6674\r
6675/**\r
6676 Writes the current value of 64-bit MMX Register #0 (MM0).\r
6677\r
6678 Writes the current value of MM0. This function is only available on IA32 and\r
030cd1a2 6679 x64.\r
ac644614 6680\r
6681 @param Value The 64-bit value to write to MM0.\r
6682\r
6683**/\r
6684VOID\r
6685EFIAPI\r
6686AsmWriteMm0 (\r
6687 IN UINT64 Value\r
6688 );\r
6689\r
6690\r
6691/**\r
6692 Writes the current value of 64-bit MMX Register #1 (MM1).\r
6693\r
6694 Writes the current value of MM1. This function is only available on IA32 and\r
030cd1a2 6695 x64.\r
ac644614 6696\r
6697 @param Value The 64-bit value to write to MM1.\r
6698\r
6699**/\r
6700VOID\r
6701EFIAPI\r
6702AsmWriteMm1 (\r
6703 IN UINT64 Value\r
6704 );\r
6705\r
6706\r
6707/**\r
6708 Writes the current value of 64-bit MMX Register #2 (MM2).\r
6709\r
6710 Writes the current value of MM2. This function is only available on IA32 and\r
030cd1a2 6711 x64.\r
ac644614 6712\r
6713 @param Value The 64-bit value to write to MM2.\r
6714\r
6715**/\r
6716VOID\r
6717EFIAPI\r
6718AsmWriteMm2 (\r
6719 IN UINT64 Value\r
6720 );\r
6721\r
6722\r
6723/**\r
6724 Writes the current value of 64-bit MMX Register #3 (MM3).\r
6725\r
6726 Writes the current value of MM3. This function is only available on IA32 and\r
030cd1a2 6727 x64.\r
ac644614 6728\r
6729 @param Value The 64-bit value to write to MM3.\r
6730\r
6731**/\r
6732VOID\r
6733EFIAPI\r
6734AsmWriteMm3 (\r
6735 IN UINT64 Value\r
6736 );\r
6737\r
6738\r
6739/**\r
6740 Writes the current value of 64-bit MMX Register #4 (MM4).\r
6741\r
6742 Writes the current value of MM4. This function is only available on IA32 and\r
030cd1a2 6743 x64.\r
ac644614 6744\r
6745 @param Value The 64-bit value to write to MM4.\r
6746\r
6747**/\r
6748VOID\r
6749EFIAPI\r
6750AsmWriteMm4 (\r
6751 IN UINT64 Value\r
6752 );\r
6753\r
6754\r
6755/**\r
6756 Writes the current value of 64-bit MMX Register #5 (MM5).\r
6757\r
6758 Writes the current value of MM5. This function is only available on IA32 and\r
030cd1a2 6759 x64.\r
ac644614 6760\r
6761 @param Value The 64-bit value to write to MM5.\r
6762\r
6763**/\r
6764VOID\r
6765EFIAPI\r
6766AsmWriteMm5 (\r
6767 IN UINT64 Value\r
6768 );\r
6769\r
6770\r
6771/**\r
6772 Writes the current value of 64-bit MMX Register #6 (MM6).\r
6773\r
6774 Writes the current value of MM6. This function is only available on IA32 and\r
030cd1a2 6775 x64.\r
ac644614 6776\r
6777 @param Value The 64-bit value to write to MM6.\r
6778\r
6779**/\r
6780VOID\r
6781EFIAPI\r
6782AsmWriteMm6 (\r
6783 IN UINT64 Value\r
6784 );\r
6785\r
6786\r
6787/**\r
6788 Writes the current value of 64-bit MMX Register #7 (MM7).\r
6789\r
6790 Writes the current value of MM7. This function is only available on IA32 and\r
030cd1a2 6791 x64.\r
ac644614 6792\r
6793 @param Value The 64-bit value to write to MM7.\r
6794\r
6795**/\r
6796VOID\r
6797EFIAPI\r
6798AsmWriteMm7 (\r
6799 IN UINT64 Value\r
6800 );\r
6801\r
6802\r
6803/**\r
6804 Reads the current value of Time Stamp Counter (TSC).\r
6805\r
6806 Reads and returns the current value of TSC. This function is only available\r
030cd1a2 6807 on IA-32 and x64.\r
ac644614 6808\r
6809 @return The current value of TSC\r
6810\r
6811**/\r
6812UINT64\r
6813EFIAPI\r
6814AsmReadTsc (\r
6815 VOID\r
6816 );\r
6817\r
6818\r
6819/**\r
6820 Reads the current value of a Performance Counter (PMC).\r
6821\r
6822 Reads and returns the current value of performance counter specified by\r
030cd1a2 6823 Index. This function is only available on IA-32 and x64.\r
ac644614 6824\r
6825 @param Index The 32-bit Performance Counter index to read.\r
6826\r
6827 @return The value of the PMC specified by Index.\r
6828\r
6829**/\r
6830UINT64\r
6831EFIAPI\r
6832AsmReadPmc (\r
6833 IN UINT32 Index\r
6834 );\r
6835\r
6836\r
6837/**\r
6838 Sets up a monitor buffer that is used by AsmMwait().\r
6839\r
6840 Executes a MONITOR instruction with the register state specified by Eax, Ecx\r
030cd1a2 6841 and Edx. Returns Eax. This function is only available on IA-32 and x64.\r
ac644614 6842\r
6843 @param Eax The value to load into EAX or RAX before executing the MONITOR\r
6844 instruction.\r
6845 @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
6846 instruction.\r
6847 @param Edx The value to load into EDX or RDX before executing the MONITOR\r
6848 instruction.\r
6849\r
6850 @return Eax\r
6851\r
6852**/\r
6853UINTN\r
6854EFIAPI\r
6855AsmMonitor (\r
6856 IN UINTN Eax,\r
6857 IN UINTN Ecx,\r
6858 IN UINTN Edx\r
6859 );\r
6860\r
6861\r
6862/**\r
6863 Executes an MWAIT instruction.\r
6864\r
6865 Executes an MWAIT instruction with the register state specified by Eax and\r
030cd1a2 6866 Ecx. Returns Eax. This function is only available on IA-32 and x64.\r
ac644614 6867\r
6868 @param Eax The value to load into EAX or RAX before executing the MONITOR\r
6869 instruction.\r
6870 @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
6871 instruction.\r
6872\r
6873 @return Eax\r
6874\r
6875**/\r
6876UINTN\r
6877EFIAPI\r
6878AsmMwait (\r
6879 IN UINTN Eax,\r
6880 IN UINTN Ecx\r
6881 );\r
6882\r
6883\r
6884/**\r
6885 Executes a WBINVD instruction.\r
6886\r
6887 Executes a WBINVD instruction. This function is only available on IA-32 and\r
030cd1a2 6888 x64.\r
ac644614 6889\r
6890**/\r
6891VOID\r
6892EFIAPI\r
6893AsmWbinvd (\r
6894 VOID\r
6895 );\r
6896\r
6897\r
6898/**\r
6899 Executes a INVD instruction.\r
6900\r
6901 Executes a INVD instruction. This function is only available on IA-32 and\r
030cd1a2 6902 x64.\r
ac644614 6903\r
6904**/\r
6905VOID\r
6906EFIAPI\r
6907AsmInvd (\r
6908 VOID\r
6909 );\r
6910\r
6911\r
6912/**\r
6913 Flushes a cache line from all the instruction and data caches within the\r
6914 coherency domain of the CPU.\r
6915\r
6916 Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
030cd1a2 6917 This function is only available on IA-32 and x64.\r
ac644614 6918\r
6919 @param LinearAddress The address of the cache line to flush. If the CPU is\r
6920 in a physical addressing mode, then LinearAddress is a\r
6921 physical address. If the CPU is in a virtual\r
6922 addressing mode, then LinearAddress is a virtual\r
6923 address.\r
6924\r
6925 @return LinearAddress\r
6926**/\r
6927VOID *\r
6928EFIAPI\r
6929AsmFlushCacheLine (\r
6930 IN VOID *LinearAddress\r
6931 );\r
6932\r
6933\r
6934/**\r
6935 Enables the 32-bit paging mode on the CPU.\r
6936\r
6937 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
6938 must be properly initialized prior to calling this service. This function\r
6939 assumes the current execution mode is 32-bit protected mode. This function is\r
6940 only available on IA-32. After the 32-bit paging mode is enabled, control is\r
6941 transferred to the function specified by EntryPoint using the new stack\r
6942 specified by NewStack and passing in the parameters specified by Context1 and\r
6943 Context2. Context1 and Context2 are optional and may be NULL. The function\r
6944 EntryPoint must never return.\r
6945\r
6946 If the current execution mode is not 32-bit protected mode, then ASSERT().\r
6947 If EntryPoint is NULL, then ASSERT().\r
6948 If NewStack is NULL, then ASSERT().\r
6949\r
6950 There are a number of constraints that must be followed before calling this\r
6951 function:\r
6952 1) Interrupts must be disabled.\r
6953 2) The caller must be in 32-bit protected mode with flat descriptors. This\r
6954 means all descriptors must have a base of 0 and a limit of 4GB.\r
6955 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
6956 descriptors.\r
6957 4) CR3 must point to valid page tables that will be used once the transition\r
6958 is complete, and those page tables must guarantee that the pages for this\r
6959 function and the stack are identity mapped.\r
6960\r
6961 @param EntryPoint A pointer to function to call with the new stack after\r
6962 paging is enabled.\r
6963 @param Context1 A pointer to the context to pass into the EntryPoint\r
6964 function as the first parameter after paging is enabled.\r
6965 @param Context2 A pointer to the context to pass into the EntryPoint\r
6966 function as the second parameter after paging is enabled.\r
6967 @param NewStack A pointer to the new stack to use for the EntryPoint\r
6968 function after paging is enabled.\r
6969\r
6970**/\r
6971VOID\r
6972EFIAPI\r
6973AsmEnablePaging32 (\r
6974 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
6975 IN VOID *Context1, OPTIONAL\r
6976 IN VOID *Context2, OPTIONAL\r
6977 IN VOID *NewStack\r
6978 );\r
6979\r
6980\r
6981/**\r
6982 Disables the 32-bit paging mode on the CPU.\r
6983\r
6984 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
6985 mode. This function assumes the current execution mode is 32-paged protected\r
6986 mode. This function is only available on IA-32. After the 32-bit paging mode\r
6987 is disabled, control is transferred to the function specified by EntryPoint\r
6988 using the new stack specified by NewStack and passing in the parameters\r
6989 specified by Context1 and Context2. Context1 and Context2 are optional and\r
6990 may be NULL. The function EntryPoint must never return.\r
6991\r
6992 If the current execution mode is not 32-bit paged mode, then ASSERT().\r
6993 If EntryPoint is NULL, then ASSERT().\r
6994 If NewStack is NULL, then ASSERT().\r
6995\r
6996 There are a number of constraints that must be followed before calling this\r
6997 function:\r
6998 1) Interrupts must be disabled.\r
6999 2) The caller must be in 32-bit paged mode.\r
7000 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
7001 4) CR3 must point to valid page tables that guarantee that the pages for\r
7002 this function and the stack are identity mapped.\r
7003\r
7004 @param EntryPoint A pointer to function to call with the new stack after\r
7005 paging is disabled.\r
7006 @param Context1 A pointer to the context to pass into the EntryPoint\r
7007 function as the first parameter after paging is disabled.\r
7008 @param Context2 A pointer to the context to pass into the EntryPoint\r
7009 function as the second parameter after paging is\r
7010 disabled.\r
7011 @param NewStack A pointer to the new stack to use for the EntryPoint\r
7012 function after paging is disabled.\r
7013\r
7014**/\r
7015VOID\r
7016EFIAPI\r
7017AsmDisablePaging32 (\r
7018 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
7019 IN VOID *Context1, OPTIONAL\r
7020 IN VOID *Context2, OPTIONAL\r
7021 IN VOID *NewStack\r
7022 );\r
7023\r
7024\r
7025/**\r
7026 Enables the 64-bit paging mode on the CPU.\r
7027\r
7028 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
7029 must be properly initialized prior to calling this service. This function\r
7030 assumes the current execution mode is 32-bit protected mode with flat\r
7031 descriptors. This function is only available on IA-32. After the 64-bit\r
7032 paging mode is enabled, control is transferred to the function specified by\r
7033 EntryPoint using the new stack specified by NewStack and passing in the\r
7034 parameters specified by Context1 and Context2. Context1 and Context2 are\r
7035 optional and may be 0. The function EntryPoint must never return.\r
7036\r
7037 If the current execution mode is not 32-bit protected mode with flat\r
7038 descriptors, then ASSERT().\r
7039 If EntryPoint is 0, then ASSERT().\r
7040 If NewStack is 0, then ASSERT().\r
7041\r
17f695ed 7042 @param Cs The 16-bit selector to load in the CS before EntryPoint\r
ac644614 7043 is called. The descriptor in the GDT that this selector\r
7044 references must be setup for long mode.\r
7045 @param EntryPoint The 64-bit virtual address of the function to call with\r
7046 the new stack after paging is enabled.\r
7047 @param Context1 The 64-bit virtual address of the context to pass into\r
7048 the EntryPoint function as the first parameter after\r
7049 paging is enabled.\r
7050 @param Context2 The 64-bit virtual address of the context to pass into\r
7051 the EntryPoint function as the second parameter after\r
7052 paging is enabled.\r
7053 @param NewStack The 64-bit virtual address of the new stack to use for\r
7054 the EntryPoint function after paging is enabled.\r
7055\r
7056**/\r
7057VOID\r
7058EFIAPI\r
7059AsmEnablePaging64 (\r
17f695ed 7060 IN UINT16 Cs,\r
ac644614 7061 IN UINT64 EntryPoint,\r
7062 IN UINT64 Context1, OPTIONAL\r
7063 IN UINT64 Context2, OPTIONAL\r
7064 IN UINT64 NewStack\r
7065 );\r
7066\r
7067\r
7068/**\r
7069 Disables the 64-bit paging mode on the CPU.\r
7070\r
7071 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
7072 mode. This function assumes the current execution mode is 64-paging mode.\r
030cd1a2 7073 This function is only available on x64. After the 64-bit paging mode is\r
ac644614 7074 disabled, control is transferred to the function specified by EntryPoint\r
7075 using the new stack specified by NewStack and passing in the parameters\r
7076 specified by Context1 and Context2. Context1 and Context2 are optional and\r
7077 may be 0. The function EntryPoint must never return.\r
7078\r
7079 If the current execution mode is not 64-bit paged mode, then ASSERT().\r
7080 If EntryPoint is 0, then ASSERT().\r
7081 If NewStack is 0, then ASSERT().\r
7082\r
17f695ed 7083 @param Cs The 16-bit selector to load in the CS before EntryPoint\r
ac644614 7084 is called. The descriptor in the GDT that this selector\r
7085 references must be setup for 32-bit protected mode.\r
7086 @param EntryPoint The 64-bit virtual address of the function to call with\r
7087 the new stack after paging is disabled.\r
7088 @param Context1 The 64-bit virtual address of the context to pass into\r
7089 the EntryPoint function as the first parameter after\r
7090 paging is disabled.\r
7091 @param Context2 The 64-bit virtual address of the context to pass into\r
7092 the EntryPoint function as the second parameter after\r
7093 paging is disabled.\r
7094 @param NewStack The 64-bit virtual address of the new stack to use for\r
7095 the EntryPoint function after paging is disabled.\r
7096\r
7097**/\r
7098VOID\r
7099EFIAPI\r
7100AsmDisablePaging64 (\r
17f695ed 7101 IN UINT16 Cs,\r
ac644614 7102 IN UINT32 EntryPoint,\r
7103 IN UINT32 Context1, OPTIONAL\r
7104 IN UINT32 Context2, OPTIONAL\r
7105 IN UINT32 NewStack\r
7106 );\r
7107\r
7108\r
7109//\r
7110// 16-bit thunking services\r
7111//\r
7112\r
7113/**\r
7114 Retrieves the properties for 16-bit thunk functions.\r
7115\r
7116 Computes the size of the buffer and stack below 1MB required to use the\r
7117 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
7118 buffer size is returned in RealModeBufferSize, and the stack size is returned\r
7119 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
7120 then the actual minimum stack size is ExtraStackSize plus the maximum number\r
7121 of bytes that need to be passed to the 16-bit real mode code.\r
7122\r
7123 If RealModeBufferSize is NULL, then ASSERT().\r
7124 If ExtraStackSize is NULL, then ASSERT().\r
7125\r
7126 @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r
7127 required to use the 16-bit thunk functions.\r
7128 @param ExtraStackSize A pointer to the extra size of stack below 1MB\r
7129 that the 16-bit thunk functions require for\r
7130 temporary storage in the transition to and from\r
7131 16-bit real mode.\r
7132\r
7133**/\r
7134VOID\r
7135EFIAPI\r
7136AsmGetThunk16Properties (\r
7137 OUT UINT32 *RealModeBufferSize,\r
7138 OUT UINT32 *ExtraStackSize\r
7139 );\r
7140\r
7141\r
7142/**\r
7143 Prepares all structures a code required to use AsmThunk16().\r
7144\r
7145 Prepares all structures and code required to use AsmThunk16().\r
7146\r
7147 If ThunkContext is NULL, then ASSERT().\r
7148\r
7149 @param ThunkContext A pointer to the context structure that describes the\r
7150 16-bit real mode code to call.\r
7151\r
7152**/\r
7153VOID\r
7154EFIAPI\r
7155AsmPrepareThunk16 (\r
7156 OUT THUNK_CONTEXT *ThunkContext\r
7157 );\r
7158\r
7159\r
7160/**\r
7161 Transfers control to a 16-bit real mode entry point and returns the results.\r
7162\r
7163 Transfers control to a 16-bit real mode entry point and returns the results.\r
17f695ed 7164 AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r
7165 This function must be called with interrupts disabled.\r
7166\r
7167 The register state from the RealModeState field of ThunkContext is restored just prior \r
7168 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r
7169 which is used to set the interrupt state when a 16-bit real mode entry point is called.\r
7170 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r
7171 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r
7172 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r
7173 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r
7174 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r
7175 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r
7176 point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r
7177 after the RETF instruction is executed.\r
7178 \r
7179 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
7180 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r
7181 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r
7182 \r
7183 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
7184 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r
7185 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r
7186 \r
7187 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r
7188 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r
7189 \r
7190 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
7191 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r
7192 disable the A20 mask.\r
7193 \r
7194 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r
7195 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r
7196 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
7197 \r
7198 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r
7199 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
7200 \r
ac644614 7201 If ThunkContext is NULL, then ASSERT().\r
7202 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
17f695ed 7203 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
7204 ThunkAttributes, then ASSERT().\r
ac644614 7205\r
7206 @param ThunkContext A pointer to the context structure that describes the\r
7207 16-bit real mode code to call.\r
7208\r
7209**/\r
7210VOID\r
7211EFIAPI\r
7212AsmThunk16 (\r
7213 IN OUT THUNK_CONTEXT *ThunkContext\r
7214 );\r
7215\r
7216\r
7217/**\r
7218 Prepares all structures and code for a 16-bit real mode thunk, transfers\r
7219 control to a 16-bit real mode entry point, and returns the results.\r
7220\r
7221 Prepares all structures and code for a 16-bit real mode thunk, transfers\r
7222 control to a 16-bit real mode entry point, and returns the results. If the\r
7223 caller only need to perform a single 16-bit real mode thunk, then this\r
7224 service should be used. If the caller intends to make more than one 16-bit\r
7225 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r
7226 once and AsmThunk16() can be called for each 16-bit real mode thunk.\r
7227\r
17f695ed 7228 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r
ac644614 7229\r
7230 @param ThunkContext A pointer to the context structure that describes the\r
7231 16-bit real mode code to call.\r
7232\r
7233**/\r
7234VOID\r
7235EFIAPI\r
7236AsmPrepareAndThunk16 (\r
7237 IN OUT THUNK_CONTEXT *ThunkContext\r
7238 );\r
7239\r
ac644614 7240#endif\r
e3a7917f 7241#endif\r
ac644614 7242\r
7243\r
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