MdePkg: Add MmAccess and MmControl definition.

[mirror_edk2.git] / MdePkg / Include / Ppi / MmAccess.h

/** @file\r
  EFI MM Access PPI definition.\r
\r
  This PPI is used to control the visibility of the MMRAM on the platform.\r
  The EFI_PEI_MM_ACCESS_PPI abstracts the location and characteristics of MMRAM. The\r
  principal functionality found in the memory controller includes the following:\r
  - Exposing the MMRAM to all non-MM agents, or the "open" state\r
  - Shrouding the MMRAM to all but the MM agents, or the "closed" state\r
  - Preserving the system integrity, or "locking" the MMRAM, such that the settings cannot be\r
    perturbed by either boot service or runtime agents\r
\r
  Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
  @par Revision Reference:\r
  This PPI is introduced in PI Version 1.5.\r
\r
**/\r
\r
#ifndef _MM_ACCESS_PPI_H_\r
#define _MM_ACCESS_PPI_H_\r
\r
#define EFI_PEI_MM_ACCESS_PPI_GUID \\r
  { 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}\r
\r
typedef struct _EFI_PEI_MM_ACCESS_PPI  EFI_PEI_MM_ACCESS_PPI;\r
\r
/**\r
  Opens the MMRAM area to be accessible by a PEIM.\r
\r
  This function "opens" MMRAM so that it is visible while not inside of MM. The function should\r
  return EFI_UNSUPPORTED if the hardware does not support hiding of MMRAM. The function\r
  should return EFI_DEVICE_ERROR if the MMRAM configuration is locked.\r
\r
  @param  PeiServices            An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
  @param  This                   The EFI_PEI_MM_ACCESS_PPI instance.\r
  @param  DescriptorIndex        The region of MMRAM to Open.\r
\r
  @retval EFI_SUCCESS            The operation was successful.\r
  @retval EFI_UNSUPPORTED        The system does not support opening and closing of MMRAM.\r
  @retval EFI_DEVICE_ERROR       MMRAM cannot be opened, perhaps because it is locked.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_MM_OPEN)(\r
  IN EFI_PEI_SERVICES                **PeiServices,\r
  IN EFI_PEI_MM_ACCESS_PPI           *This,\r
  IN UINTN                           DescriptorIndex\r
  );\r
\r
/**\r
  Inhibits access to the MMRAM.\r
\r
  This function "closes" MMRAM so that it is not visible while outside of MM. The function should\r
  return EFI_UNSUPPORTED if the hardware does not support hiding of MMRAM.\r
\r
  @param  PeiServices            An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
  @param  This                   The EFI_PEI_MM_ACCESS_PPI instance.\r
  @param  DescriptorIndex        The region of MMRAM to Close.\r
\r
  @retval EFI_SUCCESS            The operation was successful.\r
  @retval EFI_UNSUPPORTED        The system does not support opening and closing of MMRAM.\r
  @retval EFI_DEVICE_ERROR       MMRAM cannot be closed.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_MM_CLOSE)(\r
  IN EFI_PEI_SERVICES                **PeiServices,\r
  IN EFI_PEI_MM_ACCESS_PPI           *This,\r
  IN UINTN                           DescriptorIndex\r
  );\r
\r
/**\r
  This function prohibits access to the MMRAM region. This function is usually implemented such\r
  that it is a write-once operation.\r
\r
  @param  PeiServices            An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
  @param  This                   The EFI_PEI_MM_ACCESS_PPI instance.\r
  @param  DescriptorIndex        The region of MMRAM to Lock.\r
\r
  @retval EFI_SUCCESS            The operation was successful.\r
  @retval EFI_UNSUPPORTED        The system does not support opening and closing of MMRAM.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_MM_LOCK)(\r
  IN EFI_PEI_SERVICES                **PeiServices,\r
  IN EFI_PEI_MM_ACCESS_PPI           *This,\r
  IN UINTN                           DescriptorIndex\r
  );\r
\r
/**\r
  Queries the memory controller for the possible regions that will support MMRAM.\r
\r
  This function describes the MMRAM regions.\r
  This data structure forms the contract between the MM_ACCESS and MM_IPL drivers. There is an\r
  ambiguity when any MMRAM region is remapped. For example, on some chipsets, some MMRAM\r
  regions can be initialized at one physical address but is later accessed at another processor address.\r
  There is currently no way for the MM IPL driver to know that it must use two different addresses\r
  depending on what it is trying to do. As a result, initial configuration and loading can use the\r
  physical address PhysicalStart while MMRAM is open. However, once the region has been\r
  closed and needs to be accessed by agents in MM, the CpuStart address must be used.\r
  This PPI publishes the available memory that the chipset can shroud for the use of installing code.\r
  These regions serve the dual purpose of describing which regions have been open, closed, or locked.\r
  In addition, these regions may include overlapping memory ranges, depending on the chipset\r
  implementation. The latter might include a chipset that supports T-SEG, where memory near the top\r
  of the physical DRAM can be allocated for MMRAM too.\r
  The key thing to note is that the regions that are described by the PPI are a subset of the capabilities\r
  of the hardware.\r
\r
  @param  PeiServices            An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
  @param  This                   The EFI_PEI_MM_ACCESS_PPI instance.\r
  @param  MmramMapSize           A pointer to the size, in bytes, of the MmramMemoryMap buffer. On input, this value is\r
                                 the size of the buffer that is allocated by the caller. On output, it is the size of the\r
                                 buffer that was returned by the firmware if the buffer was large enough, or, if the\r
                                 buffer was too small, the size of the buffer that is needed to contain the map.\r
  @param MmramMap                A pointer to the buffer in which firmware places the current memory map. The map is\r
                                 an array of EFI_MMRAM_DESCRIPTORs\r
\r
  @retval EFI_SUCCESS            The chipset supported the given resource.\r
  @retval EFI_BUFFER_TOO_SMALL   The MmramMap parameter was too small. The current\r
                                 buffer size needed to hold the memory map is returned in\r
                                 MmramMapSize.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_MM_CAPABILITIES)(\r
  IN EFI_PEI_SERVICES                **PeiServices,\r
  IN EFI_PEI_MM_ACCESS_PPI           *This,\r
  IN OUT UINTN                       *MmramMapSize,\r
  IN OUT EFI_MMRAM_DESCRIPTOR        *MmramMap\r
  );\r
\r
///\r
///  EFI MM Access PPI is used to control the visibility of the MMRAM on the platform.\r
///  It abstracts the location and characteristics of MMRAM. The platform should report\r
///  all MMRAM via EFI_PEI_MM_ACCESS_PPI. The expectation is that the north bridge or\r
///  memory controller would publish this PPI.\r
///\r
struct _EFI_PEI_MM_ACCESS_PPI {\r
  EFI_PEI_MM_OPEN          Open;\r
  EFI_PEI_MM_CLOSE         Close;\r
  EFI_PEI_MM_LOCK          Lock;\r
  EFI_PEI_MM_CAPABILITIES  GetCapabilities;\r
  BOOLEAN                  LockState;\r
  BOOLEAN                  OpenState;\r
};\r
\r
extern EFI_GUID gEfiPeiMmAccessPpiGuid;\r
\r
#endif\r