[mirror_edk2.git] / MdePkg / Include / Protocol / PciHostBridgeResourceAllocation.h

/** @file\r
  This file declares PCI Host Bridge Resource Allocation Protocol which \r
  provides the basic interfaces to abstract a PCI host bridge resource allocation. \r
  This protocol is mandatory if the system includes PCI devices.\r
  \r
  Copyright (c) 2007 - 2009, Intel Corporation\r
  All rights reserved. This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  This Protocol is defined in UEFI Platform Initialization Specification 1.2 \r
  Volume 5: Standards\r
  \r
**/\r
\r
#ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r
#define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r
\r
//\r
// This file must be included because EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
// uses EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS\r
//\r
#include <Protocol/PciRootBridgeIo.h>\r
\r
///\r
/// Global ID for the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
///\r
#define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \\r
  { \\r
    0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE } \\r
  }\r
\r
///\r
/// Forward declaration for EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
///\r
typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;\r
\r
/// If this bit is set, then the PCI Root Bridge does not\r
/// support separate windows for Non-prefetchable and Prefetchable\r
/// memory. A PCI bus driver needs to include requests for Prefetchable\r
/// memory in the Non-prefetchable memory pool.\r
///\r
#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM  1\r
\r
///\r
/// If this bit is set, then the PCI Root Bridge supports\r
/// 64 bit memory windows.  If this bit is not set,\r
/// the PCI bus driver needs to include requests for 64 bit\r
/// memory address in the corresponding 32 bit memory pool.\r
///\r
#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE   2\r
\r
///\r
/// A UINT64 value that contains the status of a PCI resource requested \r
/// in the Configuration parameter returned by GetProposedResources()\r
/// The legal values are EFI_RESOURCE_SATISFIED and EFI_RESOURCE_NOT_SATISFIED\r
///\r
typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;\r
\r
///\r
/// The request of this resource type could be fulfilled.  Used in the \r
/// Configuration parameter returned by GetProposedResources() to identify\r
/// a PCI resources request that can be satisfied.\r
///\r
#define EFI_RESOURCE_SATISFIED      0x0000000000000000ULL\r
\r
///\r
/// The request of this resource type could not be fulfilled for its\r
/// absence in the host bridge resource pool.  Used in the Configuration parameter \r
/// returned by GetProposedResources() to identify a PCI resources request that\r
/// can not be satisfied.\r
///\r
#define EFI_RESOURCE_NOT_SATISFIED  0xFFFFFFFFFFFFFFFFULL\r
\r
///\r
/// This  enum is used to specify the phase of the PCI enumaeration process\r
///\r
typedef enum {\r
  ///\r
  /// Reset the host bridge PCI apertures and internal data structures.\r
  /// PCI enumerator should issue this notification before starting fresh\r
  /// enumeration process. Enumeration cannot be restarted after sending\r
  /// any other notification such as EfiPciHostBridgeBeginBusAllocation.\r
  ///\r
  EfiPciHostBridgeBeginEnumeration,\r
\r
  ///\r
  /// The bus allocation phase is about to begin. No specific action\r
  /// is required here. This notification can be used to perform any\r
  /// chipset specific programming.  \r
  ///\r
  EfiPciHostBridgeBeginBusAllocation,\r
\r
  ///\r
  /// The bus allocation and bus programming phase is complete. No specific\r
  /// action is required here. This notification can be used to perform any\r
  /// chipset specific programming.  \r
  ///\r
  EfiPciHostBridgeEndBusAllocation,\r
  \r
  ///\r
  /// The resource allocation phase is about to begin.No specific action is\r
  /// required here. This notification can be used to perform any chipset specific programming.  \r
  ///\r
  EfiPciHostBridgeBeginResourceAllocation,\r
  \r
  ///\r
  /// Allocate resources per previously submitted requests for all the PCI Root\r
  /// Bridges. These resource settings are returned on the next call to\r
  /// GetProposedResources().  \r
  ///\r
  EfiPciHostBridgeAllocateResources,\r
  \r
  ///\r
  /// Program the Host Bridge hardware to decode previously allocated resources\r
  /// (proposed resources) for all the PCI Root Bridges.\r
  ///\r
  EfiPciHostBridgeSetResources,\r
  \r
  ///\r
  /// De-allocate previously allocated resources previously for all the PCI\r
  /// Root Bridges and reset the I/O and memory apertures to initial state.  \r
  ///\r
  EfiPciHostBridgeFreeResources,\r
  \r
  ///\r
  /// The resource allocation phase is completed.  No specific action is required\r
  /// here. This notification can be used to perform any chipset specific programming.  \r
  ///\r
  EfiPciHostBridgeEndResourceAllocation\r
} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;\r
\r
///\r
/// Definitions of 2 notification points.\r
///\r
typedef enum {\r
  ///\r
  /// This notification is only applicable to PCI-PCI bridges and\r
  /// indicates that the PCI enumerator is about to begin enumerating\r
  /// the bus behind the PCI-PCI Bridge. This notification is sent after\r
  /// the primary bus number, the secondary bus number and the subordinate\r
  /// bus number registers in the PCI-PCI Bridge are programmed to valid\r
  /// (not necessary final) values\r
  ///\r
  EfiPciBeforeChildBusEnumeration,\r
\r
  ///\r
  /// This notification is sent before the PCI enumerator probes BAR registers\r
  /// for every valid PCI function.  \r
  ///\r
  EfiPciBeforeResourceCollection\r
} EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;\r
\r
/**\r
  These are the notifications from the PCI bus driver that it is about to enter a certain phase of the PCI \r
  enumeration process.\r
\r
  @param[in] This    Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
                     instance.\r
  @param[in] Phase   The phase during enumeration\r
\r
  @retval EFI_SUCCESS             The notification was accepted without any errors.\r
  @retval EFI_INVALID_PARAMETER   The Phase is invalid.\r
  @retval EFI_NOT_READY           This phase cannot be entered at this time. For example, this error \r
                                  is valid for a Phase of EfiPciHostBridgeAllocateResources if \r
                                  SubmitResources() has not been called for one or more \r
                                  PCI root bridges before this call.\r
  @retval EFI_DEVICE_ERROR        Programming failed due to a hardware error. This error is valid for \r
                                  a Phase of EfiPciHostBridgeSetResources.\r
  @retval EFI_OUT_OF_RESOURCES    The request could not be completed due to a lack of resources. \r
                                  This error is valid for a Phase of EfiPciHostBridgeAllocateResources\r
                                  if the previously submitted resource requests cannot be fulfilled or were only \r
                                  partially fulfilled\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE)(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE     Phase\r
  );\r
\r
/**\r
  Returns the device handle of the next PCI root bridge that is associated with this host bridge.\r
\r
  @param[in]     This               Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
                                    instance.\r
  @param[in,out] RootBridgeHandle   Returns the device handle of the next PCI root bridge. On input, it holds the \r
                                    RootBridgeHandle that was returned by the most recent call to \r
                                    GetNextRootBridge(). If RootBridgeHandle is NULL on input, the handle \r
                                    for the first PCI root bridge is returned.\r
\r
  @retval EFI_SUCCESS             The requested attribute information was returned.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not an EFI_HANDLE that was returned \r
                                  on a previous call to GetNextRootBridge().\r
  @retval EFI_NOT_FOUND           There are no more PCI root bridge device handles.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE)(\r
  IN     EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,\r
  IN OUT EFI_HANDLE                                        *RootBridgeHandle\r
  );\r
\r
/**\r
  Returns the allocation attributes of a PCI root bridge.\r
\r
  @param[in]  This               Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
                                 instance.\r
  @param[in]  RootBridgeHandle   The device handle of the PCI root bridge in which the caller is interested.\r
  @param[out] Attribute          The pointer to attributes of the PCI root bridge.\r
\r
  @retval EFI_SUCCESS             The requested attribute information was returned.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not a valid root bridge handle.\r
  @retval EFI_INVALID_PARAMETER   Attributes is NULL.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES)(\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL   *This,\r
  IN  EFI_HANDLE                                         RootBridgeHandle,\r
  OUT UINT64                                             *Attributes\r
  );\r
\r
/**\r
  Sets up the specified PCI root bridge for the bus enumeration process.\r
\r
  @param[in]  This               Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
                                 instance.\r
  @param[in]  RootBridgeHandle   The PCI root bridge to be set up.\r
  @param[out] Configuration      Pointer to the pointer to the PCI bus resource descriptor.\r
\r
  @retval EFI_SUCCESS             The PCI root bridge was set up and the bus range was returned in \r
                                  Configuration.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not a valid root bridge handle.\r
  @retval EFI_DEVICE_ERROR        Programming failed due to a hardware error.\r
  @retval EFI_OUT_OF_RESOURCES    The request could not be completed due to a lack of resources.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION)(\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL   *This,\r
  IN  EFI_HANDLE                                         RootBridgeHandle,\r
  OUT VOID                                               **Configuration\r
  );\r
\r
/**\r
  Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.\r
\r
  @param[in] This               Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
                                instance.  \r
  @param[in] RootBridgeHandle   The PCI root bridge whose bus range is to be programmed.\r
  @param[in] Configuration      The pointer to the PCI bus resource descriptor..\r
\r
  @retval EFI_SUCCESS             The bus range for the PCI root bridge was programmed.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not a valid root bridge handle.\r
  @retval EFI_INVALID_PARAMETER   Configuration is NULL\r
  @retval EFI_INVALID_PARAMETER   Configuration does not point to a valid ACPI (2.0 & 3.0) \r
                                  resource descriptor.\r
  @retval EFI_INVALID_PARAMETER   Configuration does not include a valid ACPI 2.0 bus resource\r
                                  descriptor.\r
  @retval EFI_INVALID_PARAMETER   Configuration includes valid ACPI (2.0 & 3.0) resource \r
                                  descriptors other than bus descriptors.\r
  @retval EFI_INVALID_PARAMETER   Configuration contains one or more invalid ACPI resource \r
                                  descriptors.\r
  @retval EFI_INVALID_PARAMETER   "Address Range Minimum" is invalid for this root bridge.\r
  @retval EFI_INVALID_PARAMETER   "Address Range Length" is invalid for this root bridge.\r
  @retval EFI_DEVICE_ERROR        Programming failed due to a hardware error.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS)(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL   *This,\r
  IN EFI_HANDLE                                         RootBridgeHandle,\r
  IN VOID                                               *Configuration\r
  );\r
\r
/**\r
  Submits the I/O and memory resource requirements for the specified PCI root bridge.\r
\r
  @param[in] This               Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
                                instance.\r
  @param[in] RootBridgeHandle   The PCI root bridge whose I/O and memory resource requirements are being \r
                                submitted.\r
  @param[in] Configuration      The pointer to the PCI I/O and PCI memory resource descriptor.\r
\r
  @retval EFI_SUCCESS             The I/O and memory resource requests for a PCI root bridge were \r
                                  accepted.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not a valid root bridge handle.\r
  @retval EFI_INVALID_PARAMETER   Configuration is NULL.\r
  @retval EFI_INVALID_PARAMETER   Configuration does not point to a valid ACPI (2.0 & 3.0) \r
                                  resource descriptor.\r
  @retval EFI_INVALID_PARAMETER   Configuration includes requests for one or more resource \r
                                  types that are not supported by this PCI root bridge. This error will \r
                                  happen if the caller did not combine resources according to \r
                                  Attributes that were returned by GetAllocAttributes().\r
  @retval EFI_INVALID_PARAMETER   "Address Range Maximum" is invalid.\r
  @retval EFI_INVALID_PARAMETER   "Address Range Length" is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER   "Address Space Granularity" is invalid for this PCI root bridge.\r
  \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES)(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL   *This,\r
  IN EFI_HANDLE                                         RootBridgeHandle,\r
  IN VOID                                               *Configuration\r
  );\r
\r
/**\r
  Returns the proposed resource settings for the specified PCI root bridge.\r
\r
  @param[in]  This               Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
                                 instance.\r
  @param[in]  RootBridgeHandle   The PCI root bridge handle.\r
  @param[out] Configuration      The pointer to the pointer to the PCI I/O and memory resource descriptor.\r
\r
  @retval EFI_SUCCESS             The requested parameters were returned.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not a valid root bridge handle.\r
  @retval EFI_DEVICE_ERROR        Programming failed due to a hardware error.\r
  @retval EFI_OUT_OF_RESOURCES    The request could not be completed due to a lack of resources.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES)(\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,\r
  IN  EFI_HANDLE                                        RootBridgeHandle,\r
  OUT VOID                                              **Configuration\r
  );\r
\r
/**\r
  Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various \r
  stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual \r
  PCI controllers before enumeration.\r
\r
  @param[in]  This                  Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
  @param[in]  RootBridgeHandle      The associated PCI root bridge handle.\r
  @param[in]  PciAddress            The address of the PCI device on the PCI bus.\r
  @param[in]  Phase                 The phase of the PCI device enumeration.\r
\r
  @retval EFI_SUCCESS             The requested parameters were returned.\r
  @retval EFI_INVALID_PARAMETER   RootBridgeHandle is not a valid root bridge handle.\r
  @retval EFI_INVALID_PARAMETER   Phase is not a valid phase that is defined in \r
                                  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r
  @retval EFI_DEVICE_ERROR        Programming failed due to a hardware error. The PCI enumerator \r
                                  should not enumerate this device, including its child devices if it is \r
                                  a PCI-to-PCI bridge.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER)(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,\r
  IN EFI_HANDLE                                        RootBridgeHandle,\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS       PciAddress,\r
  IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE      Phase\r
  );\r
\r
///\r
/// Provides the basic interfaces to abstract a PCI host bridge resource allocation.\r
///\r
struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {\r
  ///\r
  /// The notification from the PCI bus enumerator that it is about to enter\r
  /// a certain phase during the enumeration process.\r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE           NotifyPhase;\r
  \r
  ///\r
  /// Retrieves the device handle for the next PCI root bridge that is produced by the\r
  /// host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached.  \r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE   GetNextRootBridge;\r
  \r
  ///\r
  /// Retrieves the allocation-related attributes of a PCI root bridge.\r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES         GetAllocAttributes;\r
  \r
  ///\r
  /// Sets up a PCI root bridge for bus enumeration.\r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION  StartBusEnumeration;\r
  \r
  ///\r
  /// Sets up the PCI root bridge so that it decodes a specific range of bus numbers.\r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS        SetBusNumbers;\r
  \r
  ///\r
  /// Submits the resource requirements for the specified PCI root bridge.\r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES       SubmitResources;\r
  \r
  ///\r
  /// Returns the proposed resource assignment for the specified PCI root bridges.\r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;\r
  \r
  ///\r
  /// Provides hooks from the PCI bus driver to every PCI controller\r
  /// (device/function) at various stages of the PCI enumeration process that\r
  /// allow the host bridge driver to preinitialize individual PCI controllers\r
  /// before enumeration.  \r
  ///\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER  PreprocessController;\r
};\r
\r
extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
73c31a3d	1	/** @file\r
	2	This file declares PCI Host Bridge Resource Allocation Protocol which \r
	3	provides the basic interfaces to abstract a PCI host bridge resource allocation. \r
	4	This protocol is mandatory if the system includes PCI devices.\r
	5	\r
	6	Copyright (c) 2007 - 2009, Intel Corporation\r
	7	All rights reserved. This program and the accompanying materials\r
	8	are licensed and made available under the terms and conditions of the BSD License\r
	9	which accompanies this distribution. The full text of the license may be found at\r
	10	http://opensource.org/licenses/bsd-license.php\r
	11	\r
	12	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	13	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	14	\r
	15	@par Revision Reference:\r
	16	This Protocol is defined in UEFI Platform Initialization Specification 1.2 \r
	17	Volume 5: Standards\r
	18	\r
	19	**/\r
	20	\r
	21	#ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r
	22	#define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r
	23	\r
	24	//\r
	25	// This file must be included because EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
	26	// uses EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS\r
	27	//\r
	28	#include <Protocol/PciRootBridgeIo.h>\r
	29	\r
	30	///\r
	31	/// Global ID for the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
	32	///\r
	33	#define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \\r
	34	{ \\r
	35	0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE } \\r
	36	}\r
	37	\r
	38	///\r
	39	/// Forward declaration for EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
	40	///\r
	41	typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;\r
	42	\r
	43	/// If this bit is set, then the PCI Root Bridge does not\r
	44	/// support separate windows for Non-prefetchable and Prefetchable\r
	45	/// memory. A PCI bus driver needs to include requests for Prefetchable\r
	46	/// memory in the Non-prefetchable memory pool.\r
	47	///\r
	48	#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1\r
	49	\r
	50	///\r
	51	/// If this bit is set, then the PCI Root Bridge supports\r
	52	/// 64 bit memory windows. If this bit is not set,\r
	53	/// the PCI bus driver needs to include requests for 64 bit\r
	54	/// memory address in the corresponding 32 bit memory pool.\r
	55	///\r
	56	#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2\r
	57	\r
	58	///\r
	59	/// A UINT64 value that contains the status of a PCI resource requested \r
	60	/// in the Configuration parameter returned by GetProposedResources()\r
	61	/// The legal values are EFI_RESOURCE_SATISFIED and EFI_RESOURCE_NOT_SATISFIED\r
	62	///\r
	63	typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;\r
	64	\r
65	///\r
66	/// The request of this resource type could be fulfilled. Used in the \r
67	/// Configuration parameter returned by GetProposedResources() to identify\r
68	/// a PCI resources request that can be satisfied.\r
69	///\r
70	#define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL\r
71	\r
72	///\r
73	/// The request of this resource type could not be fulfilled for its\r
74	/// absence in the host bridge resource pool. Used in the Configuration parameter \r
75	/// returned by GetProposedResources() to identify a PCI resources request that\r
76	/// can not be satisfied.\r
77	///\r
78	#define EFI_RESOURCE_NOT_SATISFIED 0xFFFFFFFFFFFFFFFFULL\r
79	\r
80	///\r
81	/// This enum is used to specify the phase of the PCI enumaeration process\r
82	///\r
83	typedef enum {\r
84	///\r
85	/// Reset the host bridge PCI apertures and internal data structures.\r
86	/// PCI enumerator should issue this notification before starting fresh\r
87	/// enumeration process. Enumeration cannot be restarted after sending\r
88	/// any other notification such as EfiPciHostBridgeBeginBusAllocation.\r
89	///\r
90	EfiPciHostBridgeBeginEnumeration,\r
91	\r
92	///\r
93	/// The bus allocation phase is about to begin. No specific action\r
94	/// is required here. This notification can be used to perform any\r
95	/// chipset specific programming. \r
96	///\r
97	EfiPciHostBridgeBeginBusAllocation,\r
98	\r
99	///\r
100	/// The bus allocation and bus programming phase is complete. No specific\r
101	/// action is required here. This notification can be used to perform any\r
102	/// chipset specific programming. \r
103	///\r
104	EfiPciHostBridgeEndBusAllocation,\r
105	\r
106	///\r
107	/// The resource allocation phase is about to begin.No specific action is\r
108	/// required here. This notification can be used to perform any chipset specific programming. \r
109	///\r
110	EfiPciHostBridgeBeginResourceAllocation,\r
111	\r
112	///\r
113	/// Allocate resources per previously submitted requests for all the PCI Root\r
114	/// Bridges. These resource settings are returned on the next call to\r
115	/// GetProposedResources(). \r
116	///\r
117	EfiPciHostBridgeAllocateResources,\r
118	\r
119	///\r
120	/// Program the Host Bridge hardware to decode previously allocated resources\r
121	/// (proposed resources) for all the PCI Root Bridges.\r
122	///\r
123	EfiPciHostBridgeSetResources,\r
124	\r
125	///\r
126	/// De-allocate previously allocated resources previously for all the PCI\r
127	/// Root Bridges and reset the I/O and memory apertures to initial state. \r
128	///\r
129	EfiPciHostBridgeFreeResources,\r
130	\r
131	///\r
132	/// The resource allocation phase is completed. No specific action is required\r
133	/// here. This notification can be used to perform any chipset specific programming. \r
134	///\r
135	EfiPciHostBridgeEndResourceAllocation\r
136	} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;\r
137	\r
138	///\r
139	/// Definitions of 2 notification points.\r
140	///\r
141	typedef enum {\r
142	///\r
143	/// This notification is only applicable to PCI-PCI bridges and\r
144	/// indicates that the PCI enumerator is about to begin enumerating\r
145	/// the bus behind the PCI-PCI Bridge. This notification is sent after\r
146	/// the primary bus number, the secondary bus number and the subordinate\r
147	/// bus number registers in the PCI-PCI Bridge are programmed to valid\r
148	/// (not necessary final) values\r
149	///\r
150	EfiPciBeforeChildBusEnumeration,\r
151	\r
152	///\r
153	/// This notification is sent before the PCI enumerator probes BAR registers\r
154	/// for every valid PCI function. \r
155	///\r
156	EfiPciBeforeResourceCollection\r
157	} EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;\r
158	\r
159	/**\r
160	These are the notifications from the PCI bus driver that it is about to enter a certain phase of the PCI \r
161	enumeration process.\r
162	\r
163	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
164	instance.\r
165	@param[in] Phase The phase during enumeration\r
166	\r
167	@retval EFI_SUCCESS The notification was accepted without any errors.\r
168	@retval EFI_INVALID_PARAMETER The Phase is invalid.\r
169	@retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error \r
170	is valid for a Phase of EfiPciHostBridgeAllocateResources if \r
171	SubmitResources() has not been called for one or more \r
172	PCI root bridges before this call.\r
173	@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid for \r
174	a Phase of EfiPciHostBridgeSetResources.\r
175	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. \r
176	This error is valid for a Phase of EfiPciHostBridgeAllocateResources\r
177	if the previously submitted resource requests cannot be fulfilled or were only \r
178	partially fulfilled\r
179	\r
180	**/\r
181	typedef\r
182	EFI_STATUS\r
183	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE)(\r
184	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
185	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r
186	);\r
187	\r
188	/**\r
189	Returns the device handle of the next PCI root bridge that is associated with this host bridge.\r
190	\r
191	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
192	instance.\r
193	@param[in,out] RootBridgeHandle Returns the device handle of the next PCI root bridge. On input, it holds the \r
194	RootBridgeHandle that was returned by the most recent call to \r
195	GetNextRootBridge(). If RootBridgeHandle is NULL on input, the handle \r
196	for the first PCI root bridge is returned.\r
197	\r
198	@retval EFI_SUCCESS The requested attribute information was returned.\r
199	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was returned \r
200	on a previous call to GetNextRootBridge().\r
201	@retval EFI_NOT_FOUND There are no more PCI root bridge device handles.\r
202	\r
203	**/\r
204	typedef\r
205	EFI_STATUS\r
206	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE)(\r
207	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
208	IN OUT EFI_HANDLE *RootBridgeHandle\r
209	);\r
210	\r
211	/**\r
212	Returns the allocation attributes of a PCI root bridge.\r
213	\r
214	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
215	instance.\r
216	@param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested.\r
217	@param[out] Attribute The pointer to attributes of the PCI root bridge.\r
218	\r
219	@retval EFI_SUCCESS The requested attribute information was returned.\r
220	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
221	@retval EFI_INVALID_PARAMETER Attributes is NULL.\r
222	\r
223	**/\r
224	typedef\r
225	EFI_STATUS\r
226	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES)(\r
227	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
228	IN EFI_HANDLE RootBridgeHandle,\r
229	OUT UINT64 *Attributes\r
230	);\r
231	\r
232	/**\r
233	Sets up the specified PCI root bridge for the bus enumeration process.\r
234	\r
235	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
236	instance.\r
237	@param[in] RootBridgeHandle The PCI root bridge to be set up.\r
238	@param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.\r
239	\r
240	@retval EFI_SUCCESS The PCI root bridge was set up and the bus range was returned in \r
241	Configuration.\r
242	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
243	@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
244	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
245	\r
246	**/\r
247	typedef\r
248	EFI_STATUS\r
249	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION)(\r
250	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
251	IN EFI_HANDLE RootBridgeHandle,\r
252	OUT VOID **Configuration\r
253	);\r
254	\r
255	/**\r
256	Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.\r
257	\r
258	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
259	instance. \r
260	@param[in] RootBridgeHandle The PCI root bridge whose bus range is to be programmed.\r
261	@param[in] Configuration The pointer to the PCI bus resource descriptor..\r
262	\r
263	@retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.\r
264	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
265	@retval EFI_INVALID_PARAMETER Configuration is NULL\r
266	@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI (2.0 & 3.0) \r
267	resource descriptor.\r
268	@retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource\r
269	descriptor.\r
270	@retval EFI_INVALID_PARAMETER Configuration includes valid ACPI (2.0 & 3.0) resource \r
271	descriptors other than bus descriptors.\r
272	@retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource \r
273	descriptors.\r
274	@retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.\r
275	@retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.\r
276	@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
277	\r
278	**/\r
279	typedef\r
280	EFI_STATUS\r
281	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS)(\r
282	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
283	IN EFI_HANDLE RootBridgeHandle,\r
284	IN VOID *Configuration\r
285	);\r
286	\r
287	/**\r
288	Submits the I/O and memory resource requirements for the specified PCI root bridge.\r
289	\r
290	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
291	instance.\r
292	@param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being \r
293	submitted.\r
294	@param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.\r
295	\r
296	@retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were \r
297	accepted.\r
298	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
299	@retval EFI_INVALID_PARAMETER Configuration is NULL.\r
300	@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI (2.0 & 3.0) \r
301	resource descriptor.\r
302	@retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource \r
303	types that are not supported by this PCI root bridge. This error will \r
304	happen if the caller did not combine resources according to \r
305	Attributes that were returned by GetAllocAttributes().\r
306	@retval EFI_INVALID_PARAMETER "Address Range Maximum" is invalid.\r
307	@retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.\r
308	@retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.\r
309	\r
310	**/\r
311	typedef\r
312	EFI_STATUS\r
313	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES)(\r
314	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
315	IN EFI_HANDLE RootBridgeHandle,\r
316	IN VOID *Configuration\r
317	);\r
318	\r
319	/**\r
320	Returns the proposed resource settings for the specified PCI root bridge.\r
321	\r
322	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
323	instance.\r
324	@param[in] RootBridgeHandle The PCI root bridge handle.\r
325	@param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.\r
326	\r
327	@retval EFI_SUCCESS The requested parameters were returned.\r
328	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
329	@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
330	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
331	\r
332	**/\r
333	typedef\r
334	EFI_STATUS\r
335	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES)(\r
336	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
337	IN EFI_HANDLE RootBridgeHandle,\r
338	OUT VOID **Configuration\r
339	);\r
340	\r
341	/**\r
342	Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various \r
343	stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual \r
344	PCI controllers before enumeration.\r
345	\r
346	@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
347	@param[in] RootBridgeHandle The associated PCI root bridge handle.\r
348	@param[in] PciAddress The address of the PCI device on the PCI bus.\r
349	@param[in] Phase The phase of the PCI device enumeration.\r
350	\r
351	@retval EFI_SUCCESS The requested parameters were returned.\r
352	@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
353	@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in \r
354	EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r
355	@retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator \r
356	should not enumerate this device, including its child devices if it is \r
357	a PCI-to-PCI bridge.\r
358	\r
359	**/\r
360	typedef\r
361	EFI_STATUS\r
362	(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER)(\r
363	IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
364	IN EFI_HANDLE RootBridgeHandle,\r
365	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
366	IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
367	);\r
368	\r
369	///\r
370	/// Provides the basic interfaces to abstract a PCI host bridge resource allocation.\r
371	///\r
372	struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {\r
373	///\r
374	/// The notification from the PCI bus enumerator that it is about to enter\r
375	/// a certain phase during the enumeration process.\r
376	///\r
377	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;\r
378	\r
379	///\r
380	/// Retrieves the device handle for the next PCI root bridge that is produced by the\r
381	/// host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached. \r
382	///\r
383	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;\r
384	\r
385	///\r
386	/// Retrieves the allocation-related attributes of a PCI root bridge.\r
387	///\r
388	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;\r
389	\r
390	///\r
391	/// Sets up a PCI root bridge for bus enumeration.\r
392	///\r
393	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;\r
394	\r
395	///\r
396	/// Sets up the PCI root bridge so that it decodes a specific range of bus numbers.\r
397	///\r
398	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;\r
399	\r
400	///\r
401	/// Submits the resource requirements for the specified PCI root bridge.\r
402	///\r
403	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;\r
404	\r
405	///\r
406	/// Returns the proposed resource assignment for the specified PCI root bridges.\r
407	///\r
408	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;\r
409	\r
410	///\r
411	/// Provides hooks from the PCI bus driver to every PCI controller\r
412	/// (device/function) at various stages of the PCI enumeration process that\r
413	/// allow the host bridge driver to preinitialize individual PCI controllers\r
414	/// before enumeration. \r
415	///\r
416	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;\r
417	};\r
418	\r
419	extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;\r
420	\r
421	#endif\r