MdePkg/BaseLib: Support IA32 processors without CLFLUSH
[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / FlushCacheLine.asm
CommitLineData
e1f414b6 1;------------------------------------------------------------------------------\r
2;\r
881813d7 3; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
bb817c56 4; This program and the accompanying materials\r
e1f414b6 5; are licensed and made available under the terms and conditions of the BSD License\r
6; which accompanies this distribution. The full text of the license may be found at\r
35a17154 7; http://opensource.org/licenses/bsd-license.php.\r
e1f414b6 8;\r
9; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11;\r
12; Module Name:\r
13;\r
14; FlushCacheLine.Asm\r
15;\r
16; Abstract:\r
17;\r
18; AsmFlushCacheLine function\r
19;\r
20; Notes:\r
21;\r
22;------------------------------------------------------------------------------\r
23\r
24 .586P\r
25 .model flat,C\r
26 .xmm\r
27 .code\r
28\r
29;------------------------------------------------------------------------------\r
30; VOID *\r
31; EFIAPI\r
32; AsmFlushCacheLine (\r
33; IN VOID *LinearAddress\r
34; );\r
35;------------------------------------------------------------------------------\r
36AsmFlushCacheLine PROC\r
881813d7
MK
37 ;\r
38 ; If the CPU does not support CLFLUSH instruction, \r
39 ; then promote flush range to flush entire cache.\r
40 ;\r
41 mov eax, 1\r
42 cpuid\r
e1f414b6 43 mov eax, [esp + 4]\r
881813d7
MK
44 test edx, BIT19\r
45 jz @F\r
e1f414b6 46 clflush [eax]\r
47 ret\r
881813d7
MK
48@@:\r
49 wbinvd\r
50 ret\r
e1f414b6 51AsmFlushCacheLine ENDP\r
52\r
53 END\r