UefiCpuPkg CpuCommonFeaturesLib: Remove CPU generation check

[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / Aesni.c

/** @file\r
  AESNI feature.\r
\r
  Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "CpuCommonFeatures.h"\r
\r
/**\r
  Prepares for the data used by CPU feature detection and initialization.\r
\r
  @param[in]  NumberOfProcessors  The number of CPUs in the platform.\r
\r
  @return  Pointer to a buffer of CPU related configuration data.\r
\r
  @note This service could be called by BSP only.\r
**/\r
VOID *\r
EFIAPI\r
AesniGetConfigData (\r
  IN UINTN  NumberOfProcessors\r
  )\r
{\r
  UINT64                            *ConfigData;\r
\r
  ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);\r
  ASSERT (ConfigData != NULL);\r
  return ConfigData;\r
}\r
\r
/**\r
  Detects if AESNI feature supported on current processor.\r
\r
  @param[in]  ProcessorNumber  The index of the CPU executing this function.\r
  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
                               structure for the CPU executing this function.\r
  @param[in]  ConfigData       A pointer to the configuration buffer returned\r
                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if\r
                               CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
                               RegisterCpuFeature().\r
\r
  @retval TRUE     AESNI feature is supported.\r
  @retval FALSE    AESNI feature is not supported.\r
\r
  @note This service could be called by BSP/APs.\r
**/\r
BOOLEAN\r
EFIAPI\r
AesniSupport (\r
  IN UINTN                             ProcessorNumber,\r
  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,\r
  IN VOID                              *ConfigData  OPTIONAL\r
  )\r
{\r
  MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER   *MsrFeatureConfig;\r
\r
  if (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1) {\r
    MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;\r
    ASSERT (MsrFeatureConfig != NULL);\r
    MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);\r
    return TRUE;\r
  }\r
  return FALSE;\r
}\r
\r
/**\r
  Initializes AESNI feature to specific state.\r
\r
  @param[in]  ProcessorNumber  The index of the CPU executing this function.\r
  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
                               structure for the CPU executing this function.\r
  @param[in]  ConfigData       A pointer to the configuration buffer returned\r
                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if\r
                               CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
                               RegisterCpuFeature().\r
  @param[in]  State            If TRUE, then the AESNI feature must be enabled.\r
                               If FALSE, then the AESNI feature must be disabled.\r
\r
  @retval RETURN_SUCCESS       AESNI feature is initialized.\r
\r
  @note This service could be called by BSP only.\r
**/\r
RETURN_STATUS\r
EFIAPI\r
AesniInitialize (\r
  IN UINTN                             ProcessorNumber,\r
  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,\r
  IN VOID                              *ConfigData,  OPTIONAL\r
  IN BOOLEAN                           State\r
  )\r
{\r
  MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER   *MsrFeatureConfig;\r
\r
  //\r
  // SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,\r
  // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here\r
  //\r
  // The scope of the MSR_SANDY_BRIDGE_FEATURE_CONFIG is Core, only program MSR_FEATURE_CONFIG for thread 0\r
  // of each core. Otherwise, once a thread in the core disabled AES, the other thread will cause GP when\r
  // programming it.\r
  //\r
  if (CpuInfo->ProcessorInfo.Location.Thread == 0) {\r
    MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;\r
    ASSERT (MsrFeatureConfig != NULL);\r
    if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {\r
      CPU_REGISTER_TABLE_WRITE_FIELD (\r
        ProcessorNumber,\r
        Msr,\r
        MSR_SANDY_BRIDGE_FEATURE_CONFIG,\r
        MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER,\r
        Bits.AESConfiguration,\r
        BIT0 | ((State) ? 0 : BIT1)\r
        );\r
    }\r
  }\r
  return RETURN_SUCCESS;\r
}\r