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3cbfba02 DW |
1 | \r |
2 | /*++\r | |
3 | \r | |
4 | Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r | |
5 | \r | |
6 | This program and the accompanying materials are licensed and made available under\r | |
7 | the terms and conditions of the BSD License that accompanies this distribution.\r | |
8 | The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php.\r | |
10 | \r | |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
13 | \r | |
14 | \r | |
15 | \r | |
16 | Module Name:\r | |
17 | \r | |
18 | Valleyview.h\r | |
19 | \r | |
20 | Abstract:\r | |
21 | \r | |
22 | This header file provides common definitions just for Valleyview-SOC using to avoid including extra module's file.\r | |
23 | --*/\r | |
24 | \r | |
25 | #ifndef _MC_H_INCLUDED_\r | |
26 | #define _MC_H_INCLUDED_\r | |
27 | /*\r | |
28 | < Extended Configuration Base Address.*/\r | |
29 | #define EC_BASE 0xE0000000\r | |
30 | \r | |
31 | //\r | |
32 | // DEVICE 0 (Memroy Controller Hub)\r | |
33 | //\r | |
34 | #define MC_BUS 0x00\r | |
35 | #define MC_DEV 0x00\r | |
36 | #define MC_DEV2 0x02\r | |
37 | #define MC_FUN 0x00\r | |
38 | // NC DEV 0 Vendor and Device IDs\r | |
39 | #define MC_VID 0x8086\r | |
40 | #define MC_DID_OFFSET 0x2 //Device Identification\r | |
41 | #define MC_GGC_OFFSET 0x50 //GMCH Graphics Control Register\r | |
42 | \r | |
43 | //\r | |
44 | // Device 2 Register Equates\r | |
45 | //\r | |
46 | #define IGD_BUS 0x00\r | |
47 | #define IGD_DEV 0x02\r | |
48 | #define IGD_FUN_0 0x00\r | |
49 | #define IGD_FUN_1 0x01\r | |
50 | #define IGD_DEV_FUN (IGD_DEV << 3)\r | |
51 | #define IGD_BUS_DEV_FUN (MC_BUS << 8) + IGD_DEV_FUN\r | |
52 | #define IGD_VID 0x8086\r | |
53 | #define IGD_DID 0xA001\r | |
54 | #define IGD_MGGC_OFFSET 0x0050 //GMCH Graphics Control Register 0x50\r | |
55 | #define IGD_BSM_OFFSET 0x005C //Base of Stolen Memory\r | |
56 | #define IGD_SWSCI_OFFSET 0x00E0 //Software SCI 0xE0 2\r | |
57 | #define IGD_ASLE_OFFSET 0x00E4 //System Display Event Register 0xE4 4\r | |
58 | #define IGD_ASLS_OFFSET 0x00FC // ASL Storage\r | |
59 | #define IGD_DID_QS 0x0BE2 //RCOverride -a: Fix the DID error\r | |
60 | \r | |
61 | #endif\r |