[mirror_edk2.git] / Vlv2TbltDevicePkg / Library / CpuIA32Lib / IA32 / CpuIA32.S

#\r
#\r
# Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved\r
#                                                                                  \r\r
# This program and the accompanying materials are licensed and made available under\r\r
# the terms and conditions of the BSD License that accompanies this distribution.  \r\r
# The full text of the license may be found at                                     \r\r
# http://opensource.org/licenses/bsd-license.php.                                  \r\r
#                                                                                  \r\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            \r\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    \r\r
#                                                                                  \r\r
#\r
#\r
#Module Name:\r
#\r
#  CpuIA32.c\r
#\r
#Abstract:\r
#\r
#--*/\r
\r
##include "CpuIA32.h"\r
#include "EfiBind.h"\r
\r
#---------------------------------------------------------------------------\r
    .586p:\r
    #.MODEL flat,C\r
    .code:\r
\r
#---------------------------------------------------------------------------\r
\r
.globl ASM_PFX(EfiHalt)\r
.globl ASM_PFX(EfiWbinvd)\r
.globl ASM_PFX(EfiInvd)\r
.globl ASM_PFX(EfiCpuid)\r
.globl ASM_PFX(EfiReadMsr)\r
.globl ASM_PFX(EfiWriteMsr)\r
.globl ASM_PFX(EfiReadTsc)\r
.globl ASM_PFX(EfiDisableCache)\r
.globl ASM_PFX(EfiEnableCache)\r
.globl ASM_PFX(EfiGetEflags)\r
.globl ASM_PFX(EfiDisableInterrupts)\r
.globl ASM_PFX(EfiEnableInterrupts)\r
.globl ASM_PFX(EfiCpuidExt)\r
\r
\r
#VOID\r
#EfiHalt (\r
#  VOID\r
#)\r
ASM_PFX(EfiHalt):\r
    hlt\r
    ret\r
#EfiHalt ENDP\r
\r
#VOID\r
#EfiWbinvd (\r
#  VOID\r
#)\r
ASM_PFX(EfiWbinvd):\r
    wbinvd\r
    ret\r
#EfiWbinvd ENDP\r
\r
#VOID\r
#EfiInvd (\r
# VOID\r
#)\r
ASM_PFX(EfiInvd):\r
    invd\r
    ret\r
#EfiInvd ENDP\r
\r
#VOID\r
#EfiCpuid (IN UINT32 RegisterInEax,\r
#          OUT EFI_CPUID_REGISTER *Reg OPTIONAL)\r
ASM_PFX(EfiCpuid):\r
    pushl %ebp\r
    movl %esp, %ebp\r
    pushl %ebx\r
    pushl %esi\r
    pushl %edi\r
    pushal\r
\r
    movl   8(%ebp), %eax           #RegisterInEax\r
    cpuid\r
    cmpl   $0, 0xC(%ebp)           # Reg\r
    je     L1\r
    movl        0xC(%ebp), %edi         # Reg\r
\r
    movl        %eax, (%edi)        # Reg->RegEax\r
    movl        %ebx, 4(%edi)         # Reg->RegEbx\r
    movl        %ecx, 8(%edi)         # Reg->RegEcx\r
    movl        %edx, 0xC(%edi)         # Reg->RegEdx\r
\r
L1:\r
    popal\r
    popl        %edi\r
    popl        %esi\r
    popl        %ebx\r
    popl        %ebp\r
\r
    ret\r
#EfiCpuid ENDP\r
\r
\r
#UINT64\r
#EfiReadMsr (\r
#  IN UINT32 Index\r
#  );\r
ASM_PFX(EfiReadMsr):\r
    movl   4(%esp), %ecx           # Index\r
    rdmsr\r
    ret\r
#EfiReadMsr ENDP\r
\r
#VOID\r
#EfiWriteMsr (\r
#  IN   UINT32  Index,\r
#  IN   UINT64  Value\r
#  );\r
ASM_PFX(EfiWriteMsr):\r
    movl   4(%esp), %ecx         # Index\r
    movl   8(%esp), %eax         # DWORD PTR Value[0]\r
    movl   0xC(%esp), %edx         # DWORD PTR Value[4]\r
    wrmsr\r
    ret\r
#EfiWriteMsr ENDP\r
\r
#UINT64\r
#EfiReadTsc (\r
#  VOID\r
#  )\r
ASM_PFX(EfiReadTsc):\r
    rdtsc\r
    ret\r
#EfiReadTsc ENDP\r
\r
#VOID\r
#EfiDisableCache (\r
#  VOID\r
#)\r
ASM_PFX(EfiDisableCache):\r
    movl  %cr0, %eax\r
    bswapl %eax\r
    andb  $0x60, %al\r
    cmpb  $0x60, %al\r
    je    L2\r
    movl  %cr0, %eax\r
    orl   $0x60000000, %eax\r
    movl  %eax, %cr0\r
    wbinvd\r
L2:\r
    ret\r
#EfiDisableCache ENDP\r
\r
#VOID\r
#EfiEnableCache (\r
#  VOID\r
#  )\r
ASM_PFX(EfiEnableCache):\r
    wbinvd\r
    movl  %cr0, %eax\r
    andl  $0x9fffffff, %eax\r
    movl  %eax, %cr0\r
    ret\r
#EfiEnableCache ENDP\r
\r
#UINT32\r
#EfiGetEflags (\r
#  VOID\r
#  )\r
ASM_PFX(EfiGetEflags):\r
    pushfl\r
    popl %eax\r
    ret\r
#EfiGetEflags ENDP\r
\r
#VOID\r
#EfiDisableInterrupts (\r
#  VOID\r
#  )\r
ASM_PFX(EfiDisableInterrupts):\r
    cli\r
    ret\r
#EfiDisableInterrupts ENDP\r
\r
#VOID\r
#EfiEnableInterrupts (\r
#  VOID\r
#  )\r
ASM_PFX(EfiEnableInterrupts):\r
    sti\r
    ret\r
#EfiEnableInterrupts ENDP\r
\r
#VOID\r
#EfiCpuidExt (\r
#  IN   UINT32              RegisterInEax,\r
#  IN   UINT32              CacheLevel,\r
#  OUT  EFI_CPUID_REGISTER  *Regs\r
#  )\r
ASM_PFX(EfiCpuidExt):\r
    push   %ebx\r
    push   %edi\r
    push   %esi\r
    pushal\r
\r
    movl   0x30(%esp), %eax           # RegisterInEax\r
    movl   0x34(%esp), %ecx           # CacheLevel\r
    cpuid\r
    movl   0x38(%esp), %edi           # DWORD PTR Regs\r
\r
    movl   %eax, (%edi)                 # Reg->RegEax\r
    movl   %ebx, 4(%edi)                # Reg->RegEbx\r
    movl   %ecx, 8(%edi)                # Reg->RegEcx\r
    movl   %edx, 0xC(%edi)              # Reg->RegEdx\r
\r
    popal\r
    pop    %esi\r
    pop    %edi\r
    pop    %ebx\r
    ret\r
#EfiCpuidExt ENDP\r
\r
\r
\r
Commit	Line	Data
3cbfba02 DW	1	#\r
	2	#\r
	3	# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
	4	# \r\r
	5	# This program and the accompanying materials are licensed and made available under\r\r
	6	# the terms and conditions of the BSD License that accompanies this distribution. \r\r
	7	# The full text of the license may be found at \r\r
	8	# http://opensource.org/licenses/bsd-license.php. \r\r
	9	# \r\r
	10	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
	11	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
	12	# \r\r
	13	#\r
	14	#\r
	15	#Module Name:\r
	16	#\r
	17	# CpuIA32.c\r
	18	#\r
	19	#Abstract:\r
	20	#\r
	21	#--*/\r
	22	\r
	23	##include "CpuIA32.h"\r
	24	#include "EfiBind.h"\r
	25	\r
	26	#---------------------------------------------------------------------------\r
	27	.586p:\r
	28	#.MODEL flat,C\r
	29	.code:\r
	30	\r
	31	#---------------------------------------------------------------------------\r
	32	\r
	33	.globl ASM_PFX(EfiHalt)\r
	34	.globl ASM_PFX(EfiWbinvd)\r
	35	.globl ASM_PFX(EfiInvd)\r
	36	.globl ASM_PFX(EfiCpuid)\r
	37	.globl ASM_PFX(EfiReadMsr)\r
	38	.globl ASM_PFX(EfiWriteMsr)\r
	39	.globl ASM_PFX(EfiReadTsc)\r
	40	.globl ASM_PFX(EfiDisableCache)\r
	41	.globl ASM_PFX(EfiEnableCache)\r
	42	.globl ASM_PFX(EfiGetEflags)\r
	43	.globl ASM_PFX(EfiDisableInterrupts)\r
	44	.globl ASM_PFX(EfiEnableInterrupts)\r
	45	.globl ASM_PFX(EfiCpuidExt)\r
	46	\r
	47	\r
	48	#VOID\r
	49	#EfiHalt (\r
	50	# VOID\r
	51	#)\r
	52	ASM_PFX(EfiHalt):\r
	53	hlt\r
	54	ret\r
	55	#EfiHalt ENDP\r
	56	\r
	57	#VOID\r
	58	#EfiWbinvd (\r
	59	# VOID\r
	60	#)\r
	61	ASM_PFX(EfiWbinvd):\r
	62	wbinvd\r
	63	ret\r
	64	#EfiWbinvd ENDP\r
65	\r
66	#VOID\r
67	#EfiInvd (\r
68	# VOID\r
69	#)\r
70	ASM_PFX(EfiInvd):\r
71	invd\r
72	ret\r
73	#EfiInvd ENDP\r
74	\r
75	#VOID\r
76	#EfiCpuid (IN UINT32 RegisterInEax,\r
77	# OUT EFI_CPUID_REGISTER *Reg OPTIONAL)\r
78	ASM_PFX(EfiCpuid):\r
79	pushl %ebp\r
80	movl %esp, %ebp\r
81	pushl %ebx\r
82	pushl %esi\r
83	pushl %edi\r
84	pushal\r
85	\r
86	movl 8(%ebp), %eax #RegisterInEax\r
87	cpuid\r
88	cmpl $0, 0xC(%ebp) # Reg\r
89	je L1\r
90	movl 0xC(%ebp), %edi # Reg\r
91	\r
92	movl %eax, (%edi) # Reg->RegEax\r
93	movl %ebx, 4(%edi) # Reg->RegEbx\r
94	movl %ecx, 8(%edi) # Reg->RegEcx\r
95	movl %edx, 0xC(%edi) # Reg->RegEdx\r
96	\r
97	L1:\r
98	popal\r
99	popl %edi\r
100	popl %esi\r
101	popl %ebx\r
102	popl %ebp\r
103	\r
104	ret\r
105	#EfiCpuid ENDP\r
106	\r
107	\r
108	#UINT64\r
109	#EfiReadMsr (\r
110	# IN UINT32 Index\r
111	# );\r
112	ASM_PFX(EfiReadMsr):\r
113	movl 4(%esp), %ecx # Index\r
114	rdmsr\r
115	ret\r
116	#EfiReadMsr ENDP\r
117	\r
118	#VOID\r
119	#EfiWriteMsr (\r
120	# IN UINT32 Index,\r
121	# IN UINT64 Value\r
122	# );\r
123	ASM_PFX(EfiWriteMsr):\r
124	movl 4(%esp), %ecx # Index\r
125	movl 8(%esp), %eax # DWORD PTR Value[0]\r
126	movl 0xC(%esp), %edx # DWORD PTR Value[4]\r
127	wrmsr\r
128	ret\r
129	#EfiWriteMsr ENDP\r
130	\r
131	#UINT64\r
132	#EfiReadTsc (\r
133	# VOID\r
134	# )\r
135	ASM_PFX(EfiReadTsc):\r
136	rdtsc\r
137	ret\r
138	#EfiReadTsc ENDP\r
139	\r
140	#VOID\r
141	#EfiDisableCache (\r
142	# VOID\r
143	#)\r
144	ASM_PFX(EfiDisableCache):\r
145	movl %cr0, %eax\r
146	bswapl %eax\r
147	andb $0x60, %al\r
148	cmpb $0x60, %al\r
149	je L2\r
150	movl %cr0, %eax\r
151	orl $0x60000000, %eax\r
152	movl %eax, %cr0\r
153	wbinvd\r
154	L2:\r
155	ret\r
156	#EfiDisableCache ENDP\r
157	\r
158	#VOID\r
159	#EfiEnableCache (\r
160	# VOID\r
161	# )\r
162	ASM_PFX(EfiEnableCache):\r
163	wbinvd\r
164	movl %cr0, %eax\r
165	andl $0x9fffffff, %eax\r
166	movl %eax, %cr0\r
167	ret\r
168	#EfiEnableCache ENDP\r
169	\r
170	#UINT32\r
171	#EfiGetEflags (\r
172	# VOID\r
173	# )\r
174	ASM_PFX(EfiGetEflags):\r
175	pushfl\r
176	popl %eax\r
177	ret\r
178	#EfiGetEflags ENDP\r
179	\r
180	#VOID\r
181	#EfiDisableInterrupts (\r
182	# VOID\r
183	# )\r
184	ASM_PFX(EfiDisableInterrupts):\r
185	cli\r
186	ret\r
187	#EfiDisableInterrupts ENDP\r
188	\r
189	#VOID\r
190	#EfiEnableInterrupts (\r
191	# VOID\r
192	# )\r
193	ASM_PFX(EfiEnableInterrupts):\r
194	sti\r
195	ret\r
196	#EfiEnableInterrupts ENDP\r
197	\r
198	#VOID\r
199	#EfiCpuidExt (\r
200	# IN UINT32 RegisterInEax,\r
201	# IN UINT32 CacheLevel,\r
202	# OUT EFI_CPUID_REGISTER *Regs\r
203	# )\r
204	ASM_PFX(EfiCpuidExt):\r
205	push %ebx\r
206	push %edi\r
207	push %esi\r
208	pushal\r
209	\r
210	movl 0x30(%esp), %eax # RegisterInEax\r
211	movl 0x34(%esp), %ecx # CacheLevel\r
212	cpuid\r
213	movl 0x38(%esp), %edi # DWORD PTR Regs\r
214	\r
215	movl %eax, (%edi) # Reg->RegEax\r
216	movl %ebx, 4(%edi) # Reg->RegEbx\r
217	movl %ecx, 8(%edi) # Reg->RegEcx\r
218	movl %edx, 0xC(%edi) # Reg->RegEdx\r
219	\r
220	popal\r
221	pop %esi\r
222	pop %edi\r
223	pop %ebx\r
224	ret\r
225	#EfiCpuidExt ENDP\r
226	\r
227	\r
228	\r