]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2TbltDevicePkg/PlatformDxe/Platform.c
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
IntelFrameworkModulePkg: Refine casting expression result to bigger size
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformDxe / Platform.c
CommitLineData
3cbfba02
DW		 1/** @file\r
2\r
d71c25cf
DW		 3 Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>\r
4 \r
5\r
6 This program and the accompanying materials are licensed and made available under\r
7\r
8 the terms and conditions of the BSD License that accompanies this distribution. \r
9\r
10 The full text of the license may be found at \r
11\r
12 http://opensource.org/licenses/bsd-license.php. \r
13\r
14 \r
15\r
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
17\r
18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
19\r
20 \r
21\r
3cbfba02
DW		 22\r
23Module Name:\r
24\r
25\r
26 Platform.c\r
27\r
28Abstract:\r
29\r
30 Platform Initialization Driver.\r
31\r
32\r
33--*/\r
34\r
35#include "PlatformDxe.h"\r
36#include "Platform.h"\r
37#include "PchCommonDefinitions.h"\r
38#include <Protocol/UsbPolicy.h>\r
39#include <Protocol/PchPlatformPolicy.h>\r
40#include <Protocol/TpmMp.h>\r
41#include <Protocol/CpuIo2.h>\r
42#include <Library/S3BootScriptLib.h>\r
43#include <Guid/PciLanInfo.h>\r
44#include <Guid/ItkData.h>\r
45#include <Library/PciLib.h>\r
46#include <PlatformBootMode.h>\r
47#include <Guid/EventGroup.h>\r
48#include <Guid/Vlv2Variable.h>\r
49#include <Protocol/GlobalNvsArea.h>\r
50#include <Protocol/IgdOpRegion.h>\r
51#include <Library/PcdLib.h>\r
620f2891
TH		 52#include <Protocol/VariableLock.h>\r
53\r
3cbfba02
DW		 54\r
55//\r
56// VLV2 GPIO GROUP OFFSET\r
57//\r
58#define GPIO_SCORE_OFFSET 0x0000\r
59#define GPIO_NCORE_OFFSET 0x1000\r
60#define GPIO_SSUS_OFFSET 0x2000\r
61\r
62typedef struct {\r
63 UINT32 offset;\r
64 UINT32 val;\r
65} CFIO_PNP_INIT;\r
66\r
67GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] =\r
68{\r
69// Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset\r
70 GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS ,NA ,F0 , , ,NONE ,0x47),\r
71 GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS ,NA ,F0 , , ,NONE ,0x41),\r
72};\r
73\r
74\r
75EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID;\r
76EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID;\r
77SYSTEM_CONFIGURATION mSystemConfiguration;\r
78SYSTEM_PASSWORDS mSystemPassword;\r
79EFI_HANDLE mImageHandle;\r
80BOOLEAN mMfgMode = FALSE;\r
81VOID *mDxePlatformStringPack;\r
82UINT32 mPlatformBootMode = PLATFORM_NORMAL_MODE;\r
83extern CHAR16 gItkDataVarName[];\r
84\r
85\r
86EFI_PLATFORM_INFO_HOB mPlatformInfo;\r
87EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo;\r
88EFI_EVENT mReadyToBootEvent;\r
89\r
90UINT8 mSmbusRsvdAddresses[] = PLATFORM_SMBUS_RSVD_ADDRESSES;\r
91UINT8 mNumberSmbusAddress = sizeof( mSmbusRsvdAddresses ) / sizeof( mSmbusRsvdAddresses[0] );\r
92UINT32 mSubsystemVidDid;\r
93UINT32 mSubsystemAudioVidDid;\r
94\r
95UINTN mPciLanCount = 0;\r
96VOID *mPciLanInfo = NULL;\r
97UINTN SpiBase;\r
98\r
99static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface = {\r
100 ProgramToneFrequency,\r
101 GenerateBeepTone\r
102};\r
103\r
104EFI_USB_POLICY_PROTOCOL mUsbPolicyData = {0};\r
105\r
106\r
107CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service[] =\r
108{\r
109 {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0\r
110 {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0\r
111 {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0\r
112 {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0\r
113 {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0\r
114 {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0\r
115 {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0\r
116 {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0\r
117 {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0\r
118 {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val\r
119 {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val\r
120 {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val\r
121 {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val\r
122 {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val\r
123 {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val\r
124 {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val\r
125 {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val\r
126 {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val\r
127};\r
128\r
129VOID\r
130EfiOrMem (\r
131 IN VOID *Destination,\r
132 IN VOID *Source,\r
133 IN UINTN Length\r
134 );\r
135\r
136#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
137STATIC\r
138VOID\r
139InitFirmwareId();\r
140#endif\r
141\r
142\r
143VOID\r
144InitializeClockRouting(\r
145 );\r
146\r
147VOID\r
148InitializeSlotInfo (\r
149 );\r
150\r
151#if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r
152VOID\r
153InitializeSensorInfoVariable (\r
154 );\r
155#endif\r
156\r
157VOID\r
158InitTcoReset (\r
159 );\r
160\r
161VOID\r
162InitExI ();\r
163\r
164VOID\r
165InitItk();\r
166\r
167VOID\r
168InitPlatformBootMode();\r
169\r
170VOID\r
171InitMfgAndConfigModeStateVar();\r
172\r
173VOID\r
174InitPchPlatformPolicy (\r
175 IN EFI_PLATFORM_INFO_HOB *PlatformInfo\r
176 );\r
177\r
178VOID\r
179InitVlvPlatformPolicy (\r
180 );\r
181\r
182VOID\r
183InitSioPlatformPolicy(\r
184 );\r
185\r
186VOID\r
187PchInitBeforeBoot(\r
188 );\r
189\r
190VOID\r
191UpdateDVMTSetup(\r
192 );\r
193\r
194VOID\r
195InitPlatformUsbPolicy (\r
196 VOID\r
197 );\r
198\r
199VOID\r
200InitRC6Policy(\r
201 VOID\r
202 );\r
203\r
204\r
620f2891
TH		 205EFI_STATUS\r
206EFIAPI\r
207SaveSetupRecoveryVar(\r
208 VOID\r
209 )\r
210{\r
211 EFI_STATUS Status = EFI_SUCCESS;\r
212 UINTN SizeOfNvStore = 0;\r
213 UINTN SizeOfSetupVar = 0;\r
214 SYSTEM_CONFIGURATION *SetupData = NULL;\r
215 SYSTEM_CONFIGURATION *RecoveryNvData = NULL;\r
216 EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock = NULL;\r
217\r
218\r
219 DEBUG ((EFI_D_INFO, "SaveSetupRecoveryVar() Entry \n"));\r
220 SizeOfNvStore = sizeof(SYSTEM_CONFIGURATION);\r
221 RecoveryNvData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r
222 if (NULL == RecoveryNvData) {\r
223 Status = EFI_OUT_OF_RESOURCES;\r
224 goto Exit; \r
225 }\r
226 \r
227 Status = gRT->GetVariable(\r
228 L"SetupRecovery",\r
229 &gEfiNormalSetupGuid,\r
230 NULL,\r
231 &SizeOfNvStore,\r
232 RecoveryNvData\r
233 );\r
234 \r
235 if (EFI_ERROR (Status)) {\r
236 // Don't find the "SetupRecovery" variable.\r
237 // have to copy "Setup" variable to "SetupRecovery" variable.\r
238 SetupData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r
239 if (NULL == SetupData) {\r
240 Status = EFI_OUT_OF_RESOURCES;\r
241 goto Exit; \r
242 }\r
243 SizeOfSetupVar = sizeof(SYSTEM_CONFIGURATION);\r
244 Status = gRT->GetVariable(\r
245 NORMAL_SETUP_NAME,\r
246 &gEfiNormalSetupGuid,\r
247 NULL,\r
248 &SizeOfSetupVar,\r
249 SetupData\r
250 );\r
251 ASSERT_EFI_ERROR (Status);\r
252 \r
253 Status = gRT->SetVariable (\r
254 L"SetupRecovery",\r
255 &gEfiNormalSetupGuid,\r
256 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
257 sizeof(SYSTEM_CONFIGURATION),\r
258 SetupData\r
259 );\r
260 ASSERT_EFI_ERROR (Status);\r
261\r
262 Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **) &VariableLock);\r
263 if (!EFI_ERROR (Status)) {\r
264 Status = VariableLock->RequestToLock (VariableLock, L"SetupRecovery", &gEfiNormalSetupGuid);\r
265 ASSERT_EFI_ERROR (Status);\r
266 }\r
267 \r
268 }\r
269\r
270Exit:\r
271 if (RecoveryNvData)\r
272 FreePool (RecoveryNvData);\r
273 if (SetupData)\r
274 FreePool (SetupData);\r
275 \r
276 return Status;\r
277 \r
278}\r
279\r
280\r
3cbfba02
DW		 281VOID\r
282TristateLpcGpioConfig (\r
283 IN UINT32 Gpio_Mmio_Offset,\r
284 IN UINT32 Gpio_Pin_Num,\r
285 GPIO_CONF_PAD_INIT* Gpio_Conf_Data\r
286 )\r
287\r
288{\r
289 UINT32 index;\r
290 UINT32 mmio_conf0;\r
291 UINT32 mmio_padval;\r
292 PAD_CONF0 conf0_val;\r
293 PAD_VAL pad_val;\r
294\r
295 //\r
296 // GPIO WELL -- Memory base registers\r
297 //\r
298\r
299 //\r
300 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r
301 // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900\r
302 //\r
303\r
304 for(index=0; index < Gpio_Pin_Num; index++)\r
305 {\r
306 //\r
307 // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.\r
308 //\r
309 mmio_conf0 = IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_CONF0 + Gpio_Conf_Data[index].offset * 16;\r
310 mmio_padval= IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_VAL + Gpio_Conf_Data[index].offset * 16;\r
311\r
312#ifdef EFI_DEBUG\r
313 DEBUG ((EFI_D_INFO, "%s, ", Gpio_Conf_Data[index].pad_name));\r
314\r
315#endif\r
316 DEBUG ((EFI_D_INFO, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",\r
317 Gpio_Conf_Data[index].usage,\r
318 Gpio_Conf_Data[index].func,\r
319 Gpio_Conf_Data[index].int_type,\r
320 Gpio_Conf_Data[index].pull,\r
321 mmio_conf0));\r
322\r
323 //\r
324 // Step 1: PadVal Programming\r
325 //\r
326 pad_val.dw = MmioRead32(mmio_padval);\r
327\r
328 //\r
329 // Config PAD_VAL only for GPIO (Non-Native) Pin\r
330 //\r
331 if(Native != Gpio_Conf_Data[index].usage)\r
332 {\r
333 pad_val.dw &= ~0x6; // Clear bits 1:2\r
334 pad_val.dw |= (Gpio_Conf_Data[index].usage & 0x6); // Set bits 1:2 according to PadVal\r
335\r
336 //\r
337 // set GPO default value\r
338 //\r
339 if(Gpio_Conf_Data[index].usage == GPO && Gpio_Conf_Data[index].gpod4 != NA)\r
340 {\r
341 pad_val.r.pad_val = Gpio_Conf_Data[index].gpod4;\r
342 }\r
343 }\r
344\r
345\r
346 DEBUG ((EFI_D_INFO, "Set PAD_VAL = 0x%08x, ", pad_val.dw));\r
347\r
348 MmioWrite32(mmio_padval, pad_val.dw);\r
349\r
350 //\r
351 // Step 2: CONF0 Programming\r
352 // Read GPIO default CONF0 value, which is assumed to be default value after reset.\r
353 //\r
354 conf0_val.dw = MmioRead32(mmio_conf0);\r
355\r
356 //\r
357 // Set Function #\r
358 //\r
359 conf0_val.r.Func_Pin_Mux = Gpio_Conf_Data[index].func;\r
360\r
361 if(GPO == Gpio_Conf_Data[index].usage)\r
362 {\r
363 //\r
364 // If used as GPO, then internal pull need to be disabled\r
365 //\r
366 conf0_val.r.Pull_assign = 0; // Non-pull\r
367 }\r
368 else\r
369 {\r
370 //\r
371 // Set PullUp / PullDown\r
372 //\r
373 if(P_20K_H == Gpio_Conf_Data[index].pull)\r
374 {\r
375 conf0_val.r.Pull_assign = 0x1; // PullUp\r
376 conf0_val.r.Pull_strength = 0x2;// 20K\r
377 }\r
378 else if(P_20K_L == Gpio_Conf_Data[index].pull)\r
379 {\r
380 conf0_val.r.Pull_assign = 0x2; // PullDown\r
381 conf0_val.r.Pull_strength = 0x2;// 20K\r
382 }\r
383 else if(P_NONE == Gpio_Conf_Data[index].pull)\r
384 {\r
385 conf0_val.r.Pull_assign = 0; // Non-pull\r
386 }\r
387 else\r
388 {\r
389 ASSERT(FALSE); // Invalid value\r
390 }\r
391 }\r
392\r
393 //\r
394 // Set INT Trigger Type\r
395 //\r
396 conf0_val.dw &= ~0x0f000000; // Clear bits 27:24\r
397\r
398 //\r
399 // Set INT Trigger Type\r
400 //\r
401 if(TRIG_ == Gpio_Conf_Data[index].int_type)\r
402 {\r
403 //\r
404 // Interrupt not capable, clear bits 27:24\r
405 //\r
406 }\r
407 else\r
408 {\r
409 conf0_val.dw |= (Gpio_Conf_Data[index].int_type & 0x0f)<<24;\r
410 }\r
411\r
412 DEBUG ((EFI_D_INFO, "Set CONF0 = 0x%08x\n", conf0_val.dw));\r
413\r
414 //\r
415 // Write back the targeted GPIO config value according to platform (board) GPIO setting\r
416 //\r
417 MmioWrite32 (mmio_conf0, conf0_val.dw);\r
418 }\r
419\r
420 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r
421 // GPIO SCORE write 0x01001002 to IOBASE + 0x0900\r
422 //\r
423}\r
424\r
425VOID\r
426EFIAPI\r
427SpiBiosProtectionFunction(\r
428 EFI_EVENT Event,\r
429 VOID *Context\r
430 )\r
431{\r
432\r
433 UINTN mPciD31F0RegBase;\r
fb1a4e36
SL		 434 UINTN BiosFlaLower0;\r
435 UINTN BiosFlaLimit0;\r
436 UINTN BiosFlaLower1;\r
437 UINTN BiosFlaLimit1; \r
438 \r
3cbfba02 439\r
fb1a4e36
SL		 440 BiosFlaLower0 = PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAreaBaseAddress);\r
441 BiosFlaLimit0 = PcdGet32(PcdFlashMicroCodeSize)-1; \r
442 #ifdef MINNOW2_FSP_BUILD\r
443 BiosFlaLower1 = PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseAddress);\r
444 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvFspBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r
445 #else\r
446 BiosFlaLower1 = PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBaseAddress);\r
447 BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvMainBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r
448 #endif\r
3cbfba02 449\r
fb1a4e36 450 \r
3cbfba02
DW		 451 mPciD31F0RegBase = MmPciAddress (0,\r
452 DEFAULT_PCI_BUS_NUMBER_PCH,\r
453 PCI_DEVICE_NUMBER_PCH_LPC,\r
454 PCI_FUNCTION_NUMBER_PCH_LPC,\r
455 0\r
456 );\r
457 SpiBase = MmioRead32(mPciD31F0RegBase + R_PCH_LPC_SPI_BASE) & B_PCH_LPC_SPI_BASE_BAR;\r
458\r
459 //\r
460 //Set SMM_BWP, WPD and LE bit\r
461 //\r
462 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_SMM_BWP);\r
463 MmioAnd32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8)(~B_PCH_SPI_BCR_BIOSWE));\r
464 MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_BLE);\r
465\r
466 //\r
467 //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.\r
468 //\r
469 if( (MmioRead16(SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) != 0 ||\r
470 (MmioRead32(SpiBase + R_PCH_SPI_IND_LOCK)& B_PCH_SPI_IND_LOCK_PR0) != 0) {\r
471 //\r
472 //Already locked. we could take no action here\r
473 //\r
474 DEBUG((EFI_D_INFO, "PR0 already locked down. Stop configuring PR0.\n"));\r
475 return;\r
476 }\r
477\r
478 //\r
479 //Set PR0\r
480 //\r
481 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR0),\r
482 B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\\r
fb1a4e36 483 (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16));\r
3cbfba02 484\r
fb1a4e36
SL		 485 //\r
486 //Set PR1\r
487 //\r
488\r
489 MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR1),\r
490 B_PCH_SPI_PR1_RPE|B_PCH_SPI_PR1_WPE|\\r
491 (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));\r
492\r
493 //\r
6f2ef18e 494 //Lock down PRx\r
fb1a4e36
SL		 495 //\r
496 MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r
497\r
498 //\r
499 // Verify if it's really locked.\r
500 //\r
501 if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r
6f2ef18e 502 DEBUG((EFI_D_ERROR, "Failed to lock down PRx.\n"));\r
fb1a4e36 503 }\r
3cbfba02
DW		 504 return;\r
505\r
506}\r
507\r
508VOID\r
509EFIAPI\r
510InitPciDevPME (\r
511 EFI_EVENT Event,\r
512 VOID *Context\r
513 )\r
514{\r
515 UINTN VarSize;\r
3cbfba02
DW		 516\r
517 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
076d0d64
GL		 518 gRT->GetVariable(\r
519 NORMAL_SETUP_NAME,\r
520 &gEfiNormalSetupGuid,\r
521 NULL,\r
522 &VarSize,\r
523 &mSystemConfiguration\r
524 );\r
3cbfba02
DW		 525\r
526 //\r
527 //Program HDA PME_EN\r
528 //\r
529 PchAzaliaPciCfg32Or (R_PCH_HDA_PCS, B_PCH_HDA_PCS_PMEE);\r
530\r
531 //\r
532 //Program SATA PME_EN\r
533 //\r
534 PchSataPciCfg32Or (R_PCH_SATA_PMCS, B_PCH_SATA_PMCS_PMEE);\r
535\r
536 DEBUG ((EFI_D_INFO, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration.EhciPllCfgEnable));\r
537 if (mSystemConfiguration.EhciPllCfgEnable != 1) {\r
538 //\r
539 //Program EHCI PME_EN\r
540 //\r
541 PchMmPci32Or (\r
542 0,\r
543 0,\r
544 PCI_DEVICE_NUMBER_PCH_USB,\r
545 PCI_FUNCTION_NUMBER_PCH_EHCI,\r
546 R_PCH_EHCI_PWR_CNTL_STS,\r
547 B_PCH_EHCI_PWR_CNTL_STS_PME_EN\r
548 );\r
549 }\r
550 {\r
551 UINTN EhciPciMmBase;\r
552 UINT32 Buffer32 = 0;\r
553\r
554 EhciPciMmBase = MmPciAddress (0,\r
555 0,\r
556 PCI_DEVICE_NUMBER_PCH_USB,\r
557 PCI_FUNCTION_NUMBER_PCH_EHCI,\r
558 0\r
559 );\r
560 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase));\r
561 Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS);\r
562 DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32));\r
563 }\r
564}\r
565\r
6f2ef18e
TH		 566VOID\r
567EFIAPI\r
568InitThermalZone (\r
569 EFI_EVENT Event,\r
570 VOID *Context\r
571 )\r
572{\r
573 UINTN VarSize;\r
6f2ef18e
TH		 574 EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;\r
575 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
076d0d64
GL		 576 gRT->GetVariable(\r
577 NORMAL_SETUP_NAME,\r
578 &gEfiNormalSetupGuid,\r
579 NULL,\r
580 &VarSize,\r
581 &mSystemConfiguration\r
582 );\r
583 gBS->LocateProtocol (\r
584 &gEfiGlobalNvsAreaProtocolGuid,\r
585 NULL,\r
586 (void **)&GlobalNvsArea\r
587 );\r
6f2ef18e
TH		 588 GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint;\r
589 GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint;\r
590}\r
3cbfba02
DW		 591#if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
592\r
593#endif\r
594\r
595\r
596EFI_STATUS\r
597EFIAPI\r
598TristateLpcGpioS0i3Config (\r
599 UINT32 Gpio_Mmio_Offset,\r
600 UINT32 Gpio_Pin_Num,\r
601 CFIO_PNP_INIT* Gpio_Conf_Data\r
602 )\r
603{\r
604\r
605 UINT32 index;\r
606 UINT32 mmio_reg;\r
607 UINT32 mmio_val;\r
608\r
609 DEBUG ((DEBUG_INFO, "TristateLpcGpioS0i3Config\n"));\r
610\r
611 for(index=0; index < Gpio_Pin_Num; index++)\r
612 {\r
613 mmio_reg = IO_BASE_ADDRESS + Gpio_Mmio_Offset + Gpio_Conf_Data[index].offset;\r
614\r
615 MmioWrite32(mmio_reg, Gpio_Conf_Data[index].val);\r
616 mmio_val = 0;\r
617 mmio_val = MmioRead32(mmio_reg);\r
618\r
619 DEBUG ((EFI_D_INFO, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg, mmio_val));\r
620 }\r
621\r
622 return EFI_SUCCESS;\r
623}\r
624\r
625\r
626EFI_BOOT_SCRIPT_SAVE_PROTOCOL *mBootScriptSave;\r
627\r
628/**\r
629 Event Notification during exit boot service to enabel ACPI mode\r
630\r
631 Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r
632\r
633 Clear all ACPI event status and disable all ACPI events\r
634 Disable PM sources except power button\r
635 Clear status bits\r
636\r
637 Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r
638\r
639 Update EC to disable SMI and enable SCI\r
640\r
641 Enable SCI\r
642\r
643 Enable PME_B0_EN in GPE0a_EN\r
644\r
645 @param Event - EFI Event Handle\r
646 @param Context - Pointer to Notify Context\r
647\r
648 @retval Nothing\r
649\r
650**/\r
651VOID\r
652EFIAPI\r
653EnableAcpiCallback (\r
654 IN EFI_EVENT Event,\r
655 IN VOID *Context\r
656 )\r
657{\r
658 UINT32 RegData32;\r
659 UINT16 Pm1Cnt;\r
660 UINT16 AcpiBase;\r
661 UINT32 Gpe0aEn;\r
662\r
663 AcpiBase = MmioRead16 (\r
664 PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH,\r
665 PCI_DEVICE_NUMBER_PCH_LPC,\r
666 PCI_FUNCTION_NUMBER_PCH_LPC) + R_PCH_LPC_ACPI_BASE\r
667 ) & B_PCH_LPC_ACPI_BASE_BAR;\r
668\r
669 DEBUG ((EFI_D_INFO, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase));\r
670\r
671 //\r
672 // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r
673 //\r
674 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_EN);\r
675 RegData32 &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB2 | B_PCH_SMI_EN_INTEL_USB2);\r
676 IoWrite32(AcpiBase + R_PCH_SMI_EN, RegData32);\r
677\r
678 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS);\r
679 RegData32 |= B_PCH_SMI_STS_SWSMI_TMR;\r
680 IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32);\r
681\r
682 //\r
683 // Disable PM sources except power button\r
684 // power button is enabled only for PCAT. Disabled it on Tablet platform\r
685 //\r
686\r
687 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_EN, B_PCH_ACPI_PM1_EN_PWRBTN);\r
688 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_STS, 0xffff);\r
689\r
690 //\r
691 // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r
692 // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid\r
693 //\r
694 IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, RTC_ADDRESS_REGISTER_D);\r
695 IoWrite8 (PCAT_RTC_DATA_REGISTER, 0x0);\r
696\r
697 RegData32 = IoRead32(AcpiBase + R_PCH_ALT_GP_SMI_EN);\r
698 RegData32 &= ~(BIT7);\r
699 IoWrite32((AcpiBase + R_PCH_ALT_GP_SMI_EN), RegData32);\r
700\r
701 //\r
702 // Enable SCI\r
703 //\r
704 Pm1Cnt = IoRead16(AcpiBase + R_PCH_ACPI_PM1_CNT);\r
705 Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN;\r
706 IoWrite16(AcpiBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);\r
707\r
708 IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE\r
709\r
710 //\r
711 // Enable PME_B0_EN in GPE0a_EN\r
712 // Caution: Enable PME_B0_EN must be placed after enabling SCI.\r
713 // Otherwise, USB PME could not be handled as SMI event since no handler is there.\r
714 //\r
715 Gpe0aEn = IoRead32 (AcpiBase + R_PCH_ACPI_GPE0a_EN);\r
716 Gpe0aEn |= B_PCH_ACPI_GPE0a_EN_PME_B0;\r
717 IoWrite32(AcpiBase + R_PCH_ACPI_GPE0a_EN, Gpe0aEn);\r
718\r
719}\r
720\r
721/**\r
722\r
723 Routine Description:\r
724\r
725 This is the standard EFI driver point for the Driver. This\r
726 driver is responsible for setting up any platform specific policy or\r
727 initialization information.\r
728\r
729 @param ImageHandle Handle for the image of this driver.\r
730 @param SystemTable Pointer to the EFI System Table.\r
731\r
732 @retval EFI_SUCCESS Policy decisions set.\r
733\r
734**/\r
735EFI_STATUS\r
736EFIAPI\r
737InitializePlatform (\r
738 IN EFI_HANDLE ImageHandle,\r
739 IN EFI_SYSTEM_TABLE *SystemTable\r
740 )\r
741{\r
742 EFI_STATUS Status;\r
743 UINTN VarSize;\r
744 EFI_HANDLE Handle = NULL;\r
3cbfba02 745 EFI_EVENT mEfiExitBootServicesEvent;\r
d71c25cf
DW		 746 EFI_EVENT RtcEvent;\r
747 VOID *RtcCallbackReg = NULL;\r
748 \r
749 mImageHandle = ImageHandle;\r
3cbfba02
DW		 750\r
751 Status = gBS->InstallProtocolInterface (\r
752 &Handle,\r
753 &gEfiSpeakerInterfaceProtocolGuid,\r
754 EFI_NATIVE_INTERFACE,\r
755 &mSpeakerInterface\r
756 );\r
757\r
758 Status = gBS->LocateProtocol (\r
759 &gEfiPciRootBridgeIoProtocolGuid,\r
760 NULL,\r
761 (VOID **) &mPciRootBridgeIo\r
762 );\r
763 ASSERT_EFI_ERROR (Status);\r
764\r
765 VarSize = sizeof(EFI_PLATFORM_INFO_HOB);\r
766 Status = gRT->GetVariable(\r
767 L"PlatformInfo",\r
768 &gEfiVlv2VariableGuid,\r
769 NULL,\r
770 &VarSize,\r
771 &mPlatformInfo\r
772 );\r
773\r
774 //\r
775 // Initialize Product Board ID variable\r
776 //\r
777 InitMfgAndConfigModeStateVar();\r
778 InitPlatformBootMode();\r
779\r
780 //\r
781 // Install Observable protocol\r
782 //\r
783 InitializeObservableProtocol();\r
784\r
620f2891
TH		 785 Status = SaveSetupRecoveryVar();\r
786 if (EFI_ERROR (Status)) {\r
787 DEBUG ((EFI_D_ERROR, "InitializePlatform() Save SetupRecovery variable failed \n"));\r
788 }\r
3cbfba02
DW		 789\r
790 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
791 Status = gRT->GetVariable(\r
792 NORMAL_SETUP_NAME,\r
793 &gEfiNormalSetupGuid,\r
794 NULL,\r
795 &VarSize,\r
796 &mSystemConfiguration\r
797 );\r
620f2891
TH		 798 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
799 //The setup variable is corrupted\r
800 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
801 Status = gRT->GetVariable(\r
802 L"SetupRecovery",\r
803 &gEfiNormalSetupGuid,\r
804 NULL,\r
805 &VarSize,\r
806 &mSystemConfiguration\r
807 );\r
808 ASSERT_EFI_ERROR (Status);\r
809 Status = gRT->SetVariable (\r
810 NORMAL_SETUP_NAME,\r
811 &gEfiNormalSetupGuid,\r
812 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
813 sizeof(SYSTEM_CONFIGURATION),\r
814 &mSystemConfiguration\r
815 ); \r
816 }\r
817 \r
3cbfba02
DW		 818 Status = EfiCreateEventReadyToBootEx (\r
819 TPL_CALLBACK,\r
820 ReadyToBootFunction,\r
821 NULL,\r
822 &mReadyToBootEvent\r
823 );\r
824\r
825 //\r
826 // Create a ReadyToBoot Event to run the PME init process\r
827 //\r
828 Status = EfiCreateEventReadyToBootEx (\r
829 TPL_CALLBACK,\r
830 InitPciDevPME,\r
831 NULL,\r
832 &mReadyToBootEvent\r
833 );\r
834 //\r
fb1a4e36 835 // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region\r
3cbfba02
DW		 836 //\r
837 if(mSystemConfiguration.SpiRwProtect==1) {\r
838 Status = EfiCreateEventReadyToBootEx (\r
839 TPL_CALLBACK,\r
840 SpiBiosProtectionFunction,\r
841 NULL,\r
842 &mReadyToBootEvent\r
843 );\r
844 }\r
6f2ef18e
TH		 845 //\r
846 // Create a ReadyToBoot Event to run the thermalzone init process\r
847 //\r
848 Status = EfiCreateEventReadyToBootEx (\r
849 TPL_CALLBACK,\r
850 InitThermalZone,\r
851 NULL,\r
852 &mReadyToBootEvent\r
853 ); \r
854 \r
3cbfba02
DW		 855 ReportStatusCodeEx (\r
856 EFI_PROGRESS_CODE,\r
857 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1,\r
858 0,\r
859 &gEfiCallerIdGuid,\r
860 NULL,\r
861 NULL,\r
862 0\r
863 );\r
864\r
865#if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r
866 //\r
867 // Initialize Sensor Info variable\r
868 //\r
869 InitializeSensorInfoVariable();\r
870#endif\r
871 InitPchPlatformPolicy(&mPlatformInfo);\r
872 InitVlvPlatformPolicy();\r
873\r
874 //\r
875 // Add usb policy\r
876 //\r
877 InitPlatformUsbPolicy();\r
878 InitSioPlatformPolicy();\r
879 InitializeClockRouting();\r
880 InitializeSlotInfo();\r
881 InitTcoReset();\r
882\r
883 //\r
884 //Init ExI\r
885 //\r
886 InitExI();\r
887\r
888 ReportStatusCodeEx (\r
889 EFI_PROGRESS_CODE,\r
890 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP2,\r
891 0,\r
892 &gEfiCallerIdGuid,\r
893 NULL,\r
894 NULL,\r
895 0\r
896 );\r
897\r
898 //\r
899 // Install PCI Bus Driver Hook\r
900 //\r
901 PciBusDriverHook();\r
902\r
903 InitItk();\r
904\r
905 ReportStatusCodeEx (\r
906 EFI_PROGRESS_CODE,\r
907 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP3,\r
908 0,\r
909 &gEfiCallerIdGuid,\r
910 NULL,\r
911 NULL,\r
912 0\r
913 );\r
914\r
915\r
916 //\r
917 // Initialize Password States and Callbacks\r
918 //\r
919 PchInitBeforeBoot();\r
920\r
921#if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
922\r
923#endif\r
924\r
925#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
926 //\r
927 // Re-write Firmware ID if it is changed\r
928 //\r
929 InitFirmwareId();\r
930#endif\r
931\r
932 ReportStatusCodeEx (\r
933 EFI_PROGRESS_CODE,\r
934 EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP4,\r
935 0,\r
936 &gEfiCallerIdGuid,\r
937 NULL,\r
938 NULL,\r
939 0\r
940 );\r
941\r
942\r
943 Status = gBS->CreateEventEx (\r
944 EVT_NOTIFY_SIGNAL,\r
945 TPL_NOTIFY,\r
946 EnableAcpiCallback,\r
947 NULL,\r
948 &gEfiEventExitBootServicesGuid,\r
949 &mEfiExitBootServicesEvent\r
950 );\r
951\r
d71c25cf
DW		 952 //\r
953 // Adjust RTC deafult time to be BIOS-built time.\r
954 //\r
955 Status = gBS->CreateEvent (\r
956 EVT_NOTIFY_SIGNAL,\r
957 TPL_CALLBACK,\r
958 AdjustDefaultRtcTimeCallback,\r
959 NULL,\r
960 &RtcEvent\r
961 );\r
962 if (!EFI_ERROR (Status)) {\r
963 Status = gBS->RegisterProtocolNotify (\r
964 &gExitPmAuthProtocolGuid,\r
965 RtcEvent,\r
966 &RtcCallbackReg\r
967 );\r
3cbfba02 968\r
d71c25cf 969 }\r
3cbfba02
DW		 970\r
971 return EFI_SUCCESS;\r
972}\r
973\r
974/**\r
975 Source Or Destination with Length bytes.\r
976\r
977 @param[in] Destination Target memory\r
978 @param[in] Source Source memory\r
979 @param[in] Length Number of bytes\r
980\r
981 @retval None\r
982\r
983**/\r
984VOID\r
985EfiOrMem (\r
986 IN VOID *Destination,\r
987 IN VOID *Source,\r
988 IN UINTN Length\r
989 )\r
990{\r
991 CHAR8 *Destination8;\r
992 CHAR8 *Source8;\r
993\r
994 if (Source < Destination) {\r
995 Destination8 = (CHAR8 *) Destination + Length - 1;\r
996 Source8 = (CHAR8 *) Source + Length - 1;\r
997 while (Length--) {\r
998 *(Destination8--) |= *(Source8--);\r
999 }\r
1000 } else {\r
1001 Destination8 = (CHAR8 *) Destination;\r
1002 Source8 = (CHAR8 *) Source;\r
1003 while (Length--) {\r
1004 *(Destination8++) |= *(Source8++);\r
1005 }\r
1006 }\r
1007}\r
1008\r
1009VOID\r
1010PchInitBeforeBoot()\r
1011{\r
1012 //\r
1013 // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.\r
1014 //\r
1015 S3BootScriptSaveMemWrite (\r
1016 EfiBootScriptWidthUint32,\r
1017 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)),\r
1018 1,\r
1019 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)));\r
1020\r
1021 S3BootScriptSaveMemWrite (\r
1022 EfiBootScriptWidthUint32,\r
1023 (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)),\r
1024 1,\r
1025 (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)));\r
1026\r
1027 S3BootScriptSaveMemWrite (\r
1028 EfiBootScriptWidthUint16,\r
1029 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE),\r
1030 1,\r
1031 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE));\r
1032\r
1033 S3BootScriptSaveMemWrite (\r
1034 EfiBootScriptWidthUint16,\r
1035 (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP),\r
1036 1,\r
1037 (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP));\r
1038\r
1039 //\r
1040 // Saved MTPMC_1 for S3 resume.\r
1041 //\r
1042 S3BootScriptSaveMemWrite (\r
1043 EfiBootScriptWidthUint32,\r
1044 (UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1),\r
1045 1,\r
1046 (VOID *)(UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1));\r
1047 return;\r
1048}\r
1049\r
1050VOID\r
1051EFIAPI\r
1052ReadyToBootFunction (\r
1053 EFI_EVENT Event,\r
1054 VOID *Context\r
1055 )\r
1056{\r
1057 EFI_STATUS Status;\r
1058 EFI_ISA_ACPI_PROTOCOL *IsaAcpi;\r
1059 EFI_ISA_ACPI_DEVICE_ID IsaDevice;\r
1060 UINTN Size;\r
1061 UINT16 State;\r
1062 EFI_TPM_MP_DRIVER_PROTOCOL *TpmMpDriver;\r
1063 EFI_CPU_IO_PROTOCOL *CpuIo;\r
1064 UINT8 Data;\r
1065 UINT8 ReceiveBuffer [64];\r
1066 UINT32 ReceiveBufferSize;\r
1067\r
1068 UINT8 TpmForceClearCommand [] = {0x00, 0xC1,\r
1069 0x00, 0x00, 0x00, 0x0A,\r
1070 0x00, 0x00, 0x00, 0x5D};\r
1071 UINT8 TpmPhysicalPresenceCommand [] = {0x00, 0xC1,\r
1072 0x00, 0x00, 0x00, 0x0C,\r
1073 0x40, 0x00, 0x00, 0x0A,\r
1074 0x00, 0x00};\r
1075 UINT8 TpmPhysicalDisableCommand [] = {0x00, 0xC1,\r
1076 0x00, 0x00, 0x00, 0x0A,\r
1077 0x00, 0x00, 0x00, 0x70};\r
1078 UINT8 TpmPhysicalEnableCommand [] = {0x00, 0xC1,\r
1079 0x00, 0x00, 0x00, 0x0A,\r
1080 0x00, 0x00, 0x00, 0x6F};\r
1081 UINT8 TpmPhysicalSetDeactivatedCommand [] = {0x00, 0xC1,\r
1082 0x00, 0x00, 0x00, 0x0B,\r
1083 0x00, 0x00, 0x00, 0x72,\r
1084 0x00};\r
1085 UINT8 TpmSetOwnerInstallCommand [] = {0x00, 0xC1,\r
1086 0x00, 0x00, 0x00, 0x0B,\r
1087 0x00, 0x00, 0x00, 0x71,\r
1088 0x00};\r
1089\r
1090 Size = sizeof(UINT16);\r
1091 Status = gRT->GetVariable (\r
1092 VAR_EQ_FLOPPY_MODE_DECIMAL_NAME,\r
1093 &gEfiNormalSetupGuid,\r
1094 NULL,\r
1095 &Size,\r
1096 &State\r
1097 );\r
1098\r
1099 //\r
1100 // Disable Floppy Controller if needed\r
1101 //\r
1102 Status = gBS->LocateProtocol (&gEfiIsaAcpiProtocolGuid, NULL, (VOID **) &IsaAcpi);\r
1103 if (!EFI_ERROR(Status) && (State == 0x00)) {\r
1104 IsaDevice.HID = EISA_PNP_ID(0x604);\r
1105 IsaDevice.UID = 0;\r
1106 Status = IsaAcpi->EnableDevice(IsaAcpi, &IsaDevice, FALSE);\r
1107 }\r
1108\r
1109 //\r
1110 // save LAN info to a variable\r
1111 //\r
1112 if (NULL != mPciLanInfo) {\r
1113 gRT->SetVariable (\r
1114 L"PciLanInfo",\r
1115 &gEfiPciLanInfoGuid,\r
1116 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,\r
1117 mPciLanCount * sizeof(PCI_LAN_INFO),\r
1118 mPciLanInfo\r
1119 );\r
1120 }\r
1121\r
1122 if (NULL != mPciLanInfo) {\r
1123 gBS->FreePool (mPciLanInfo);\r
1124 mPciLanInfo = NULL;\r
1125 }\r
1126 \r
1127\r
1128 //\r
1129 // Handle ACPI OS TPM requests here\r
1130 //\r
1131 Status = gBS->LocateProtocol (\r
1132 &gEfiCpuIoProtocolGuid,\r
1133 NULL,\r
1134 (VOID **)&CpuIo\r
1135 );\r
1136 Status = gBS->LocateProtocol (\r
1137 &gEfiTpmMpDriverProtocolGuid,\r
1138 NULL,\r
1139 (VOID **)&TpmMpDriver\r
1140 );\r
1141 if (!EFI_ERROR (Status))\r
1142 {\r
1143 Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST);\r
1144\r
1145 //\r
1146 // Clear pending ACPI TPM request indicator\r
1147 //\r
1148 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0x00);\r
1149 if (Data != 0)\r
1150 {\r
1151 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, Data);\r
1152\r
1153 //\r
1154 // Assert Physical Presence for these commands\r
1155 //\r
1156 TpmPhysicalPresenceCommand [11] = 0x20;\r
1157 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1158 Status = TpmMpDriver->Transmit (\r
1159 TpmMpDriver, TpmPhysicalPresenceCommand,\r
1160 sizeof (TpmPhysicalPresenceCommand),\r
1161 ReceiveBuffer, &ReceiveBufferSize\r
1162 );\r
1163 //\r
1164 // PF PhysicalPresence = TRUE\r
1165 //\r
1166 TpmPhysicalPresenceCommand [11] = 0x08;\r
1167 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1168 Status = TpmMpDriver->Transmit (\r
1169 TpmMpDriver, TpmPhysicalPresenceCommand,\r
1170 sizeof (TpmPhysicalPresenceCommand),\r
1171 ReceiveBuffer,\r
1172 &ReceiveBufferSize\r
1173 );\r
1174 if (Data == 0x01)\r
1175 {\r
1176 //\r
1177 // TPM_PhysicalEnable\r
1178 //\r
1179 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1180 Status = TpmMpDriver->Transmit (\r
1181 TpmMpDriver, TpmPhysicalEnableCommand,\r
1182 sizeof (TpmPhysicalEnableCommand),\r
1183 ReceiveBuffer, &ReceiveBufferSize\r
1184 );\r
1185 }\r
1186 if (Data == 0x02)\r
1187 {\r
1188 //\r
1189 // TPM_PhysicalDisable\r
1190 //\r
1191 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1192 Status = TpmMpDriver->Transmit (\r
1193 TpmMpDriver, TpmPhysicalDisableCommand,\r
1194 sizeof (TpmPhysicalDisableCommand),\r
1195 ReceiveBuffer,\r
1196 &ReceiveBufferSize\r
1197 );\r
1198 }\r
1199 if (Data == 0x03)\r
1200 {\r
1201 //\r
1202 // TPM_PhysicalSetDeactivated=FALSE\r
1203 //\r
1204 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1205 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1206 Status = TpmMpDriver->Transmit (\r
1207 TpmMpDriver,\r
1208 TpmPhysicalSetDeactivatedCommand,\r
1209 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1210 ReceiveBuffer, &ReceiveBufferSize\r
1211 );\r
1212 gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);\r
1213 }\r
1214 if (Data == 0x04)\r
1215 {\r
1216 //\r
1217 // TPM_PhysicalSetDeactivated=TRUE\r
1218 //\r
1219 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1220 TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
1221 Status = TpmMpDriver->Transmit (\r
1222 TpmMpDriver,\r
1223 TpmPhysicalSetDeactivatedCommand,\r
1224 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1225 ReceiveBuffer,\r
1226 &ReceiveBufferSize\r
1227 );\r
1228 gRT->ResetSystem (\r
1229 EfiResetWarm,\r
1230 EFI_SUCCESS,\r
1231 0,\r
1232 NULL\r
1233 );\r
1234 }\r
1235 if (Data == 0x05)\r
1236 {\r
1237 //\r
1238 // TPM_ForceClear\r
1239 //\r
1240 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1241 Status = TpmMpDriver->Transmit (\r
1242 TpmMpDriver,\r
1243 TpmForceClearCommand,\r
1244 sizeof (TpmForceClearCommand),\r
1245 ReceiveBuffer,\r
1246 &ReceiveBufferSize\r
1247 );\r
1248 gRT->ResetSystem (\r
1249 EfiResetWarm,\r
1250 EFI_SUCCESS,\r
1251 0,\r
1252 NULL\r
1253 );\r
1254 }\r
1255 if (Data == 0x06)\r
1256 {\r
1257 //\r
1258 // TPM_PhysicalEnable\r
1259 //\r
1260 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1261 Status = TpmMpDriver->Transmit (\r
1262 TpmMpDriver,\r
1263 TpmPhysicalEnableCommand,\r
1264 sizeof (TpmPhysicalEnableCommand),\r
1265 ReceiveBuffer,\r
1266 &ReceiveBufferSize\r
1267 );\r
1268 //\r
1269 // TPM_PhysicalSetDeactivated=FALSE\r
1270 //\r
1271 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1272 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1273 Status = TpmMpDriver->Transmit (\r
1274 TpmMpDriver,\r
1275 TpmPhysicalSetDeactivatedCommand,\r
1276 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1277 ReceiveBuffer,\r
1278 &ReceiveBufferSize\r
1279 );\r
1280 gRT->ResetSystem (\r
1281 EfiResetWarm,\r
1282 EFI_SUCCESS,\r
1283 0,\r
1284 NULL\r
1285 );\r
1286 }\r
1287 if (Data == 0x07)\r
1288 {\r
1289 //\r
1290 // TPM_PhysicalSetDeactivated=TRUE\r
1291 //\r
1292 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1293 TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
1294 Status = TpmMpDriver->Transmit (\r
1295 TpmMpDriver,\r
1296 TpmPhysicalSetDeactivatedCommand,\r
1297 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1298 ReceiveBuffer,\r
1299 &ReceiveBufferSize\r
1300 );\r
1301 //\r
1302 // TPM_PhysicalDisable\r
1303 //\r
1304 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1305 Status = TpmMpDriver->Transmit (\r
1306 TpmMpDriver,\r
1307 TpmPhysicalDisableCommand,\r
1308 sizeof (TpmPhysicalDisableCommand),\r
1309 ReceiveBuffer,\r
1310 &ReceiveBufferSize\r
1311 );\r
1312 gRT->ResetSystem (\r
1313 EfiResetWarm,\r
1314 EFI_SUCCESS,\r
1315 0,\r
1316 NULL\r
1317 );\r
1318 }\r
1319 if (Data == 0x08)\r
1320 {\r
1321 //\r
1322 // TPM_SetOwnerInstall=TRUE\r
1323 //\r
1324 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1325 TpmSetOwnerInstallCommand [10] = 0x01;\r
1326 Status = TpmMpDriver->Transmit (\r
1327 TpmMpDriver,\r
1328 TpmSetOwnerInstallCommand,\r
1329 sizeof (TpmSetOwnerInstallCommand),\r
1330 ReceiveBuffer,\r
1331 &ReceiveBufferSize\r
1332 );\r
1333 }\r
1334 if (Data == 0x09)\r
1335 {\r
1336 //\r
1337 // TPM_SetOwnerInstall=FALSE\r
1338 //\r
1339 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1340 TpmSetOwnerInstallCommand [10] = 0x00;\r
1341 Status = TpmMpDriver->Transmit (\r
1342 TpmMpDriver,\r
1343 TpmSetOwnerInstallCommand,\r
1344 sizeof (TpmSetOwnerInstallCommand),\r
1345 ReceiveBuffer,\r
1346 &ReceiveBufferSize\r
1347 );\r
1348 }\r
1349 if (Data == 0x0A)\r
1350 {\r
1351 //\r
1352 // TPM_PhysicalEnable\r
1353 //\r
1354 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1355 Status = TpmMpDriver->Transmit (\r
1356 TpmMpDriver,\r
1357 TpmPhysicalEnableCommand,\r
1358 sizeof (TpmPhysicalEnableCommand),\r
1359 ReceiveBuffer,\r
1360 &ReceiveBufferSize\r
1361 );\r
1362 //\r
1363 // TPM_PhysicalSetDeactivated=FALSE\r
1364 //\r
1365 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1366 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1367 Status = TpmMpDriver->Transmit (\r
1368 TpmMpDriver,\r
1369 TpmPhysicalSetDeactivatedCommand,\r
1370 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1371 ReceiveBuffer,\r
1372 &ReceiveBufferSize\r
1373 );\r
1374 //\r
1375 // Do TPM_SetOwnerInstall=TRUE on next reboot\r
1376 //\r
1377\r
1378 WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0xF0);\r
1379\r
1380 gRT->ResetSystem (\r
1381 EfiResetWarm,\r
1382 EFI_SUCCESS,\r
1383 0,\r
1384 NULL\r
1385 );\r
1386 }\r
1387 if (Data == 0x0B)\r
1388 {\r
1389 //\r
1390 // TPM_SetOwnerInstall=FALSE\r
1391 //\r
1392 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1393 TpmSetOwnerInstallCommand [10] = 0x00;\r
1394 Status = TpmMpDriver->Transmit (\r
1395 TpmMpDriver,\r
1396 TpmSetOwnerInstallCommand,\r
1397 sizeof (TpmSetOwnerInstallCommand),\r
1398 ReceiveBuffer,\r
1399 &ReceiveBufferSize\r
1400 );\r
1401 //\r
1402 // TPM_PhysicalSetDeactivated=TRUE\r
1403 //\r
1404 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1405 TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
1406 Status = TpmMpDriver->Transmit (\r
1407 TpmMpDriver,\r
1408 TpmPhysicalSetDeactivatedCommand,\r
1409 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1410 ReceiveBuffer,\r
1411 &ReceiveBufferSize\r
1412 );\r
1413 //\r
1414 // TPM_PhysicalDisable\r
1415 //\r
1416 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1417 Status = TpmMpDriver->Transmit (\r
1418 TpmMpDriver,\r
1419 TpmPhysicalDisableCommand,\r
1420 sizeof (TpmPhysicalDisableCommand),\r
1421 ReceiveBuffer,\r
1422 &ReceiveBufferSize\r
1423 );\r
1424 gRT->ResetSystem (\r
1425 EfiResetWarm,\r
1426 EFI_SUCCESS,\r
1427 0,\r
1428 NULL\r
1429 );\r
1430 }\r
1431 if (Data == 0x0E)\r
1432 {\r
1433 //\r
1434 // TPM_ForceClear\r
1435 //\r
1436 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1437 Status = TpmMpDriver->Transmit (\r
1438 TpmMpDriver,\r
1439 TpmForceClearCommand,\r
1440 sizeof (TpmForceClearCommand),\r
1441 ReceiveBuffer,\r
1442 &ReceiveBufferSize\r
1443 );\r
1444 //\r
1445 // TPM_PhysicalEnable\r
1446 //\r
1447 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1448 Status = TpmMpDriver->Transmit (\r
1449 TpmMpDriver,\r
1450 TpmPhysicalEnableCommand,\r
1451 sizeof (TpmPhysicalEnableCommand),\r
1452 ReceiveBuffer,\r
1453 &ReceiveBufferSize\r
1454 );\r
1455 //\r
1456 // TPM_PhysicalSetDeactivated=FALSE\r
1457 //\r
1458 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1459 TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
1460 Status = TpmMpDriver->Transmit (\r
1461 TpmMpDriver,\r
1462 TpmPhysicalSetDeactivatedCommand,\r
1463 sizeof (TpmPhysicalSetDeactivatedCommand),\r
1464 ReceiveBuffer,\r
1465 &ReceiveBufferSize\r
1466 );\r
1467 gRT->ResetSystem (\r
1468 EfiResetWarm,\r
1469 EFI_SUCCESS,\r
1470 0,\r
1471 NULL\r
1472 );\r
1473 }\r
1474 if (Data == 0xF0)\r
1475 {\r
1476 //\r
1477 // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE\r
1478 //\r
1479 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1480 TpmSetOwnerInstallCommand [10] = 0x01;\r
1481 Status = TpmMpDriver->Transmit (\r
1482 TpmMpDriver,\r
1483 TpmSetOwnerInstallCommand,\r
1484 sizeof (TpmSetOwnerInstallCommand),\r
1485 ReceiveBuffer,\r
1486 &ReceiveBufferSize\r
1487 );\r
1488 WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, 0x0A);\r
1489 }\r
1490 //\r
1491 // Deassert Physical Presence\r
1492 //\r
1493 TpmPhysicalPresenceCommand [11] = 0x10;\r
1494 ReceiveBufferSize = sizeof(ReceiveBuffer);\r
1495 Status = TpmMpDriver->Transmit (\r
1496 TpmMpDriver,\r
1497 TpmPhysicalPresenceCommand,\r
1498 sizeof (TpmPhysicalPresenceCommand),\r
1499 ReceiveBuffer,\r
1500 &ReceiveBufferSize\r
1501 );\r
1502 }\r
1503 }\r
1504\r
1505 return;\r
1506}\r
1507\r
1508/**\r
1509\r
1510 Initializes manufacturing and config mode setting.\r
1511\r
1512**/\r
1513VOID\r
1514InitMfgAndConfigModeStateVar()\r
1515{\r
1516 EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
1517 VOID *HobList;\r
3cbfba02 1518\r
3cbfba02
DW		 1519\r
1520 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r
1521 if (HobList != NULL) {\r
1522 BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r
1523\r
1524 //\r
1525 // Check if in Manufacturing mode\r
1526 //\r
1527 if ( !CompareMem (\r
1528 &BootModeBuffer->SetupName,\r
1529 MANUFACTURE_SETUP_NAME,\r
1530 StrSize (MANUFACTURE_SETUP_NAME)\r
1531 ) ) {\r
1532 mMfgMode = TRUE;\r
1533 }\r
1534\r
620f2891
TH		 1535\r
1536\r
3cbfba02
DW		 1537 }\r
1538\r
1539}\r
1540\r
1541/**\r
1542\r
1543 Initializes manufacturing and config mode setting.\r
1544\r
1545**/\r
1546VOID\r
1547InitPlatformBootMode()\r
1548{\r
1549 EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
1550 VOID *HobList;\r
1551\r
1552 HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r
1553 if (HobList != NULL) {\r
1554 BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r
1555 mPlatformBootMode = BootModeBuffer->PlatformBootMode;\r
1556 }\r
1557}\r
1558\r
1559/**\r
1560\r
1561 Initializes ITK.\r
1562\r
1563**/\r
1564VOID\r
1565InitItk(\r
1566 )\r
1567{\r
1568 EFI_STATUS Status;\r
1569 UINT16 ItkModBiosState;\r
1570 UINT8 Value;\r
1571 UINTN DataSize;\r
1572 UINT32 Attributes;\r
1573\r
1574 //\r
1575 // Setup local variable according to ITK variable\r
1576 //\r
1577 //\r
1578 // Read ItkBiosModVar to determine if BIOS has been modified by ITK\r
1579 // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified\r
1580 // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK\r
1581 //\r
1582 DataSize = sizeof (Value);\r
1583 Status = gRT->GetVariable (\r
1584 ITK_BIOS_MOD_VAR_NAME,\r
1585 &gItkDataVarGuid,\r
1586 &Attributes,\r
1587 &DataSize,\r
1588 &Value\r
1589 );\r
1590 if (Status == EFI_NOT_FOUND) {\r
1591 //\r
1592 // Variable not found, hasn't been initialized, intialize to 0\r
1593 //\r
1594 Value=0x00;\r
1595 //\r
1596 // Write variable to flash.\r
1597 //\r
1598 gRT->SetVariable (\r
1599 ITK_BIOS_MOD_VAR_NAME,\r
1600 &gItkDataVarGuid,\r
1601 EFI_VARIABLE_RUNTIME_ACCESS |\r
1602 EFI_VARIABLE_NON_VOLATILE |\r
1603 EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
1604 sizeof (Value),\r
1605 &Value\r
1606 );\r
1607\r
1608}\r
1609 if ( (!EFI_ERROR (Status)) || (Status == EFI_NOT_FOUND) ) {\r
1610 if (Value == 0x00) {\r
1611 ItkModBiosState = 0x00;\r
1612 } else {\r
1613 ItkModBiosState = 0x01;\r
1614 }\r
1615 gRT->SetVariable (\r
1616 VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME,\r
1617 &gEfiNormalSetupGuid,\r
1618 EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
1619 2,\r
1620 (void *)&ItkModBiosState\r
1621 );\r
1622 }\r
1623}\r
1624\r
1625#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
1626\r
1627/**\r
1628\r
1629 Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.\r
1630\r
1631**/\r
1632STATIC\r
1633VOID\r
1634InitFirmwareId(\r
1635 )\r
1636{\r
1637 EFI_STATUS Status;\r
1638 CHAR16 FirmwareIdNameWithPassword[] = FIRMWARE_ID_NAME_WITH_PASSWORD;\r
1639\r
1640 //\r
1641 // First try writing the variable without a password in case we are\r
1642 // upgrading from a BIOS without password protection on the FirmwareId\r
1643 //\r
1644 Status = gRT->SetVariable(\r
1645 (CHAR16 *)&gFirmwareIdName,\r
1646 &gFirmwareIdGuid,\r
1647 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
1648 EFI_VARIABLE_RUNTIME_ACCESS,\r
1649 sizeof( FIRMWARE_ID ) - 1,\r
1650 FIRMWARE_ID\r
1651 );\r
1652\r
1653 if (Status == EFI_INVALID_PARAMETER) {\r
1654\r
1655 //\r
1656 // Since setting the firmware id without the password failed,\r
1657 // a password must be required.\r
1658 //\r
1659 Status = gRT->SetVariable(\r
1660 (CHAR16 *)&FirmwareIdNameWithPassword,\r
1661 &gFirmwareIdGuid,\r
1662 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
1663 EFI_VARIABLE_RUNTIME_ACCESS,\r
1664 sizeof( FIRMWARE_ID ) - 1,\r
1665 FIRMWARE_ID\r
1666 );\r
1667 }\r
1668}\r
1669#endif\r
1670\r
1671VOID\r
1672UpdateDVMTSetup(\r
1673 )\r
1674{\r
1675 //\r
1676 // Workaround to support IIA bug.\r
1677 // IIA request to change option value to 4, 5 and 7 relatively\r
1678 // instead of 1, 2, and 3 which follow Lakeport Specs.\r
1679 // Check option value, temporary hardcode GraphicsDriverMemorySize\r
1680 // Option value to fulfill IIA requirment. So that user no need to\r
1681 // load default and update setupvariable after update BIOS.\r
1682 // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.\r
1683 // *This is for broadwater and above product only.\r
1684 //\r
1685\r
1686 SYSTEM_CONFIGURATION SystemConfiguration;\r
1687 UINTN VarSize;\r
1688 EFI_STATUS Status;\r
1689\r
1690 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
1691 Status = gRT->GetVariable(\r
1692 NORMAL_SETUP_NAME,\r
1693 &gEfiNormalSetupGuid,\r
1694 NULL,\r
1695 &VarSize,\r
1696 &SystemConfiguration\r
1697 );\r
1698\r
620f2891
TH		 1699 if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
1700 //The setup variable is corrupted\r
1701 VarSize = sizeof(SYSTEM_CONFIGURATION);\r
1702 Status = gRT->GetVariable(\r
1703 L"SetupRecovery",\r
1704 &gEfiNormalSetupGuid,\r
1705 NULL,\r
1706 &VarSize,\r
1707 &SystemConfiguration\r
1708 );\r
1709 ASSERT_EFI_ERROR (Status);\r
1710 }\r
1711\r
3cbfba02
DW		 1712 if((SystemConfiguration.GraphicsDriverMemorySize < 4) && !EFI_ERROR(Status) ) {\r
1713 switch (SystemConfiguration.GraphicsDriverMemorySize){\r
1714 case 1:\r
1715 SystemConfiguration.GraphicsDriverMemorySize = 4;\r
1716 break;\r
1717 case 2:\r
1718 SystemConfiguration.GraphicsDriverMemorySize = 5;\r
1719 break;\r
1720 case 3:\r
1721 SystemConfiguration.GraphicsDriverMemorySize = 7;\r
1722 break;\r
1723 default:\r
1724 break;\r
1725 }\r
1726\r
1727 Status = gRT->SetVariable (\r
1728 NORMAL_SETUP_NAME,\r
1729 &gEfiNormalSetupGuid,\r
1730 EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
1731 sizeof(SYSTEM_CONFIGURATION),\r
1732 &SystemConfiguration\r
1733 );\r
1734 }\r
1735}\r
1736\r
1737VOID\r
1738InitPlatformUsbPolicy (\r
1739 VOID\r
1740 )\r
1741\r
1742{\r
1743 EFI_HANDLE Handle;\r
1744 EFI_STATUS Status;\r
1745\r
1746 Handle = NULL;\r
1747\r
1748 mUsbPolicyData.Version = (UINT8)USB_POLICY_PROTOCOL_REVISION_2;\r
1749 mUsbPolicyData.UsbMassStorageEmulationType = mSystemConfiguration.UsbBIOSINT13DeviceEmulation;\r
1750 if(mUsbPolicyData.UsbMassStorageEmulationType == 3) {\r
1751 mUsbPolicyData.UsbEmulationSize = mSystemConfiguration.UsbBIOSINT13DeviceEmulationSize;\r
1752 } else {\r
1753 mUsbPolicyData.UsbEmulationSize = 0;\r
1754 }\r
1755 mUsbPolicyData.UsbZipEmulationType = mSystemConfiguration.UsbZipEmulation;\r
1756 mUsbPolicyData.UsbOperationMode = HIGH_SPEED;\r
1757\r
1758 //\r
1759 // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP\r
1760 //\r
1761 mUsbPolicyData.USBPeriodSupport = LEGACY_PERIOD_UN_SUPP;\r
1762\r
1763 //\r
1764 // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP\r
1765 //\r
1766 mUsbPolicyData.LegacyFreeSupport = LEGACY_FREE_UN_SUPP;\r
1767\r
1768 //\r
1769 // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00\r
1770 //\r
1771 mUsbPolicyData.CodeBase = (UINT8)ICBD_CODE_BASE;\r
1772\r
1773 //\r
1774 // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,\r
1775 // default is Ich acpibase =0x040. acpitimerreg=0x08.\r
1776 mUsbPolicyData.LpcAcpiBase = 0x40;\r
1777 mUsbPolicyData.AcpiTimerReg = 0x08;\r
1778\r
1779 //\r
1780 // Set for reduce usb post time\r
1781 //\r
1782 mUsbPolicyData.UsbTimeTue = 0x00;\r
1783 mUsbPolicyData.InternelHubExist = 0x00; //TigerPoint doesn't have RMH\r
1784 mUsbPolicyData.EnumWaitPortStableStall = 100;\r
1785\r
1786\r
1787 Status = gBS->InstallProtocolInterface (\r
1788 &Handle,\r
1789 &gUsbPolicyGuid,\r
1790 EFI_NATIVE_INTERFACE,\r
1791 &mUsbPolicyData\r
1792 );\r
1793 ASSERT_EFI_ERROR(Status);\r
1794\r
1795}\r
1796\r
1797UINT8\r
1798ReadCmosBank1Byte (\r
1799 IN EFI_CPU_IO_PROTOCOL *CpuIo,\r
1800 IN UINT8 Index\r
1801 )\r
1802{\r
1803 UINT8 Data;\r
1804\r
1805 CpuIo->Io.Write (CpuIo, EfiCpuIoWidthUint8, 0x72, 1, &Index);\r
1806 CpuIo->Io.Read (CpuIo, EfiCpuIoWidthUint8, 0x73, 1, &Data);\r
1807 return Data;\r
1808}\r
1809\r
1810VOID\r
1811WriteCmosBank1Byte (\r
1812 IN EFI_CPU_IO_PROTOCOL *CpuIo,\r
1813 IN UINT8 Index,\r
1814 IN UINT8 Data\r
1815 )\r
1816{\r
1817 CpuIo->Io.Write (\r
1818 CpuIo,\r
1819 EfiCpuIoWidthUint8,\r
1820 0x72,\r
1821 1,\r
1822 &Index\r
1823 );\r
1824 CpuIo->Io.Write (\r
1825 CpuIo,\r
1826 EfiCpuIoWidthUint8,\r
1827 0x73,\r
1828 1,\r
1829 &Data\r
1830 );\r
1831}\r
1832\r
EFI Development Kit II mirror for PVE