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1/** @file\r
2 This module produces the EFI_PEI_S3_RESUME2_PPI.\r
3 This module works with StandAloneBootScriptExecutor to S3 resume to OS.\r
4 This module will execute the boot script saved during last boot and after that,\r
5 control is passed to OS waking up handler.\r
6\r
7 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
8 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
9\r
10 This program and the accompanying materials\r
11 are licensed and made available under the terms and conditions\r
12 of the BSD License which accompanies this distribution. The\r
13 full text of the license may be found at\r
14 http://opensource.org/licenses/bsd-license.php\r
15\r
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
18\r
19**/\r
20\r
21#include <PiPei.h>\r
22\r
23#include <Guid/AcpiS3Context.h>\r
24#include <Guid/BootScriptExecutorVariable.h>\r
25#include <Guid/ExtendedFirmwarePerformance.h>\r
26#include <Guid/EndOfS3Resume.h>\r
27#include <Guid/S3SmmInitDone.h>\r
28#include <Ppi/ReadOnlyVariable2.h>\r
29#include <Ppi/S3Resume2.h>\r
30#include <Ppi/SmmAccess.h>\r
31#include <Ppi/PostBootScriptTable.h>\r
32#include <Ppi/EndOfPeiPhase.h>\r
33#include <Ppi/SmmCommunication.h>\r
34\r
35#include <Library/DebugLib.h>\r
36#include <Library/BaseLib.h>\r
37#include <Library/TimerLib.h>\r
38#include <Library/PeimEntryPoint.h>\r
39#include <Library/PeiServicesLib.h>\r
40#include <Library/HobLib.h>\r
41#include <Library/PerformanceLib.h>\r
42#include <Library/PeiServicesTablePointerLib.h>\r
43#include <Library/IoLib.h>\r
44#include <Library/BaseMemoryLib.h>\r
45#include <Library/MemoryAllocationLib.h>\r
46#include <Library/PcdLib.h>\r
47#include <Library/DebugAgentLib.h>\r
48#include <Library/LocalApicLib.h>\r
49#include <Library/ReportStatusCodeLib.h>\r
50#include <Library/PrintLib.h>\r
51#include <Library/HobLib.h>\r
52#include <Library/LockBoxLib.h>\r
53#include <IndustryStandard/Acpi.h>\r
54\r
55/**\r
56 This macro aligns the address of a variable with auto storage\r
57 duration down to CPU_STACK_ALIGNMENT.\r
58\r
59 Since the stack grows downward, the result preserves more of the\r
60 stack than the original address (or the same amount), not less.\r
61**/\r
62#define STACK_ALIGN_DOWN(Ptr) \\r
63 ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))\r
64\r
65#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r
66\r
67#pragma pack(1)\r
68typedef union {\r
69 struct {\r
70 UINT32 LimitLow : 16;\r
71 UINT32 BaseLow : 16;\r
72 UINT32 BaseMid : 8;\r
73 UINT32 Type : 4;\r
74 UINT32 System : 1;\r
75 UINT32 Dpl : 2;\r
76 UINT32 Present : 1;\r
77 UINT32 LimitHigh : 4;\r
78 UINT32 Software : 1;\r
79 UINT32 Reserved : 1;\r
80 UINT32 DefaultSize : 1;\r
81 UINT32 Granularity : 1;\r
82 UINT32 BaseHigh : 8;\r
83 } Bits;\r
84 UINT64 Uint64;\r
85} IA32_GDT;\r
86\r
87//\r
88// Page-Map Level-4 Offset (PML4) and\r
89// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB\r
90//\r
91typedef union {\r
92 struct {\r
93 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
94 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
95 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
96 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
97 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
98 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
99 UINT64 Reserved:1; // Reserved\r
100 UINT64 MustBeZero:2; // Must Be Zero\r
101 UINT64 Available:3; // Available for use by system software\r
102 UINT64 PageTableBaseAddress:40; // Page Table Base Address\r
103 UINT64 AvabilableHigh:11; // Available for use by system software\r
104 UINT64 Nx:1; // No Execute bit\r
105 } Bits;\r
106 UINT64 Uint64;\r
107} PAGE_MAP_AND_DIRECTORY_POINTER;\r
108\r
109//\r
110// Page Table Entry 2MB\r
111//\r
112typedef union {\r
113 struct {\r
114 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
115 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
116 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
117 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
118 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
119 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
120 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
121 UINT64 MustBe1:1; // Must be 1\r
122 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
123 UINT64 Available:3; // Available for use by system software\r
124 UINT64 PAT:1; //\r
125 UINT64 MustBeZero:8; // Must be zero;\r
126 UINT64 PageTableBaseAddress:31; // Page Table Base Address\r
127 UINT64 AvabilableHigh:11; // Available for use by system software\r
128 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
129 } Bits;\r
130 UINT64 Uint64;\r
131} PAGE_TABLE_ENTRY;\r
132\r
133//\r
134// Page Table Entry 1GB\r
135//\r
136typedef union {\r
137 struct {\r
138 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
139 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
140 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
141 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
142 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
143 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
144 UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
145 UINT64 MustBe1:1; // Must be 1\r
146 UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
147 UINT64 Available:3; // Available for use by system software\r
148 UINT64 PAT:1; //\r
149 UINT64 MustBeZero:17; // Must be zero;\r
150 UINT64 PageTableBaseAddress:22; // Page Table Base Address\r
151 UINT64 AvabilableHigh:11; // Available for use by system software\r
152 UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
153 } Bits;\r
154 UINT64 Uint64;\r
155} PAGE_TABLE_1G_ENTRY;\r
156\r
157//\r
158// Define two type of smm communicate headers.\r
159// One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.\r
160//\r
161typedef struct {\r
162 EFI_GUID HeaderGuid;\r
163 UINT32 MessageLength;\r
164 UINT8 Data[1];\r
165} SMM_COMMUNICATE_HEADER_32;\r
166\r
167typedef struct {\r
168 EFI_GUID HeaderGuid;\r
169 UINT64 MessageLength;\r
170 UINT8 Data[1];\r
171} SMM_COMMUNICATE_HEADER_64;\r
172\r
173#pragma pack()\r
174\r
175//\r
176// Function prototypes\r
177//\r
178/**\r
179 a ASM function to transfer control to OS.\r
180\r
181 @param S3WakingVector The S3 waking up vector saved in ACPI Facs table\r
182 @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer\r
183**/\r
184typedef\r
185VOID\r
186(EFIAPI *ASM_TRANSFER_CONTROL) (\r
187 IN UINT32 S3WakingVector,\r
188 IN UINT32 AcpiLowMemoryBase\r
189 );\r
190\r
191/**\r
192 Restores the platform to its preboot configuration for an S3 resume and\r
193 jumps to the OS waking vector.\r
194\r
195 This function will restore the platform to its pre-boot configuration that was\r
196 pre-stored in the boot script table and transfer control to OS waking vector.\r
197 Upon invocation, this function is responsible for locating the following\r
198 information before jumping to OS waking vector:\r
199 - ACPI tables\r
200 - boot script table\r
201 - any other information that it needs\r
202\r
203 The S3RestoreConfig() function then executes the pre-stored boot script table\r
204 and transitions the platform to the pre-boot state. The boot script is recorded\r
205 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r
206 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r
207 transfers control to the OS waking vector. If the OS supports only a real-mode\r
208 waking vector, this function will switch from flat mode to real mode before\r
209 jumping to the waking vector. If all platform pre-boot configurations are\r
210 successfully restored and all other necessary information is ready, this\r
211 function will never return and instead will directly jump to the OS waking\r
212 vector. If this function returns, it indicates that the attempt to resume\r
213 from the ACPI S3 sleep state failed.\r
214\r
215 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r
216\r
217 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r
218 @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r
219 resume boot path could not be located.\r
220\r
221**/\r
222EFI_STATUS\r
223EFIAPI\r
224S3RestoreConfig2 (\r
225 IN EFI_PEI_S3_RESUME2_PPI *This\r
226 );\r
227\r
228/**\r
229 Set data segment selectors value including DS/ES/FS/GS/SS.\r
230\r
231 @param[in] SelectorValue Segment selector value to be set.\r
232\r
233**/\r
234VOID\r
235EFIAPI\r
236AsmSetDataSelectors (\r
237 IN UINT16 SelectorValue\r
238 );\r
239\r
240//\r
241// Globals\r
242//\r
243EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };\r
244\r
245EFI_PEI_PPI_DESCRIPTOR mPpiList = {\r
246 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
247 &gEfiPeiS3Resume2PpiGuid,\r
248 &mS3ResumePpi\r
249};\r
250\r
251EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {\r
252 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
253 &gPeiPostScriptTablePpiGuid,\r
254 0\r
255};\r
256\r
257EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {\r
258 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
259 &gEfiEndOfPeiSignalPpiGuid,\r
260 0\r
261};\r
262\r
263EFI_PEI_PPI_DESCRIPTOR mPpiListS3SmmInitDoneTable = {\r
264 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
265 &gEdkiiS3SmmInitDoneGuid,\r
266 0\r
267};\r
268\r
269//\r
270// Global Descriptor Table (GDT)\r
271//\r
272GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r
273/* selector { Global Segment Descriptor } */\r
274/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
275/* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
276/* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},\r
277/* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},\r
278/* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
279/* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},\r
280/* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},\r
281/* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},\r
282/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},\r
283};\r
284\r
285#define DATA_SEGEMENT_SELECTOR 0x18\r
286\r
287//\r
288// IA32 Gdt register\r
289//\r
290GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {\r
291 sizeof (mGdtEntries) - 1,\r
292 (UINTN) mGdtEntries\r
293 };\r
294\r
295\r
296/**\r
297 The function will check if current waking vector is long mode.\r
298\r
299 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
300\r
301 @retval TRUE Current context need long mode waking vector.\r
302 @retval FALSE Current context need not long mode waking vector.\r
303**/\r
304BOOLEAN\r
305IsLongModeWakingVector (\r
306 IN ACPI_S3_CONTEXT *AcpiS3Context\r
307 )\r
308{\r
309 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r
310\r
311 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r
312 if ((Facs == NULL) ||\r
313 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r
314 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r
315 // Something wrong with FACS\r
316 return FALSE;\r
317 }\r
318 if (Facs->XFirmwareWakingVector != 0) {\r
319 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r
320 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r
321 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r
322 // Both BIOS and OS wants 64bit vector\r
323 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
324 return TRUE;\r
325 }\r
326 }\r
327 }\r
328 return FALSE;\r
329}\r
330\r
331/**\r
332 Signal to SMM through communication buffer way.\r
333\r
334 @param[in] HandlerType SMI handler type to be signaled.\r
335\r
336**/\r
337VOID\r
338SignalToSmmByCommunication (\r
339 IN EFI_GUID *HandlerType\r
340 )\r
341{\r
342 EFI_STATUS Status;\r
343 EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;\r
344 UINTN CommSize;\r
345 SMM_COMMUNICATE_HEADER_32 Header32;\r
346 SMM_COMMUNICATE_HEADER_64 Header64;\r
347 VOID *CommBuffer;\r
348\r
349 DEBUG ((DEBUG_INFO, "Signal %g to SMM - Enter\n", HandlerType));\r
350\r
351 //\r
352 // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.\r
353 // Detect whether DXE is 64 bits mode.\r
354 // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.\r
355 // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), DXE will switch to 64 bits.\r
356 //\r
357 if ((sizeof(UINTN) == sizeof(UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {\r
358 CommBuffer = &Header64;\r
359 Header64.MessageLength = 0;\r
360 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);\r
361 } else {\r
362 CommBuffer = &Header32;\r
363 Header32.MessageLength = 0;\r
364 CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);\r
365 }\r
366 CopyGuid (CommBuffer, HandlerType);\r
367\r
368 Status = PeiServicesLocatePpi (\r
369 &gEfiPeiSmmCommunicationPpiGuid,\r
370 0,\r
371 NULL,\r
372 (VOID **)&SmmCommunicationPpi\r
373 );\r
374 if (EFI_ERROR (Status)) {\r
375 DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));\r
376 return;\r
377 }\r
378\r
379 Status = SmmCommunicationPpi->Communicate (\r
380 SmmCommunicationPpi,\r
381 (VOID *)CommBuffer,\r
382 &CommSize\r
383 );\r
384 if (EFI_ERROR (Status)) {\r
385 DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));\r
386 }\r
387\r
388 DEBUG ((DEBUG_INFO, "Signal %g to SMM - Exit (%r)\n", HandlerType, Status));\r
389 return;\r
390}\r
391\r
392/**\r
393 Jump to OS waking vector.\r
394 The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.\r
395\r
396 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
397 @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE\r
398**/\r
399VOID\r
400EFIAPI\r
401S3ResumeBootOs (\r
402 IN ACPI_S3_CONTEXT *AcpiS3Context,\r
403 IN PEI_S3_RESUME_STATE *PeiS3ResumeState\r
404 )\r
405{\r
406 EFI_STATUS Status;\r
407 EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r
408 ASM_TRANSFER_CONTROL AsmTransferControl;\r
409 UINTN TempStackTop;\r
410 UINTN TempStack[0x10];\r
411\r
412 //\r
413 // Restore IDT\r
414 //\r
415 AsmWriteIdtr (&PeiS3ResumeState->Idtr);\r
416\r
417 if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {\r
418 //\r
419 // Report Status code that boot script execution is failed\r
420 //\r
421 REPORT_STATUS_CODE (\r
422 EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
423 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)\r
424 );\r
425 }\r
426\r
427 //\r
428 // NOTE: Because Debug Timer interrupt and system interrupts will be disabled\r
429 // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted\r
430 // by soft debugger.\r
431 //\r
432\r
433 PERF_INMODULE_END ("ScriptExec");\r
434\r
435 //\r
436 // Install BootScriptDonePpi\r
437 //\r
438 PERF_INMODULE_BEGIN ("BootScriptDonePpi");\r
439\r
440 Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);\r
441 ASSERT_EFI_ERROR (Status);\r
442\r
443 PERF_INMODULE_END ("BootScriptDonePpi");\r
444\r
445 //\r
446 // Get ACPI Table Address\r
447 //\r
448 Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r
449\r
450 if ((Facs == NULL) ||\r
451 (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r
452 ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r
453 //\r
454 // Report Status code that no valid vector is found\r
455 //\r
456 REPORT_STATUS_CODE (\r
457 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
458 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r
459 );\r
460 CpuDeadLoop ();\r
461 return ;\r
462 }\r
463\r
464 //\r
465 // Install EndOfPeiPpi\r
466 //\r
467 PERF_INMODULE_BEGIN("EndOfPeiPpi");\r
468\r
469 Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);\r
470 ASSERT_EFI_ERROR (Status);\r
471\r
472 PERF_INMODULE_END("EndOfPeiPpi");\r
473\r
474 PERF_INMODULE_BEGIN("EndOfS3Resume");\r
475\r
476 DEBUG ((DEBUG_INFO, "Signal EndOfS3Resume\n"));\r
477 //\r
478 // Signal EndOfS3Resume to SMM.\r
479 //\r
480 SignalToSmmByCommunication (&gEdkiiEndOfS3ResumeGuid);\r
481\r
482 PERF_INMODULE_END ("EndOfS3Resume");\r
483\r
484 //\r
485 // report status code on S3 resume\r
486 //\r
487 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);\r
488\r
489 AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;\r
490 if (Facs->XFirmwareWakingVector != 0) {\r
491 //\r
492 // Switch to native waking vector\r
493 //\r
494 TempStackTop = (UINTN)&TempStack + sizeof(TempStack);\r
495 DEBUG ((\r
496 DEBUG_INFO,\r
497 "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",\r
498 __FUNCTION__,\r
499 TempStackTop,\r
500 sizeof (TempStack)\r
501 ));\r
502 if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r
503 ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r
504 ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r
505 //\r
506 // X64 long mode waking vector\r
507 //\r
508 DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r
509 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
510 AsmEnablePaging64 (\r
511 0x38,\r
512 Facs->XFirmwareWakingVector,\r
513 0,\r
514 0,\r
515 (UINT64)(UINTN)TempStackTop\r
516 );\r
517 } else {\r
518 //\r
519 // Report Status code that no valid waking vector is found\r
520 //\r
521 REPORT_STATUS_CODE (\r
522 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
523 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r
524 );\r
525 DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));\r
526 ASSERT (FALSE);\r
527 CpuDeadLoop ();\r
528 return ;\r
529 }\r
530 } else {\r
531 //\r
532 // IA32 protected mode waking vector (Page disabled)\r
533 //\r
534 DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r
535 SwitchStack (\r
536 (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,\r
537 NULL,\r
538 NULL,\r
539 (VOID *)(UINTN)TempStackTop\r
540 );\r
541 }\r
542 } else {\r
543 //\r
544 // 16bit Realmode waking vector\r
545 //\r
546 DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));\r
547 AsmTransferControl (Facs->FirmwareWakingVector, 0x0);\r
548 }\r
549\r
550 //\r
551 // Report Status code the failure of S3Resume\r
552 //\r
553 REPORT_STATUS_CODE (\r
554 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
555 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r
556 );\r
557\r
558 //\r
559 // Never run to here\r
560 //\r
561 CpuDeadLoop();\r
562}\r
563\r
564/**\r
565 Restore S3 page table because we do not trust ACPINvs content.\r
566 If BootScriptExector driver will not run in 64-bit mode, this function will do nothing.\r
567\r
568 @param S3NvsPageTableAddress PageTableAddress in ACPINvs\r
569 @param Build4GPageTableOnly If BIOS just build 4G page table only\r
570**/\r
571VOID\r
572RestoreS3PageTables (\r
573 IN UINTN S3NvsPageTableAddress,\r
574 IN BOOLEAN Build4GPageTableOnly\r
575 )\r
576{\r
577 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
578 UINT32 RegEax;\r
579 UINT32 RegEdx;\r
580 UINT8 PhysicalAddressBits;\r
581 EFI_PHYSICAL_ADDRESS PageAddress;\r
582 UINTN IndexOfPml4Entries;\r
583 UINTN IndexOfPdpEntries;\r
584 UINTN IndexOfPageDirectoryEntries;\r
585 UINT32 NumberOfPml4EntriesNeeded;\r
586 UINT32 NumberOfPdpEntriesNeeded;\r
587 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r
588 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r
589 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r
590 PAGE_TABLE_ENTRY *PageDirectoryEntry;\r
591 VOID *Hob;\r
592 BOOLEAN Page1GSupport;\r
593 PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;\r
594 UINT64 AddressEncMask;\r
595\r
596 //\r
597 // Make sure AddressEncMask is contained to smallest supported address field\r
598 //\r
599 AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;\r
600\r
601 //\r
602 // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.\r
603 // The whole page table is too large to be saved in SMRAM.\r
604 //\r
605 // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.\r
606 //\r
607 DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));\r
608\r
609 //\r
610 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r
611 //\r
612 PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r
613 S3NvsPageTableAddress += SIZE_4KB;\r
614\r
615 Page1GSupport = FALSE;\r
616 if (PcdGetBool(PcdUse1GPageTable)) {\r
617 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
618 if (RegEax >= 0x80000001) {\r
619 AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r
620 if ((RegEdx & BIT26) != 0) {\r
621 Page1GSupport = TRUE;\r
622 }\r
623 }\r
624 }\r
625\r
626 //\r
627 // Get physical address bits supported.\r
628 //\r
629 Hob = GetFirstHob (EFI_HOB_TYPE_CPU);\r
630 if (Hob != NULL) {\r
631 PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;\r
632 } else {\r
633 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
634 if (RegEax >= 0x80000008) {\r
635 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
636 PhysicalAddressBits = (UINT8) RegEax;\r
637 } else {\r
638 PhysicalAddressBits = 36;\r
639 }\r
640 }\r
641\r
642 //\r
643 // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.\r
644 //\r
645 ASSERT (PhysicalAddressBits <= 52);\r
646 if (PhysicalAddressBits > 48) {\r
647 PhysicalAddressBits = 48;\r
648 }\r
649\r
650 //\r
651 // NOTE: In order to save time to create full page table, we just create 4G page table by default.\r
652 // And let PF handler in BootScript driver to create more on request.\r
653 //\r
654 if (Build4GPageTableOnly) {\r
655 PhysicalAddressBits = 32;\r
656 ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));\r
657 }\r
658 //\r
659 // Calculate the table entries needed.\r
660 //\r
661 if (PhysicalAddressBits <= 39) {\r
662 NumberOfPml4EntriesNeeded = 1;\r
663 NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r
664 } else {\r
665 NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));\r
666 NumberOfPdpEntriesNeeded = 512;\r
667 }\r
668\r
669 PageMapLevel4Entry = PageMap;\r
670 PageAddress = 0;\r
671 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r
672 //\r
673 // Each PML4 entry points to a page of Page Directory Pointer entires.\r
674 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r
675 //\r
676 PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r
677 S3NvsPageTableAddress += SIZE_4KB;\r
678\r
679 //\r
680 // Make a PML4 Entry\r
681 //\r
682 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r
683 PageMapLevel4Entry->Bits.ReadWrite = 1;\r
684 PageMapLevel4Entry->Bits.Present = 1;\r
685\r
686 if (Page1GSupport) {\r
687 PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;\r
688\r
689 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {\r
690 //\r
691 // Fill in the Page Directory entries\r
692 //\r
693 PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
694 PageDirectory1GEntry->Bits.ReadWrite = 1;\r
695 PageDirectory1GEntry->Bits.Present = 1;\r
696 PageDirectory1GEntry->Bits.MustBe1 = 1;\r
697 }\r
698 } else {\r
699 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r
700 //\r
701 // Each Directory Pointer entries points to a page of Page Directory entires.\r
702 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r
703 //\r
704 PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;\r
705 S3NvsPageTableAddress += SIZE_4KB;\r
706\r
707 //\r
708 // Fill in a Page Directory Pointer Entries\r
709 //\r
710 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r
711 PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r
712 PageDirectoryPointerEntry->Bits.Present = 1;\r
713\r
714 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {\r
715 //\r
716 // Fill in the Page Directory entries\r
717 //\r
718 PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
719 PageDirectoryEntry->Bits.ReadWrite = 1;\r
720 PageDirectoryEntry->Bits.Present = 1;\r
721 PageDirectoryEntry->Bits.MustBe1 = 1;\r
722 }\r
723 }\r
724 }\r
725 }\r
726 return ;\r
727 } else {\r
728 //\r
729 // If DXE is running 32-bit mode, no need to establish page table.\r
730 //\r
731 return ;\r
732 }\r
733}\r
734\r
735/**\r
736 Jump to boot script executor driver.\r
737\r
738 The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.\r
739\r
740 @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
741 @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in\r
742 boot script execute driver\r
743**/\r
744VOID\r
745EFIAPI\r
746S3ResumeExecuteBootScript (\r
747 IN ACPI_S3_CONTEXT *AcpiS3Context,\r
748 IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable\r
749 )\r
750{\r
751 EFI_STATUS Status;\r
752 PEI_SMM_ACCESS_PPI *SmmAccess;\r
753 UINTN Index;\r
754 VOID *GuidHob;\r
755 IA32_DESCRIPTOR *IdtDescriptor;\r
756 VOID *IdtBuffer;\r
757 PEI_S3_RESUME_STATE *PeiS3ResumeState;\r
758 BOOLEAN InterruptStatus;\r
759\r
760 DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));\r
761\r
762 //\r
763 // Attempt to use content from SMRAM first\r
764 //\r
765 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r
766 if (GuidHob != NULL) {\r
767 //\r
768 // Last step for SMM - send SMI for initialization\r
769 //\r
770\r
771 //\r
772 // Send SMI to APs\r
773 //\r
774 SendSmiIpiAllExcludingSelf ();\r
775 //\r
776 // Send SMI to BSP\r
777 //\r
778 SendSmiIpi (GetApicId ());\r
779\r
780 Status = PeiServicesLocatePpi (\r
781 &gPeiSmmAccessPpiGuid,\r
782 0,\r
783 NULL,\r
784 (VOID **) &SmmAccess\r
785 );\r
786 if (!EFI_ERROR (Status)) {\r
787 DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));\r
788\r
789 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r
790 Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r
791 }\r
792\r
793 DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));\r
794\r
795 for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r
796 Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r
797 }\r
798 }\r
799\r
800 DEBUG ((DEBUG_INFO, "Signal S3SmmInitDone\n"));\r
801 //\r
802 // Install S3SmmInitDone PPI.\r
803 //\r
804 Status = PeiServicesInstallPpi (&mPpiListS3SmmInitDoneTable);\r
805 ASSERT_EFI_ERROR (Status);\r
806 //\r
807 // Signal S3SmmInitDone to SMM.\r
808 //\r
809 SignalToSmmByCommunication (&gEdkiiS3SmmInitDoneGuid);\r
810 }\r
811\r
812 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
813 AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);\r
814 }\r
815\r
816 if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {\r
817 //\r
818 // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices\r
819 // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)).\r
820 //\r
821 IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);\r
822 //\r
823 // Make sure the newly allocated IDT align with 16-bytes\r
824 //\r
825 IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));\r
826 if (IdtBuffer == NULL) {\r
827 REPORT_STATUS_CODE (\r
828 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
829 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r
830 );\r
831 ASSERT (FALSE);\r
832 }\r
833 //\r
834 // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer\r
835 // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code\r
836 //\r
837 ZeroMem (IdtBuffer, 16);\r
838 AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);\r
839 CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));\r
840 IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);\r
841 *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();\r
842 }\r
843\r
844 InterruptStatus = SaveAndDisableInterrupts ();\r
845 //\r
846 // Need to make sure the GDT is loaded with values that support long mode and real mode.\r
847 //\r
848 AsmWriteGdtr (&mGdt);\r
849 //\r
850 // update segment selectors per the new GDT.\r
851 //\r
852 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r
853 //\r
854 // Restore interrupt state.\r
855 //\r
856 SetInterruptState (InterruptStatus);\r
857\r
858 //\r
859 // Prepare data for return back\r
860 //\r
861 PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));\r
862 if (PeiS3ResumeState == NULL) {\r
863 REPORT_STATUS_CODE (\r
864 EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r
865 (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r
866 );\r
867 ASSERT (FALSE);\r
868 }\r
869 DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));\r
870 PeiS3ResumeState->ReturnCs = 0x10;\r
871 PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;\r
872 PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r
873 //\r
874 // Save IDT\r
875 //\r
876 AsmReadIdtr (&PeiS3ResumeState->Idtr);\r
877\r
878 //\r
879 // Report Status Code to indicate S3 boot script execution\r
880 //\r
881 REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);\r
882\r
883 PERF_INMODULE_BEGIN ("ScriptExec");\r
884\r
885 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
886 //\r
887 // X64 S3 Resume\r
888 //\r
889 DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));\r
890\r
891 //\r
892 // Switch to long mode to complete resume.\r
893 //\r
894 AsmEnablePaging64 (\r
895 0x38,\r
896 EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r
897 (UINT64)(UINTN)AcpiS3Context,\r
898 (UINT64)(UINTN)PeiS3ResumeState,\r
899 (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r
900 );\r
901 } else {\r
902 //\r
903 // IA32 S3 Resume\r
904 //\r
905 DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));\r
906 SwitchStack (\r
907 (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r
908 (VOID *)AcpiS3Context,\r
909 (VOID *)PeiS3ResumeState,\r
910 (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r
911 );\r
912 }\r
913\r
914 //\r
915 // Never run to here\r
916 //\r
917 CpuDeadLoop();\r
918}\r
919/**\r
920 Restores the platform to its preboot configuration for an S3 resume and\r
921 jumps to the OS waking vector.\r
922\r
923 This function will restore the platform to its pre-boot configuration that was\r
924 pre-stored in the boot script table and transfer control to OS waking vector.\r
925 Upon invocation, this function is responsible for locating the following\r
926 information before jumping to OS waking vector:\r
927 - ACPI tables\r
928 - boot script table\r
929 - any other information that it needs\r
930\r
931 The S3RestoreConfig() function then executes the pre-stored boot script table\r
932 and transitions the platform to the pre-boot state. The boot script is recorded\r
933 during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r
934 EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r
935 transfers control to the OS waking vector. If the OS supports only a real-mode\r
936 waking vector, this function will switch from flat mode to real mode before\r
937 jumping to the waking vector. If all platform pre-boot configurations are\r
938 successfully restored and all other necessary information is ready, this\r
939 function will never return and instead will directly jump to the OS waking\r
940 vector. If this function returns, it indicates that the attempt to resume\r
941 from the ACPI S3 sleep state failed.\r
942\r
943 @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r
944\r
945 @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r
946 @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r
947 resume boot path could not be located.\r
948\r
949**/\r
950EFI_STATUS\r
951EFIAPI\r
952S3RestoreConfig2 (\r
953 IN EFI_PEI_S3_RESUME2_PPI *This\r
954 )\r
955{\r
956 EFI_STATUS Status;\r
957 PEI_SMM_ACCESS_PPI *SmmAccess;\r
958 UINTN Index;\r
959 ACPI_S3_CONTEXT *AcpiS3Context;\r
960 EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;\r
961 EFI_PHYSICAL_ADDRESS TempAcpiS3Context;\r
962 BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;\r
963 UINTN VarSize;\r
964 EFI_SMRAM_DESCRIPTOR *SmramDescriptor;\r
965 SMM_S3_RESUME_STATE *SmmS3ResumeState;\r
966 VOID *GuidHob;\r
967 BOOLEAN Build4GPageTableOnly;\r
968 BOOLEAN InterruptStatus;\r
969\r
970 TempAcpiS3Context = 0;\r
971 TempEfiBootScriptExecutorVariable = 0;\r
972\r
973 DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));\r
974\r
975 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r
976 Status = RestoreLockBox (\r
977 &gEfiAcpiVariableGuid,\r
978 &TempAcpiS3Context,\r
979 &VarSize\r
980 );\r
981 ASSERT_EFI_ERROR (Status);\r
982\r
983 Status = RestoreLockBox (\r
984 &gEfiAcpiS3ContextGuid,\r
985 NULL,\r
986 NULL\r
987 );\r
988 ASSERT_EFI_ERROR (Status);\r
989\r
990 AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;\r
991 ASSERT (AcpiS3Context != NULL);\r
992\r
993 VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r
994 Status = RestoreLockBox (\r
995 &gEfiBootScriptExecutorVariableGuid,\r
996 &TempEfiBootScriptExecutorVariable,\r
997 &VarSize\r
998 );\r
999 ASSERT_EFI_ERROR (Status);\r
1000\r
1001 Status = RestoreLockBox (\r
1002 &gEfiBootScriptExecutorContextGuid,\r
1003 NULL,\r
1004 NULL\r
1005 );\r
1006 ASSERT_EFI_ERROR (Status);\r
1007\r
1008 EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;\r
1009 ASSERT (EfiBootScriptExecutorVariable != NULL);\r
1010\r
1011 DEBUG (( DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));\r
1012 DEBUG (( DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));\r
1013 DEBUG (( DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));\r
1014 DEBUG (( DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile));\r
1015 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));\r
1016 DEBUG (( DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));\r
1017 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));\r
1018 DEBUG (( DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));\r
1019 DEBUG (( DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));\r
1020\r
1021 //\r
1022 // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.\r
1023 // Script dispatch image and context (parameter) are handled by platform.\r
1024 // We just use restore all lock box in place, no need restore one by one.\r
1025 //\r
1026 Status = RestoreAllLockBoxInPlace ();\r
1027 ASSERT_EFI_ERROR (Status);\r
1028 if (EFI_ERROR (Status)) {\r
1029 // Something wrong\r
1030 CpuDeadLoop ();\r
1031 }\r
1032\r
1033 if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
1034 //\r
1035 // Need reconstruct page table here, since we do not trust ACPINvs.\r
1036 //\r
1037 if (IsLongModeWakingVector (AcpiS3Context)) {\r
1038 Build4GPageTableOnly = FALSE;\r
1039 } else {\r
1040 Build4GPageTableOnly = TRUE;\r
1041 }\r
1042 RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);\r
1043 }\r
1044\r
1045 //\r
1046 // Attempt to use content from SMRAM first\r
1047 //\r
1048 GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r
1049 if (GuidHob != NULL) {\r
1050 Status = PeiServicesLocatePpi (\r
1051 &gPeiSmmAccessPpiGuid,\r
1052 0,\r
1053 NULL,\r
1054 (VOID **) &SmmAccess\r
1055 );\r
1056 for (Index = 0; !EFI_ERROR (Status); Index++) {\r
1057 Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r
1058 }\r
1059\r
1060 SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);\r
1061 SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;\r
1062\r
1063 SmmS3ResumeState->ReturnCs = AsmReadCs ();\r
1064 SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;\r
1065 SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;\r
1066 SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;\r
1067 SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r
1068\r
1069 DEBUG (( DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));\r
1070 DEBUG (( DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));\r
1071 DEBUG (( DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));\r
1072 DEBUG (( DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));\r
1073 DEBUG (( DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));\r
1074 DEBUG (( DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));\r
1075 DEBUG (( DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));\r
1076 DEBUG (( DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));\r
1077 DEBUG (( DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));\r
1078 DEBUG (( DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));\r
1079 DEBUG (( DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));\r
1080 DEBUG (( DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));\r
1081 DEBUG (( DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));\r
1082\r
1083 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {\r
1084 SwitchStack (\r
1085 (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,\r
1086 (VOID *)AcpiS3Context,\r
1087 0,\r
1088 (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)\r
1089 );\r
1090 }\r
1091 if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {\r
1092 //\r
1093 // Switch to long mode to complete resume.\r
1094 //\r
1095\r
1096 InterruptStatus = SaveAndDisableInterrupts ();\r
1097 //\r
1098 // Need to make sure the GDT is loaded with values that support long mode and real mode.\r
1099 //\r
1100 AsmWriteGdtr (&mGdt);\r
1101 //\r
1102 // update segment selectors per the new GDT.\r
1103 //\r
1104 AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r
1105 //\r
1106 // Restore interrupt state.\r
1107 //\r
1108 SetInterruptState (InterruptStatus);\r
1109\r
1110 AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);\r
1111\r
1112 //\r
1113 // Disable interrupt of Debug timer, since IDT table cannot work in long mode.\r
1114 // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,\r
1115 // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.\r
1116 //\r
1117 SaveAndSetDebugTimerInterrupt (FALSE);\r
1118\r
1119 AsmEnablePaging64 (\r
1120 0x38,\r
1121 SmmS3ResumeState->SmmS3ResumeEntryPoint,\r
1122 (UINT64)(UINTN)AcpiS3Context,\r
1123 0,\r
1124 SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize\r
1125 );\r
1126 }\r
1127\r
1128 }\r
1129\r
1130 S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );\r
1131 return EFI_SUCCESS;\r
1132}\r
1133/**\r
1134 Main entry for S3 Resume PEIM.\r
1135\r
1136 This routine is to install EFI_PEI_S3_RESUME2_PPI.\r
1137\r
1138 @param FileHandle Handle of the file being invoked.\r
1139 @param PeiServices Pointer to PEI Services table.\r
1140\r
1141 @retval EFI_SUCCESS S3Resume Ppi is installed successfully.\r
1142\r
1143**/\r
1144EFI_STATUS\r
1145EFIAPI\r
1146PeimS3ResumeEntryPoint (\r
1147 IN EFI_PEI_FILE_HANDLE FileHandle,\r
1148 IN CONST EFI_PEI_SERVICES **PeiServices\r
1149 )\r
1150{\r
1151 EFI_STATUS Status;\r
1152\r
1153 //\r
1154 // Install S3 Resume Ppi\r
1155 //\r
1156 Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);\r
1157 ASSERT_EFI_ERROR (Status);\r
1158\r
1159 return EFI_SUCCESS;\r
1160}\r
1161\r
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