3 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <Library/IoLib.h>
16 #include <Library/ArmTrustZoneLib.h>
17 #include <Library/ArmPlatformLib.h>
18 #include <Library/DebugLib.h>
19 #include <Library/PcdLib.h>
20 #include <Drivers/PL341Dmc.h>
23 struct pl341_dmc_config ddr_timings
= {
24 .base
= ARM_VE_DMC_BASE
,
41 .memory_cfg
= DMC_MEMORY_CONFIG_ACTIVE_CHIP_1
| DMC_MEMORY_CONFIG_BURST_4
|
42 DMC_MEMORY_CONFIG_ROW_ADDRESS_15
| DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10
,
43 .memory_cfg2
= DMC_MEMORY_CFG2_DQM_INIT
| DMC_MEMORY_CFG2_CKE_INIT
|
44 DMC_MEMORY_CFG2_BANK_BITS_3
| DMC_MEMORY_CFG2_MEM_WIDTH_32
,
45 .memory_cfg3
= 0x00000001,
46 .chip_cfg0
= 0x00010000,
51 Return if Trustzone is supported by your platform
53 A non-zero value must be returned if you want to support a Secure World on your platform.
54 ArmVExpressTrustzoneInit() will later set up the secure regions.
55 This function can return 0 even if Trustzone is supported by your processor. In this case,
56 the platform will continue to run in Secure World.
58 @return A non-zero value if Trustzone supported.
61 UINTN
ArmPlatformTrustzoneSupported(VOID
) {
62 return (MmioRead32(ARM_VE_SYS_CFGRW1_REG
) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK
);
66 Initialize the Secure peripherals and memory regions
68 If Trustzone is supported by your platform then this function makes the required initialization
69 of the secure peripherals and memory regions.
72 VOID
ArmPlatformTrustzoneInit(VOID
) {
74 // Setup TZ Protection Controller
77 // Set Non Secure access for all devices
78 TZPCSetDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_0
, 0xFFFFFFFF);
79 TZPCSetDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_1
, 0xFFFFFFFF);
80 TZPCSetDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_2
, 0xFFFFFFFF);
82 // Remove Non secure access to secure devices
83 TZPCClearDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_0
,
84 ARM_VE_DECPROT_BIT_TZPC
| ARM_VE_DECPROT_BIT_DMC_TZASC
| ARM_VE_DECPROT_BIT_NMC_TZASC
| ARM_VE_DECPROT_BIT_SMC_TZASC
);
86 TZPCClearDecProtBits(ARM_VE_TZPC_BASE
, TZPC_DECPROT_2
,
87 ARM_VE_DECPROT_BIT_EXT_MAST_TZ
| ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK
| ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK
| ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK
);
91 // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
94 // NOR Flash 0 non secure (BootMon)
95 TZASCSetRegion(ARM_VE_TZASC_BASE
,1,TZASC_REGION_ENABLED
,
96 ARM_VE_SMB_NOR0_BASE
,0,
97 TZASC_REGION_SIZE_64MB
, TZASC_REGION_SECURITY_NSRW
);
99 // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
100 #if EDK2_ARMVE_SECURE_SYSTEM
101 //Note: Your OS Kernel must be aware of the secure regions before to enable this region
102 TZASCSetRegion(ARM_VE_TZASC_BASE
,2,TZASC_REGION_ENABLED
,
103 ARM_VE_SMB_NOR1_BASE
+ SIZE_32MB
,0,
104 TZASC_REGION_SIZE_32MB
, TZASC_REGION_SECURITY_NSRW
);
106 TZASCSetRegion(ARM_VE_TZASC_BASE
,2,TZASC_REGION_ENABLED
,
107 ARM_VE_SMB_NOR1_BASE
,0,
108 TZASC_REGION_SIZE_64MB
, TZASC_REGION_SECURITY_NSRW
);
111 // Base of SRAM. Only half of SRAM in Non Secure world
112 // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
113 #if EDK2_ARMVE_SECURE_SYSTEM
114 //Note: Your OS Kernel must be aware of the secure regions before to enable this region
115 TZASCSetRegion(ARM_VE_TZASC_BASE
,3,TZASC_REGION_ENABLED
,
116 ARM_VE_SMB_SRAM_BASE
,0,
117 TZASC_REGION_SIZE_16MB
, TZASC_REGION_SECURITY_NSRW
);
119 TZASCSetRegion(ARM_VE_TZASC_BASE
,3,TZASC_REGION_ENABLED
,
120 ARM_VE_SMB_SRAM_BASE
,0,
121 TZASC_REGION_SIZE_32MB
, TZASC_REGION_SECURITY_NSRW
);
124 // Memory Mapped Peripherals. All in non secure world
125 TZASCSetRegion(ARM_VE_TZASC_BASE
,4,TZASC_REGION_ENABLED
,
126 ARM_VE_SMB_PERIPH_BASE
,0,
127 TZASC_REGION_SIZE_64MB
, TZASC_REGION_SECURITY_NSRW
);
129 // MotherBoard Peripherals and On-chip peripherals.
130 TZASCSetRegion(ARM_VE_TZASC_BASE
,5,TZASC_REGION_ENABLED
,
131 ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE
,0,
132 TZASC_REGION_SIZE_256MB
, TZASC_REGION_SECURITY_NSRW
);
136 Remap the memory at 0x0
138 Some platform requires or gives the ability to remap the memory at the address 0x0.
139 This function can do nothing if this feature is not relevant to your platform.
142 VOID
ArmPlatformBootRemapping(VOID
) {
143 UINT32 val32
= MmioRead32(ARM_VE_SYS_CFGRW1_REG
); //Scc - CFGRW1
144 // we remap the DRAM to 0x0
145 MmioWrite32(ARM_VE_SYS_CFGRW1_REG
, (val32
& 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM
);
149 Initialize the system (or sometimes called permanent) memory
151 This memory is generally represented by the DRAM.
154 VOID
ArmPlatformInitializeSystemMemory(VOID
) {
155 PL341DmcInit(&ddr_timings
);
156 PL301AxiInit(ARM_VE_FAXI_BASE
);