ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include <Library/ArmPlatformLib.h>
  16 #include <Library/DebugLib.h>
  17 #include <Library/PcdLib.h>
  18 #include <Library/IoLib.h>
  19 #include <Library/MemoryAllocationLib.h>
  20
  21 // DDR attributes
  22 #define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
  23 #define DDR_ATTRIBUTES_UNCACHED         ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
  24 #define DDR_ATTRIBUTES_SECURE_CACHED    ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK
  25 #define DDR_ATTRIBUTES_SECURE_UNCACHED  ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED
  26
  27 /**
  28   Return the information about the memory region in permanent memory used by PEI
  29
  30   One of the PEI Module must install the permament memory used by PEI. This function returns the
  31   information about this region for your platform to this PEIM module.
  32
  33   @param[out]   PeiMemoryBase       Base of the memory region used by PEI core and modules
  34   @param[out]   PeiMemorySize       Size of the memory region used by PEI core and modules
  35
  36 **/
  37 VOID ArmPlatformGetPeiMemory (
  38     OUT UINTN*                                   PeiMemoryBase,
  39     OUT UINTN*                                   PeiMemorySize
  40     ) {
  41     ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL));
  42
  43     *PeiMemoryBase = ARM_VE_DRAM_BASE + ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;
  44     *PeiMemorySize = ARM_VE_EFI_MEMORY_REGION_SZ;
  45 }
  46
  47 /**
  48   Return the Virtual Memory Map of your platform
  49
  50   This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
  51
  52   @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
  53                                     Virtual Memory mapping. This array must be ended by a zero-filled
  54                                     entry
  55
  56 **/
  57 VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) {
  58     UINT32                        val32;
  59     UINT32                        CacheAttributes;
  60     BOOLEAN                       bTrustzoneSupport;
  61     UINTN                         Index = 0;
  62     ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
  63
  64     ASSERT(VirtualMemoryMap != NULL);
  65
  66     VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 9);
  67     if (VirtualMemoryTable == NULL) {
  68         return;
  69     }
  70
  71     // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.
  72     // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case
  73     val32 = MmioRead32(ARM_VE_SYS_CFGRW1_REG);
  74     if (ARM_VE_CFGRW1_TZASC_EN_BIT_MASK & val32) {
  75         bTrustzoneSupport = TRUE;
  76     } else {
  77         bTrustzoneSupport = FALSE;
  78     }
  79
  80     if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
  81         CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);
  82     } else {
  83         CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);
  84     }
  85
  86     // ReMap (Either NOR Flash or DRAM)
  87     VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
  88     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_REMAP_BASE;
  89     VirtualMemoryTable[Index].Length       = ARM_VE_REMAP_SZ;
  90     VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
  91
  92     // DDR
  93     VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;
  94     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_DRAM_BASE;
  95     VirtualMemoryTable[Index].Length       = ARM_VE_DRAM_SZ;
  96     VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
  97
  98     // SMC CS7
  99     VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
 100     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
 101     VirtualMemoryTable[Index].Length       = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;
 102     VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
 103
 104     // SMB CS0-CS1 - NOR Flash 1 & 2
 105     VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
 106     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_NOR0_BASE;
 107     VirtualMemoryTable[Index].Length       = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
 108     VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
 109
 110     // SMB CS2 - SRAM
 111     VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
 112     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_SRAM_BASE;
 113     VirtualMemoryTable[Index].Length       = ARM_VE_SMB_SRAM_SZ;
 114     VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
 115
 116     // SMB CS3-CS6 - Motherboard Peripherals
 117     VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
 118     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_PERIPH_BASE;
 119     VirtualMemoryTable[Index].Length       = ARM_VE_SMB_PERIPH_SZ;
 120     VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
 121
 122     // If a Logic Tile is connected to The ARM Versatile Express Motherboard
 123     if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {
 124         VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;
 125         VirtualMemoryTable[Index].VirtualBase  = ARM_VE_EXT_AXI_BASE;
 126         VirtualMemoryTable[Index].Length       = ARM_VE_EXT_AXI_SZ;
 127         VirtualMemoryTable[Index].Attributes   = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
 128     }
 129
 130     // End of Table
 131     VirtualMemoryTable[++Index].PhysicalBase = 0;
 132     VirtualMemoryTable[Index].VirtualBase  = 0;
 133     VirtualMemoryTable[Index].Length       = 0;
 134     VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)0;
 135
 136     *VirtualMemoryMap = VirtualMemoryTable;
 137 }
 138
 139 /**
 140   Return the EFI Memory Map of your platform
 141
 142   This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
 143   Descriptor HOBs used by DXE core.
 144
 145   @param[out]   EfiMemoryMap        Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
 146                                     EFI Memory region. This array must be ended by a zero-filled entry
 147
 148 **/
 149 VOID ArmPlatformGetEfiMemoryMap (
 150     OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
 151 ) {
 152     EFI_RESOURCE_ATTRIBUTE_TYPE     Attributes;
 153     UINT64                          MemoryBase;
 154     UINTN                           Index = 0;
 155     ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR  *EfiMemoryTable;
 156
 157     ASSERT(EfiMemoryMap != NULL);
 158
 159     EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6);
 160
 161     Attributes =
 162     (
 163       EFI_RESOURCE_ATTRIBUTE_PRESENT |
 164       EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
 165       EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
 166       EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
 167       EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
 168       EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
 169       EFI_RESOURCE_ATTRIBUTE_TESTED
 170     );
 171     MemoryBase = ARM_VE_DRAM_BASE;
 172
 173     // Memory Reserved for fixed address allocations (such as Exception Vector Table)
 174     EfiMemoryTable[Index].ResourceAttribute = Attributes;
 175     EfiMemoryTable[Index].PhysicalStart = MemoryBase;
 176     EfiMemoryTable[Index].NumberOfBytes = ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;
 177
 178     MemoryBase += ARM_VE_EFI_FIX_ADDRESS_REGION_SZ;
 179
 180     // Memory declared to PEI as permanent memory for PEI and DXE
 181     EfiMemoryTable[++Index].ResourceAttribute = Attributes;
 182     EfiMemoryTable[Index].PhysicalStart = MemoryBase;
 183     EfiMemoryTable[Index].NumberOfBytes = ARM_VE_EFI_MEMORY_REGION_SZ;
 184
 185     MemoryBase += ARM_VE_EFI_MEMORY_REGION_SZ;
 186
 187     // We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000
 188     if (FeaturePcdGet(PcdStandalone) == FALSE) {
 189         // Chunk between the EFI Memory region and the firmware
 190         EfiMemoryTable[++Index].ResourceAttribute = Attributes;
 191         EfiMemoryTable[Index].PhysicalStart = MemoryBase;
 192         EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase;
 193
 194         // Chunk reserved by the firmware in DRAM
 195         EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
 196         EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress);
 197         EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize);
 198
 199         MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);
 200     }
 201
 202     // We allocate all the remain memory as untested system memory
 203     EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED);
 204     EfiMemoryTable[Index].PhysicalStart = MemoryBase;
 205     EfiMemoryTable[Index].NumberOfBytes = ARM_VE_DRAM_SZ - (MemoryBase-ARM_VE_DRAM_BASE);
 206
 207     EfiMemoryTable[++Index].ResourceAttribute = 0;
 208     EfiMemoryTable[Index].PhysicalStart = 0;
 209     EfiMemoryTable[Index].NumberOfBytes = 0;
 210
 211     *EfiMemoryMap = EfiMemoryTable;
 212 }