1 /** @file NorFlashDxe.h
3 Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #ifndef __NOR_FLASH_DXE_H__
15 #define __NOR_FLASH_DXE_H__
21 #include <Protocol/BlockIo.h>
22 #include <Protocol/FirmwareVolumeBlock.h>
24 #include <Library/DebugLib.h>
25 #include <Library/IoLib.h>
26 #include <Library/NorFlashPlatformLib.h>
27 #include <Library/UefiLib.h>
29 #define HIGH_16_BITS 0xFFFF0000
30 #define LOW_16_BITS 0x0000FFFF
31 #define LOW_8_BITS 0x000000FF
33 // Device access macros
34 // These are necessary because we use 2 x 16bit parts to make up 32bit data
36 #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
38 #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
39 #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
41 // Each command must be sent simultaneously to both chips,
42 // i.e. at the lower 16 bits AND at the higher 16 bits
43 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
44 #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
45 #define SEND_NOR_COMMAND(BaseAddr,OffsetAddr,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr), CREATE_DUAL_CMD(Cmd))
46 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
48 // Status Register Bits
49 #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
50 #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
51 #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
52 #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
53 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
54 #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
55 #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
56 #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
58 // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
60 // On chip buffer size for buffered programming operations
61 // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
62 // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
63 #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
64 #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
65 #define MAX_BUFFERED_PROG_ITERATIONS 10000000
66 #define BOUNDARY_OF_32_WORDS 0x7F
69 #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
70 #define P30_CFI_ADDR_VENDOR_ID 0x13
73 #define CFI_QRY 0x00595251
76 #define P30_CMD_READ_DEVICE_ID 0x0090
77 #define P30_CMD_READ_STATUS_REGISTER 0x0070
78 #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
79 #define P30_CMD_READ_ARRAY 0x00FF
80 #define P30_CMD_READ_CFI_QUERY 0x0098
83 #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
84 #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
85 #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
86 #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
87 #define P30_CMD_BEFP_SETUP 0x0080
88 #define P30_CMD_BEFP_CONFIRM 0x00D0
91 #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
92 #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
95 #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
96 #define P30_CMD_SUSPEND_RESUME 0x00D0
98 // BLOCK LOCKING / UNLOCKING Commands
99 #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
100 #define P30_CMD_LOCK_BLOCK 0x0001
101 #define P30_CMD_UNLOCK_BLOCK 0x00D0
102 #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
104 // PROTECTION Commands
105 #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
107 // CONFIGURATION Commands
108 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
109 #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
111 #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
112 #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
113 #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
115 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE
;
117 typedef EFI_STATUS (*NOR_FLASH_INITIALIZE
) (NOR_FLASH_INSTANCE
* Instance
);
120 VENDOR_DEVICE_PATH Vendor
;
121 EFI_DEVICE_PATH_PROTOCOL End
;
122 } NOR_FLASH_DEVICE_PATH
;
124 struct _NOR_FLASH_INSTANCE
{
129 NOR_FLASH_INITIALIZE Initialize
;
135 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol
;
136 EFI_BLOCK_IO_MEDIA Media
;
139 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol
;
141 NOR_FLASH_DEVICE_PATH DevicePath
;
146 NorFlashGetDriverName (
147 IN EFI_COMPONENT_NAME_PROTOCOL
*This
,
149 OUT CHAR16
**DriverName
154 NorFlashGetControllerName (
155 IN EFI_COMPONENT_NAME_PROTOCOL
*This
,
156 IN EFI_HANDLE ControllerHandle
,
157 IN EFI_HANDLE ChildHandle OPTIONAL
,
159 OUT CHAR16
**ControllerName
164 NorFlashBlkIoInitialize (
165 IN NOR_FLASH_INSTANCE
* Instance
169 NorFlashReadCfiData (
170 IN UINTN BaseAddress
,
172 IN UINT32 NumberOfBytes
,
177 NorFlashWriteBuffer (
178 IN UINTN TargetAddress
,
179 IN UINTN BufferSizeInBytes
,
185 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
189 NorFlashBlockIoReset (
190 IN EFI_BLOCK_IO_PROTOCOL
*This
,
191 IN BOOLEAN ExtendedVerification
195 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
199 NorFlashBlockIoReadBlocks (
200 IN EFI_BLOCK_IO_PROTOCOL
*This
,
203 IN UINTN BufferSizeInBytes
,
208 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
212 NorFlashBlockIoWriteBlocks (
213 IN EFI_BLOCK_IO_PROTOCOL
*This
,
216 IN UINTN BufferSizeInBytes
,
221 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
225 NorFlashBlockIoFlushBlocks (
226 IN EFI_BLOCK_IO_PROTOCOL
*This
236 NorFlashFvbInitialize (
237 IN NOR_FLASH_INSTANCE
* Instance
243 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
244 OUT EFI_FVB_ATTRIBUTES_2
*Attributes
250 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
251 IN OUT EFI_FVB_ATTRIBUTES_2
*Attributes
256 FvbGetPhysicalAddress(
257 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
258 OUT EFI_PHYSICAL_ADDRESS
*Address
264 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
266 OUT UINTN
*BlockSize
,
267 OUT UINTN
*NumberOfBlocks
273 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
276 IN OUT UINTN
*NumBytes
,
283 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
286 IN OUT UINTN
*NumBytes
,
293 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
302 NorFlashUnlockAndEraseSingleBlock(
303 IN UINTN BlockAddress
307 NorFlashWriteSingleBlock (
308 IN UINTN DeviceBaseAddress
,
310 IN UINT32
*pDataBuffer
,
311 IN UINT32 BlockSizeInWords
315 NorFlashWriteBlocks (
316 IN NOR_FLASH_INSTANCE
*Instance
,
318 IN UINTN BufferSizeInBytes
,
324 IN NOR_FLASH_INSTANCE
*Instance
,
326 IN UINTN BufferSizeInBytes
,
332 IN NOR_FLASH_INSTANCE
*Instance
335 #endif /* __NOR_FLASH_DXE_H__ */