ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c

   1 /** @file
   2
   3   Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
   4
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14 #include <Library/DebugLib.h>
  15 #include <Library/IoLib.h>
  16 #include <Library/LcdHwLib.h>
  17 #include <Library/LcdPlatformLib.h>
  18 #include <Library/MemoryAllocationLib.h>
  19
  20 #include "PL111Lcd.h"
  21
  22 /** This file contains all the bits of the PL111 that are
  23   platform independent.
  24
  25 **/
  26 EFI_STATUS
  27 LcdIdentify (
  28   VOID
  29   )
  30 {
  31   DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL111\n",
  32     PL111_REG_CLCD_PERIPH_ID_0));
  33
  34   // Check if this is a PL111
  35   if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&
  36       MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&
  37      (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&
  38       MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&
  39       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&
  40       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&
  41       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&
  42       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {
  43     return EFI_SUCCESS;
  44   }
  45   return EFI_NOT_FOUND;
  46 }
  47
  48 EFI_STATUS
  49 LcdInitialize (
  50   IN EFI_PHYSICAL_ADDRESS   VramBaseAddress
  51   )
  52 {
  53   // Define start of the VRAM. This never changes for any graphics mode
  54   MmioWrite32 (PL111_REG_LCD_UP_BASE, (UINT32)VramBaseAddress);
  55   MmioWrite32 (PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer
  56
  57   // Disable all interrupts from the PL111
  58   MmioWrite32 (PL111_REG_LCD_IMSC, 0);
  59
  60   return EFI_SUCCESS;
  61 }
  62
  63 EFI_STATUS
  64 LcdSetMode (
  65   IN UINT32  ModeNumber
  66   )
  67 {
  68   EFI_STATUS        Status;
  69   UINT32            HRes;
  70   UINT32            HSync;
  71   UINT32            HBackPorch;
  72   UINT32            HFrontPorch;
  73   UINT32            VRes;
  74   UINT32            VSync;
  75   UINT32            VBackPorch;
  76   UINT32            VFrontPorch;
  77   UINT32            LcdControl;
  78   LCD_BPP           LcdBpp;
  79
  80   // Set the video mode timings and other relevant information
  81   Status = LcdPlatformGetTimings (
  82              ModeNumber,
  83              &HRes,
  84              &HSync,
  85              &HBackPorch,
  86              &HFrontPorch,
  87              &VRes,
  88              &VSync,
  89              &VBackPorch,
  90              &VFrontPorch
  91              );
  92   ASSERT_EFI_ERROR (Status);
  93   if (EFI_ERROR (Status)) {
  94     return EFI_DEVICE_ERROR;
  95   }
  96
  97   Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);
  98   ASSERT_EFI_ERROR (Status);
  99   if (EFI_ERROR (Status)) {
 100     return EFI_DEVICE_ERROR;
 101   }
 102
 103   // Disable the CLCD_LcdEn bit
 104   LcdControl = MmioRead32 (PL111_REG_LCD_CONTROL);
 105   MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl & ~1);
 106
 107   // Set Timings
 108   MmioWrite32 (
 109     PL111_REG_LCD_TIMING_0,
 110     HOR_AXIS_PANEL (HBackPorch, HFrontPorch, HSync, HRes)
 111     );
 112
 113   MmioWrite32 (
 114     PL111_REG_LCD_TIMING_1,
 115     VER_AXIS_PANEL (VBackPorch, VFrontPorch, VSync, VRes)
 116     );
 117
 118   MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY (HRes));
 119   MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);
 120
 121   // PL111_REG_LCD_CONTROL
 122   LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP (LcdBpp) |
 123                PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;
 124   MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
 125
 126   // Turn on power to the LCD Panel
 127   LcdControl |= PL111_CTRL_LCD_PWR;
 128   MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
 129
 130   return EFI_SUCCESS;
 131 }
 132
 133 VOID
 134 LcdShutdown (
 135   VOID
 136   )
 137 {
 138   // Disable the controller
 139   MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);
 140 }