ArmPlatformPkg/PrePeiCore/PrePeiCore.h

   1 /** @file
   2 *  Main file supporting the transition to PEI Core in Normal World for Versatile Express
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 *
   8 **/
   9 #ifndef __PREPEICORE_H_
  10 #define __PREPEICORE_H_
  11
  12 #include <Library/ArmLib.h>
  13 #include <Library/ArmPlatformLib.h>
  14 #include <Library/BaseMemoryLib.h>
  15 #include <Library/DebugLib.h>
  16 #include <Library/IoLib.h>
  17 #include <Library/PcdLib.h>
  18
  19 #include <PiPei.h>
  20 #include <Ppi/TemporaryRamSupport.h>
  21
  22 VOID
  23 CreatePpiList (
  24   OUT UINTN                   *PpiListSize,
  25   OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
  26   );
  27
  28 EFI_STATUS
  29 EFIAPI
  30 PrePeiCoreTemporaryRamSupport (
  31   IN CONST EFI_PEI_SERVICES   **PeiServices,
  32   IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
  33   IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
  34   IN UINTN                    CopySize
  35   );
  36
  37 VOID
  38 SecSwitchStack (
  39   INTN    StackDelta
  40   );
  41
  42 // Vector Table for Pei Phase
  43 VOID  PeiVectorTable (VOID);
  44
  45 VOID
  46 EFIAPI
  47 PrimaryMain (
  48   IN  EFI_PEI_CORE_ENTRY_POINT  PeiCoreEntryPoint
  49   );
  50
  51 /*
  52  * This is the main function for secondary cores. They loop around until a non Null value is written to
  53  * SYS_FLAGS register.The SYS_FLAGS register is platform specific.
  54  * Note:The secondary cores, while executing secondary_main, assumes that:
  55  *      : SGI 0 is configured as Non-secure interrupt
  56  *      : Priority Mask is configured to allow SGI 0
  57  *      : Interrupt Distributor and CPU interfaces are enabled
  58  *
  59  */
  60 VOID
  61 EFIAPI
  62 SecondaryMain (
  63   IN UINTN MpId
  64   );
  65
  66 VOID
  67 PeiCommonExceptionEntry (
  68   IN UINT32 Entry,
  69   IN UINTN LR
  70   );
  71
  72 #endif