ArmVirtPkg/FdtPciHostBridgeLib: map ECAM and I/O spaces in GCD memory map
[mirror_edk2.git] / ArmVirtPkg / Library / FdtPciHostBridgeLib / FdtPciHostBridgeLib.c
1 /** @file
2 PCI Host Bridge Library instance for pci-ecam-generic DT nodes
3
4 Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
5
6 This program and the accompanying materials are licensed and made available
7 under the terms and conditions of the BSD License which accompanies this
8 distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
13 IMPLIED.
14
15 **/
16 #include <PiDxe.h>
17 #include <Library/PciHostBridgeLib.h>
18 #include <Library/DebugLib.h>
19 #include <Library/DevicePathLib.h>
20 #include <Library/DxeServicesTableLib.h>
21 #include <Library/MemoryAllocationLib.h>
22 #include <Library/PcdLib.h>
23 #include <Library/UefiBootServicesTableLib.h>
24
25 #include <Protocol/FdtClient.h>
26 #include <Protocol/PciRootBridgeIo.h>
27 #include <Protocol/PciHostBridgeResourceAllocation.h>
28
29 #pragma pack(1)
30 typedef struct {
31 ACPI_HID_DEVICE_PATH AcpiDevicePath;
32 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
33 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
34 #pragma pack ()
35
36 STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
37 {
38 {
39 ACPI_DEVICE_PATH,
40 ACPI_DP,
41 {
42 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
43 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
44 }
45 },
46 EISA_PNP_ID(0x0A03),
47 0
48 },
49
50 {
51 END_DEVICE_PATH_TYPE,
52 END_ENTIRE_DEVICE_PATH_SUBTYPE,
53 {
54 END_DEVICE_PATH_LENGTH,
55 0
56 }
57 }
58 };
59
60 GLOBAL_REMOVE_IF_UNREFERENCED
61 CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
62 L"Mem", L"I/O", L"Bus"
63 };
64
65 //
66 // We expect the "ranges" property of "pci-host-ecam-generic" to consist of
67 // records like this.
68 //
69 #pragma pack (1)
70 typedef struct {
71 UINT32 Type;
72 UINT64 ChildBase;
73 UINT64 CpuBase;
74 UINT64 Size;
75 } DTB_PCI_HOST_RANGE_RECORD;
76 #pragma pack ()
77
78 #define DTB_PCI_HOST_RANGE_RELOCATABLE BIT31
79 #define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
80 #define DTB_PCI_HOST_RANGE_ALIASED BIT29
81 #define DTB_PCI_HOST_RANGE_MMIO32 BIT25
82 #define DTB_PCI_HOST_RANGE_MMIO64 (BIT25 | BIT24)
83 #define DTB_PCI_HOST_RANGE_IO BIT24
84 #define DTB_PCI_HOST_RANGE_TYPEMASK (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
85
86 STATIC
87 EFI_STATUS
88 MapGcdMmioSpace (
89 IN UINT64 Base,
90 IN UINT64 Size
91 )
92 {
93 EFI_STATUS Status;
94
95 Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, Base, Size,
96 EFI_MEMORY_UC);
97 if (EFI_ERROR (Status)) {
98 DEBUG ((DEBUG_ERROR,
99 "%a: failed to add GCD memory space for region [0x%Lx+0x%Lx)\n",
100 __FUNCTION__, Base, Size));
101 return Status;
102 }
103
104 Status = gDS->SetMemorySpaceAttributes (Base, Size, EFI_MEMORY_UC);
105 if (EFI_ERROR (Status)) {
106 DEBUG ((DEBUG_ERROR,
107 "%a: failed to set memory space attributes for region [0x%Lx+0x%Lx)\n",
108 __FUNCTION__, Base, Size));
109 }
110 return Status;
111 }
112
113 STATIC
114 EFI_STATUS
115 ProcessPciHost (
116 OUT UINT64 *IoBase,
117 OUT UINT64 *IoSize,
118 OUT UINT64 *Mmio32Base,
119 OUT UINT64 *Mmio32Size,
120 OUT UINT64 *Mmio64Base,
121 OUT UINT64 *Mmio64Size,
122 OUT UINT32 *BusMin,
123 OUT UINT32 *BusMax
124 )
125 {
126 FDT_CLIENT_PROTOCOL *FdtClient;
127 INT32 Node;
128 UINT64 ConfigBase, ConfigSize;
129 CONST VOID *Prop;
130 UINT32 Len;
131 UINT32 RecordIdx;
132 EFI_STATUS Status;
133 UINT64 IoTranslation;
134 UINT64 Mmio32Translation;
135 UINT64 Mmio64Translation;
136
137 //
138 // The following output arguments are initialized only in
139 // order to suppress '-Werror=maybe-uninitialized' warnings
140 // *incorrectly* emitted by some gcc versions.
141 //
142 *IoBase = 0;
143 *Mmio32Base = 0;
144 *Mmio64Base = MAX_UINT64;
145 *BusMin = 0;
146 *BusMax = 0;
147
148 //
149 // *IoSize, *Mmio##Size and IoTranslation are initialized to zero because the
150 // logic below requires it. However, since they are also affected by the issue
151 // reported above, they are initialized early.
152 //
153 *IoSize = 0;
154 *Mmio32Size = 0;
155 *Mmio64Size = 0;
156 IoTranslation = 0;
157
158 Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
159 (VOID **)&FdtClient);
160 ASSERT_EFI_ERROR (Status);
161
162 Status = FdtClient->FindCompatibleNode (FdtClient, "pci-host-ecam-generic",
163 &Node);
164 if (EFI_ERROR (Status)) {
165 DEBUG ((EFI_D_INFO,
166 "%a: No 'pci-host-ecam-generic' compatible DT node found\n",
167 __FUNCTION__));
168 return EFI_NOT_FOUND;
169 }
170
171 DEBUG_CODE (
172 INT32 Tmp;
173
174 //
175 // A DT can legally describe multiple PCI host bridges, but we are not
176 // equipped to deal with that. So assert that there is only one.
177 //
178 Status = FdtClient->FindNextCompatibleNode (FdtClient,
179 "pci-host-ecam-generic", Node, &Tmp);
180 ASSERT (Status == EFI_NOT_FOUND);
181 );
182
183 Status = FdtClient->GetNodeProperty (FdtClient, Node, "reg", &Prop, &Len);
184 if (EFI_ERROR (Status) || Len != 2 * sizeof (UINT64)) {
185 DEBUG ((EFI_D_ERROR, "%a: 'reg' property not found or invalid\n",
186 __FUNCTION__));
187 return EFI_PROTOCOL_ERROR;
188 }
189
190 //
191 // Fetch the ECAM window.
192 //
193 ConfigBase = SwapBytes64 (((CONST UINT64 *)Prop)[0]);
194 ConfigSize = SwapBytes64 (((CONST UINT64 *)Prop)[1]);
195
196 //
197 // Fetch the bus range (note: inclusive).
198 //
199 Status = FdtClient->GetNodeProperty (FdtClient, Node, "bus-range", &Prop,
200 &Len);
201 if (EFI_ERROR (Status) || Len != 2 * sizeof (UINT32)) {
202 DEBUG ((EFI_D_ERROR, "%a: 'bus-range' not found or invalid\n",
203 __FUNCTION__));
204 return EFI_PROTOCOL_ERROR;
205 }
206 *BusMin = SwapBytes32 (((CONST UINT32 *)Prop)[0]);
207 *BusMax = SwapBytes32 (((CONST UINT32 *)Prop)[1]);
208
209 //
210 // Sanity check: the config space must accommodate all 4K register bytes of
211 // all 8 functions of all 32 devices of all buses.
212 //
213 if (*BusMax < *BusMin || *BusMax - *BusMin == MAX_UINT32 ||
214 DivU64x32 (ConfigSize, SIZE_4KB * 8 * 32) < *BusMax - *BusMin + 1) {
215 DEBUG ((EFI_D_ERROR, "%a: invalid 'bus-range' and/or 'reg'\n",
216 __FUNCTION__));
217 return EFI_PROTOCOL_ERROR;
218 }
219
220 //
221 // Iterate over "ranges".
222 //
223 Status = FdtClient->GetNodeProperty (FdtClient, Node, "ranges", &Prop, &Len);
224 if (EFI_ERROR (Status) || Len == 0 ||
225 Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0) {
226 DEBUG ((EFI_D_ERROR, "%a: 'ranges' not found or invalid\n", __FUNCTION__));
227 return EFI_PROTOCOL_ERROR;
228 }
229
230 for (RecordIdx = 0; RecordIdx < Len / sizeof (DTB_PCI_HOST_RANGE_RECORD);
231 ++RecordIdx) {
232 CONST DTB_PCI_HOST_RANGE_RECORD *Record;
233
234 Record = (CONST DTB_PCI_HOST_RANGE_RECORD *)Prop + RecordIdx;
235 switch (SwapBytes32 (Record->Type) & DTB_PCI_HOST_RANGE_TYPEMASK) {
236 case DTB_PCI_HOST_RANGE_IO:
237 *IoBase = SwapBytes64 (Record->ChildBase);
238 *IoSize = SwapBytes64 (Record->Size);
239 IoTranslation = SwapBytes64 (Record->CpuBase) - *IoBase;
240
241 ASSERT (PcdGet64 (PcdPciIoTranslation) == IoTranslation);
242 break;
243
244 case DTB_PCI_HOST_RANGE_MMIO32:
245 *Mmio32Base = SwapBytes64 (Record->ChildBase);
246 *Mmio32Size = SwapBytes64 (Record->Size);
247 Mmio32Translation = SwapBytes64 (Record->CpuBase) - *Mmio32Base;
248
249 if (*Mmio32Base > MAX_UINT32 || *Mmio32Size > MAX_UINT32 ||
250 *Mmio32Base + *Mmio32Size > SIZE_4GB) {
251 DEBUG ((EFI_D_ERROR, "%a: MMIO32 space invalid\n", __FUNCTION__));
252 return EFI_PROTOCOL_ERROR;
253 }
254
255 ASSERT (PcdGet64 (PcdPciMmio32Translation) == Mmio32Translation);
256
257 if (Mmio32Translation != 0) {
258 DEBUG ((EFI_D_ERROR, "%a: unsupported nonzero MMIO32 translation "
259 "0x%Lx\n", __FUNCTION__, Mmio32Translation));
260 return EFI_UNSUPPORTED;
261 }
262
263 break;
264
265 case DTB_PCI_HOST_RANGE_MMIO64:
266 *Mmio64Base = SwapBytes64 (Record->ChildBase);
267 *Mmio64Size = SwapBytes64 (Record->Size);
268 Mmio64Translation = SwapBytes64 (Record->CpuBase) - *Mmio64Base;
269
270 ASSERT (PcdGet64 (PcdPciMmio64Translation) == Mmio64Translation);
271
272 if (Mmio64Translation != 0) {
273 DEBUG ((EFI_D_ERROR, "%a: unsupported nonzero MMIO64 translation "
274 "0x%Lx\n", __FUNCTION__, Mmio64Translation));
275 return EFI_UNSUPPORTED;
276 }
277
278 break;
279 }
280 }
281 if (*IoSize == 0 || *Mmio32Size == 0) {
282 DEBUG ((EFI_D_ERROR, "%a: %a space empty\n", __FUNCTION__,
283 (*IoSize == 0) ? "IO" : "MMIO32"));
284 return EFI_PROTOCOL_ERROR;
285 }
286
287 //
288 // The dynamic PCD PcdPciExpressBaseAddress should have already been set,
289 // and should match the value we found in the DT node.
290 //
291 ASSERT (PcdGet64 (PcdPciExpressBaseAddress) == ConfigBase);
292
293 DEBUG ((EFI_D_INFO, "%a: Config[0x%Lx+0x%Lx) Bus[0x%x..0x%x] "
294 "Io[0x%Lx+0x%Lx)@0x%Lx Mem32[0x%Lx+0x%Lx)@0x0 Mem64[0x%Lx+0x%Lx)@0x0\n",
295 __FUNCTION__, ConfigBase, ConfigSize, *BusMin, *BusMax, *IoBase, *IoSize,
296 IoTranslation, *Mmio32Base, *Mmio32Size, *Mmio64Base, *Mmio64Size));
297
298 // Map the ECAM space in the GCD memory map
299 Status = MapGcdMmioSpace (ConfigBase, ConfigSize);
300 ASSERT_EFI_ERROR (Status);
301 if (EFI_ERROR (Status)) {
302 return Status;
303 }
304
305 //
306 // Map the MMIO window that provides I/O access - the PCI host bridge code
307 // is not aware of this translation and so it will only map the I/O view
308 // in the GCD I/O map.
309 //
310 Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
311 ASSERT_EFI_ERROR (Status);
312
313 return Status;
314 }
315
316 STATIC PCI_ROOT_BRIDGE mRootBridge;
317
318 /**
319 Return all the root bridge instances in an array.
320
321 @param Count Return the count of root bridge instances.
322
323 @return All the root bridge instances in an array.
324 The array should be passed into PciHostBridgeFreeRootBridges()
325 when it's not used.
326 **/
327 PCI_ROOT_BRIDGE *
328 EFIAPI
329 PciHostBridgeGetRootBridges (
330 UINTN *Count
331 )
332 {
333 UINT64 IoBase, IoSize;
334 UINT64 Mmio32Base, Mmio32Size;
335 UINT64 Mmio64Base, Mmio64Size;
336 UINT32 BusMin, BusMax;
337 EFI_STATUS Status;
338
339 if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
340 DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
341
342 *Count = 0;
343 return NULL;
344 }
345
346 Status = ProcessPciHost (&IoBase, &IoSize, &Mmio32Base, &Mmio32Size,
347 &Mmio64Base, &Mmio64Size, &BusMin, &BusMax);
348 if (EFI_ERROR (Status)) {
349 DEBUG ((EFI_D_ERROR, "%a: failed to discover PCI host bridge: %r\n",
350 __FUNCTION__, Status));
351 *Count = 0;
352 return NULL;
353 }
354
355 *Count = 1;
356
357 mRootBridge.Segment = 0;
358 mRootBridge.Supports = EFI_PCI_ATTRIBUTE_ISA_IO_16 |
359 EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
360 EFI_PCI_ATTRIBUTE_VGA_IO_16 |
361 EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
362 mRootBridge.Attributes = mRootBridge.Supports;
363
364 mRootBridge.DmaAbove4G = TRUE;
365 mRootBridge.NoExtendedConfigSpace = FALSE;
366 mRootBridge.ResourceAssigned = FALSE;
367
368 mRootBridge.AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
369
370 mRootBridge.Bus.Base = BusMin;
371 mRootBridge.Bus.Limit = BusMax;
372 mRootBridge.Io.Base = IoBase;
373 mRootBridge.Io.Limit = IoBase + IoSize - 1;
374 mRootBridge.Mem.Base = Mmio32Base;
375 mRootBridge.Mem.Limit = Mmio32Base + Mmio32Size - 1;
376
377 if (sizeof (UINTN) == sizeof (UINT64)) {
378 mRootBridge.MemAbove4G.Base = Mmio64Base;
379 mRootBridge.MemAbove4G.Limit = Mmio64Base + Mmio64Size - 1;
380 if (Mmio64Size > 0) {
381 mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
382 }
383 } else {
384 //
385 // UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
386 // architecture such as ARM, we will not be able to access 64-bit MMIO
387 // BARs unless they are allocated below 4 GB. So ignore the range above
388 // 4 GB in this case.
389 //
390 mRootBridge.MemAbove4G.Base = MAX_UINT64;
391 mRootBridge.MemAbove4G.Limit = 0;
392 }
393
394 //
395 // No separate ranges for prefetchable and non-prefetchable BARs
396 //
397 mRootBridge.PMem.Base = MAX_UINT64;
398 mRootBridge.PMem.Limit = 0;
399 mRootBridge.PMemAbove4G.Base = MAX_UINT64;
400 mRootBridge.PMemAbove4G.Limit = 0;
401
402 mRootBridge.DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath;
403
404 return &mRootBridge;
405 }
406
407 /**
408 Free the root bridge instances array returned from
409 PciHostBridgeGetRootBridges().
410
411 @param Bridges The root bridge instances array.
412 @param Count The count of the array.
413 **/
414 VOID
415 EFIAPI
416 PciHostBridgeFreeRootBridges (
417 PCI_ROOT_BRIDGE *Bridges,
418 UINTN Count
419 )
420 {
421 ASSERT (Count == 1);
422 }
423
424 /**
425 Inform the platform that the resource conflict happens.
426
427 @param HostBridgeHandle Handle of the Host Bridge.
428 @param Configuration Pointer to PCI I/O and PCI memory resource
429 descriptors. The Configuration contains the resources
430 for all the root bridges. The resource for each root
431 bridge is terminated with END descriptor and an
432 additional END is appended indicating the end of the
433 entire resources. The resource descriptor field
434 values follow the description in
435 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
436 .SubmitResources().
437 **/
438 VOID
439 EFIAPI
440 PciHostBridgeResourceConflict (
441 EFI_HANDLE HostBridgeHandle,
442 VOID *Configuration
443 )
444 {
445 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
446 UINTN RootBridgeIndex;
447 DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
448
449 RootBridgeIndex = 0;
450 Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
451 while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
452 DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
453 for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
454 ASSERT (Descriptor->ResType <
455 (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
456 sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
457 )
458 );
459 DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
460 mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
461 Descriptor->AddrLen, Descriptor->AddrRangeMax
462 ));
463 if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
464 DEBUG ((EFI_D_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",
465 Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
466 ((Descriptor->SpecificFlag &
467 EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
468 ) != 0) ? L" (Prefetchable)" : L""
469 ));
470 }
471 }
472 //
473 // Skip the END descriptor for root bridge
474 //
475 ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
476 Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
477 (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
478 );
479 }
480 }