Some library instance's PCD is missing in FPD file for a module, it break single...
[mirror_edk2.git] / EdkModulePkg / Bus / Pci / Uhci / Dxe / uhci.h
1 /*++
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13
14 Uhci.h
15
16 Abstract:
17
18
19 Revision History
20 --*/
21
22 #ifndef _UHCI_H
23 #define _UHCI_H
24
25 /*
26 * Universal Host Controller Interface data structures and defines
27 */
28
29 #include <IndustryStandard/pci22.h>
30
31 #define EFI_D_UHCI EFI_D_INFO
32
33 //
34 // stall time
35 //
36 #define STALL_1_MILLI_SECOND 1000
37 #define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND
38
39 #define FORCE_GLOBAL_RESUME_TIME 20 * STALL_1_MILLI_SECOND
40
41 #define ROOT_PORT_REST_TIME 50 * STALL_1_MILLI_SECOND
42
43 #define PORT_RESET_RECOVERY_TIME 10 * STALL_1_MILLI_SECOND
44
45 //
46 // 50 ms
47 //
48 #define INTERRUPT_POLLING_TIME 50 * 1000 * 10
49
50 //
51 // UHCI IO Space Address Register Register locates at
52 // offset 20 ~ 23h of PCI Configuration Space (UHCI spec, Revision 1.1),
53 // so, its BAR Index is 4.
54 //
55 #define USB_BAR_INDEX 4
56
57 //
58 // One memory block uses 1 page (common buffer for QH,TD use.)
59 //
60 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1
61
62 #define bit(a) 1 << (a)
63
64 //
65 // ////////////////////////////////////////////////////////////////////////
66 //
67 // Universal Host Controller Registers Definitions
68 //
69 //////////////////////////////////////////////////////////////////////////
70 extern UINT16 USBBaseAddr;
71
72 /* Command register */
73 #define USBCMD 0 /* Command Register Offset 00-01h */
74 #define USBCMD_RS bit (0) /* Run/Stop */
75 #define USBCMD_HCRESET bit (1) /* Host reset */
76 #define USBCMD_GRESET bit (2) /* Global reset */
77 #define USBCMD_EGSM bit (3) /* Global Suspend Mode */
78 #define USBCMD_FGR bit (4) /* Force Global Resume */
79 #define USBCMD_SWDBG bit (5) /* SW Debug mode */
80 #define USBCMD_CF bit (6) /* Config Flag (sw only) */
81 #define USBCMD_MAXP bit (7) /* Max Packet (0 = 32, 1 = 64) */
82
83 /* Status register */
84 #define USBSTS 2 /* Status Register Offset 02-03h */
85 #define USBSTS_USBINT bit (0) /* Interrupt due to IOC */
86 #define USBSTS_ERROR bit (1) /* Interrupt due to error */
87 #define USBSTS_RD bit (2) /* Resume Detect */
88 #define USBSTS_HSE bit (3) /* Host System Error*/
89 #define USBSTS_HCPE bit (4) /* Host Controller Process Error*/
90 #define USBSTS_HCH bit (5) /* HC Halted */
91
92 /* Interrupt enable register */
93 #define USBINTR 4 /* Interrupt Enable Register 04-05h */
94 #define USBINTR_TIMEOUT bit (0) /* Timeout/CRC error enable */
95 #define USBINTR_RESUME bit (1) /* Resume interrupt enable */
96 #define USBINTR_IOC bit (2) /* Interrupt On Complete enable */
97 #define USBINTR_SP bit (3) /* Short packet interrupt enable */
98
99 /* Frame Number Register Offset 06-08h */
100 #define USBFRNUM 6
101
102 /* Frame List Base Address Register Offset 08-0Bh */
103 #define USBFLBASEADD 8
104
105 /* Start of Frame Modify Register Offset 0Ch */
106 #define USBSOF 0x0c
107
108 /* USB port status and control registers */
109 #define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
110 #define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
111
112 #define USBPORTSC_CCS bit (0) /* Current Connect Status*/
113 #define USBPORTSC_CSC bit (1) /* Connect Status Change */
114 #define USBPORTSC_PED bit (2) /* Port Enable / Disable */
115 #define USBPORTSC_PEDC bit (3) /* Port Enable / Disable Change */
116 #define USBPORTSC_LSL bit (4) /* Line Status Low bit*/
117 #define USBPORTSC_LSH bit (5) /* Line Status High bit*/
118 #define USBPORTSC_RD bit (6) /* Resume Detect */
119 #define USBPORTSC_LSDA bit (8) /* Low Speed Device Attached */
120 #define USBPORTSC_PR bit (9) /* Port Reset */
121 #define USBPORTSC_SUSP bit (12) /* Suspend */
122
123 /* PCI Configuration Registers for USB */
124
125 //
126 // Class Code Register offset
127 //
128 #define CLASSC 0x09
129 //
130 // USB IO Space Base Address Register offset
131 //
132 #define USBBASE 0x20
133
134 //
135 // USB legacy Support
136 //
137 #define USB_EMULATION 0xc0
138
139 //
140 // USB Base Class Code,Sub-Class Code and Programming Interface.
141 //
142 #define PCI_CLASSC_PI_UHCI 0x00
143
144 #define SETUP_PACKET_ID 0x2D
145 #define INPUT_PACKET_ID 0x69
146 #define OUTPUT_PACKET_ID 0xE1
147 #define ERROR_PACKET_ID 0x55
148
149 //
150 // ////////////////////////////////////////////////////////////////////////
151 //
152 // USB Transfer Mechanism Data Structures
153 //
154 //////////////////////////////////////////////////////////////////////////
155 #pragma pack(1)
156 //
157 // USB Class Code structure
158 //
159 typedef struct {
160 UINT8 PI;
161 UINT8 SubClassCode;
162 UINT8 BaseCode;
163 } USB_CLASSC;
164
165 typedef struct {
166 UINT32 QHHorizontalTerminate : 1;
167 UINT32 QHHorizontalQSelect : 1;
168 UINT32 QHHorizontalRsvd : 2;
169 UINT32 QHHorizontalPtr : 28;
170 UINT32 QHVerticalTerminate : 1;
171 UINT32 QHVerticalQSelect : 1;
172 UINT32 QHVerticalRsvd : 2;
173 UINT32 QHVerticalPtr : 28;
174 } QUEUE_HEAD;
175
176 typedef struct {
177 UINT32 TDLinkPtrTerminate : 1;
178 UINT32 TDLinkPtrQSelect : 1;
179 UINT32 TDLinkPtrDepthSelect : 1;
180 UINT32 TDLinkPtrRsvd : 1;
181 UINT32 TDLinkPtr : 28;
182 UINT32 TDStatusActualLength : 11;
183 UINT32 TDStatusRsvd : 5;
184 UINT32 TDStatus : 8;
185 UINT32 TDStatusIOC : 1;
186 UINT32 TDStatusIOS : 1;
187 UINT32 TDStatusLS : 1;
188 UINT32 TDStatusErr : 2;
189 UINT32 TDStatusSPD : 1;
190 UINT32 TDStatusRsvd2 : 2;
191 UINT32 TDTokenPID : 8;
192 UINT32 TDTokenDevAddr : 7;
193 UINT32 TDTokenEndPt : 4;
194 UINT32 TDTokenDataToggle : 1;
195 UINT32 TDTokenRsvd : 1;
196 UINT32 TDTokenMaxLen : 11;
197 UINT32 TDBufferPtr;
198 } TD;
199
200 #pragma pack()
201
202 typedef struct {
203 QUEUE_HEAD QH;
204 VOID *ptrNext;
205 VOID *ptrDown;
206 VOID *ptrNextIntQH; // for interrupt transfer's special use
207 VOID *LoopPtr;
208 } QH_STRUCT;
209
210 typedef struct {
211 TD TDData;
212 UINT8 *pTDBuffer;
213 VOID *ptrNextTD;
214 VOID *ptrNextQH;
215 UINT16 TDBufferLength;
216 UINT16 reserved;
217 } TD_STRUCT;
218
219 //
220 // ////////////////////////////////////////////////////////////////////////
221 //
222 // Universal Host Controller Device Data Structure
223 //
224 //////////////////////////////////////////////////////////////////////////
225 #define USB_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, UsbHc, USB_HC_DEV_SIGNATURE)
226 #define USB2_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)
227
228 #define USB_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')
229 #define INTERRUPT_LIST_SIGNATURE EFI_SIGNATURE_32 ('i', 'n', 't', 's')
230 typedef struct {
231 UINTN Signature;
232
233 LIST_ENTRY Link;
234 UINT8 DevAddr;
235 UINT8 EndPoint;
236 UINT8 DataToggle;
237 UINT8 Reserved[5];
238 TD_STRUCT *PtrFirstTD;
239 QH_STRUCT *PtrQH;
240 UINTN DataLen;
241 UINTN PollInterval;
242 VOID *Mapping;
243 UINT8 *DataBuffer; // allocated host memory, not mapped memory
244 EFI_ASYNC_USB_TRANSFER_CALLBACK InterruptCallBack;
245 VOID *InterruptContext;
246 } INTERRUPT_LIST;
247
248 #define INTERRUPT_LIST_FROM_LINK(a) CR (a, INTERRUPT_LIST, Link, INTERRUPT_LIST_SIGNATURE)
249
250 typedef struct {
251 UINT32 FrameListPtrTerminate : 1;
252 UINT32 FrameListPtrQSelect : 1;
253 UINT32 FrameListRsvd : 2;
254 UINT32 FrameListPtr : 28;
255
256 } FRAMELIST_ENTRY;
257
258 typedef struct _MEMORY_MANAGE_HEADER {
259 UINT8 *BitArrayPtr;
260 UINTN BitArraySizeInBytes;
261 UINT8 *MemoryBlockPtr;
262 UINTN MemoryBlockSizeInBytes;
263 VOID *Mapping;
264 struct _MEMORY_MANAGE_HEADER *Next;
265 } MEMORY_MANAGE_HEADER;
266
267 typedef struct {
268 UINTN Signature;
269 EFI_USB_HC_PROTOCOL UsbHc;
270 EFI_USB2_HC_PROTOCOL Usb2Hc;
271 EFI_PCI_IO_PROTOCOL *PciIo;
272
273 //
274 // local data
275 //
276 LIST_ENTRY InterruptListHead;
277 FRAMELIST_ENTRY *FrameListEntry;
278 VOID *FrameListMapping;
279 MEMORY_MANAGE_HEADER *MemoryHeader;
280 EFI_EVENT InterruptTransTimer;
281 EFI_UNICODE_STRING_TABLE *ControllerNameTable;
282
283 } USB_HC_DEV;
284
285 extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;
286 extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;
287
288 EFI_STATUS
289 WriteUHCCommandReg (
290 IN EFI_PCI_IO_PROTOCOL *PciIo,
291 IN UINT32 CmdAddrOffset,
292 IN UINT16 UsbCmd
293 )
294 /*++
295
296 Routine Description:
297
298 Write UHCI Command Register
299
300 Arguments:
301
302 PciIo - EFI_PCI_IO_PROTOCOL
303 CmdAddrOffset - Command address offset
304 UsbCmd - Data to write
305
306 Returns:
307
308 EFI_SUCCESS
309
310 --*/
311 ;
312
313 EFI_STATUS
314 ReadUHCCommandReg (
315 IN EFI_PCI_IO_PROTOCOL *PciIo,
316 IN UINT32 CmdAddrOffset,
317 IN OUT UINT16 *Data
318 )
319 /*++
320
321 Routine Description:
322
323 Read UHCI Command Register
324
325 Arguments:
326
327 PciIo - EFI_PCI_IO_PROTOCOL
328 CmdAddrOffset - Command address offset
329 Data - Data to return
330
331 Returns:
332
333 EFI_SUCCESS
334
335 --*/
336 ;
337
338 EFI_STATUS
339 WriteUHCStatusReg (
340 IN EFI_PCI_IO_PROTOCOL *PciIo,
341 IN UINT32 StatusAddrOffset,
342 IN UINT16 UsbSts
343 )
344 /*++
345
346 Routine Description:
347
348 Write UHCI Staus Register
349
350 Arguments:
351
352 PciIo - EFI_PCI_IO_PROTOCOL
353 StatusAddrOffset - Status address offset
354 UsbSts - Data to write
355
356 Returns:
357
358 EFI_SUCCESS
359
360 --*/
361 ;
362
363 EFI_STATUS
364 ReadUHCStatusReg (
365 IN EFI_PCI_IO_PROTOCOL *PciIo,
366 IN UINT32 StatusAddrOffset,
367 IN OUT UINT16 *Data
368 )
369 /*++
370
371 Routine Description:
372
373 Read UHCI Staus Register
374
375 Arguments:
376
377 PciIo - EFI_PCI_IO_PROTOCOL
378 StatusAddrOffset - Status address offset
379 UsbSts - Data to return
380
381 Returns:
382
383 EFI_SUCCESS
384
385 --*/
386 ;
387
388 EFI_STATUS
389 ClearStatusReg (
390 IN EFI_PCI_IO_PROTOCOL *PciIo,
391 IN UINT32 StatusAddrOffset
392 )
393 /*++
394
395 Routine Description:
396
397 Clear the content of UHC's Status Register
398
399 Arguments:
400
401 PciIo - EFI_PCI_IO_PROTOCOL
402 StatusAddrOffset - Status address offset
403
404 Returns:
405
406 EFI_SUCCESS
407
408 --*/
409 ;
410
411 EFI_STATUS
412 ReadUHCFrameNumberReg (
413 IN EFI_PCI_IO_PROTOCOL *PciIo,
414 IN UINT32 FrameNumAddrOffset,
415 IN OUT UINT16 *Data
416 )
417 /*++
418
419 Routine Description:
420
421 Read from UHC's Frame Number Register
422
423 Arguments:
424
425 PciIo - EFI_PCI_IO_PROTOCOL
426 FrameNumAddrOffset - Frame number register offset
427 Data - Data to return
428 Returns:
429
430 EFI_SUCCESS
431
432 --*/
433 ;
434
435 EFI_STATUS
436 WriteUHCFrameListBaseReg (
437 IN EFI_PCI_IO_PROTOCOL *PciIo,
438 IN UINT32 FlBaseAddrOffset,
439 IN UINT32 UsbFrameListBaseAddr
440 )
441 /*++
442
443 Routine Description:
444
445 Write to UHC's Frame List Base Register
446
447 Arguments:
448
449 PciIo - EFI_PCI_IO_PROTOCOL
450 FlBaseAddrOffset - Frame Base address register
451 UsbFrameListBaseAddr - Address to write
452
453 Returns:
454
455 EFI_SUCCESS
456
457 --*/
458 ;
459
460 EFI_STATUS
461 ReadRootPortReg (
462 IN EFI_PCI_IO_PROTOCOL *PciIo,
463 IN UINT32 PortAddrOffset,
464 IN OUT UINT16 *Data
465 )
466 /*++
467
468 Routine Description:
469
470 Read from UHC's Root Port Register
471
472 Arguments:
473
474 PciIo - EFI_PCI_IO_PROTOCOL
475 PortAddrOffset - Port Addrress Offset,
476 Data - Data to return
477 Returns:
478
479 EFI_SUCCESS
480
481 --*/
482 ;
483
484 EFI_STATUS
485 WriteRootPortReg (
486 IN EFI_PCI_IO_PROTOCOL *PciIo,
487 IN UINT32 PortAddrOffset,
488 IN UINT16 ControlBits
489 )
490 /*++
491
492 Routine Description:
493
494 Write to UHC's Root Port Register
495
496 Arguments:
497
498 PciIo - EFI_PCI_IO_PROTOCOL
499 PortAddrOffset - Port Addrress Offset,
500 ControlBits - Data to write
501 Returns:
502
503 EFI_SUCCESS
504
505 --*/
506 ;
507
508 EFI_STATUS
509 WaitForUHCHalt (
510 IN EFI_PCI_IO_PROTOCOL *PciIo,
511 IN UINT32 StatusRegAddr,
512 IN UINTN Timeout
513 )
514 /*++
515
516 Routine Description:
517
518 Wait until UHCI halt or timeout
519
520 Arguments:
521
522 PciIo - EFI_PCI_IO_PROTOCOL
523 StatusRegAddr - Status Register Address
524 Timeout - Time out value in us
525
526 Returns:
527
528 EFI_DEVICE_ERROR - Unable to read the status register
529 EFI_TIMEOUT - Time out
530 EFI_SUCCESS - Success
531
532 --*/
533 ;
534
535 BOOLEAN
536 IsStatusOK (
537 IN EFI_PCI_IO_PROTOCOL *PciIo,
538 IN UINT32 StatusRegAddr
539 )
540 /*++
541
542 Routine Description:
543
544 Judge whether the host controller operates well
545
546 Arguments:
547
548 PciIo - EFI_PCI_IO_PROTOCOL
549 StatusRegAddr - Status register address
550
551 Returns:
552
553 TRUE - Status is good
554 FALSE - Status is bad
555
556 --*/
557 ;
558
559 BOOLEAN
560 IsHostSysOrProcessErr (
561 IN EFI_PCI_IO_PROTOCOL *PciIo,
562 IN UINT32 StatusRegAddr
563 )
564 /*++
565
566 Routine Description:
567
568 Judge the status is HostSys,ProcessErr error or good
569
570 Arguments:
571
572 PciIo - EFI_PCI_IO_PROTOCOL
573 StatusRegAddr - Status register address
574
575 Returns:
576
577 TRUE - Status is good
578 FALSE - Status is bad
579
580 --*/
581 ;
582
583 UINT16
584 GetCurrentFrameNumber (
585 IN EFI_PCI_IO_PROTOCOL *PciIo,
586 IN UINT32 FrameNumAddrOffset
587 )
588 /*++
589
590 Routine Description:
591
592 Get Current Frame Number
593
594 Arguments:
595
596 PciIo - EFI_PCI_IO_PROTOCOL
597 FrameNumAddrOffset - FrameNum register AddrOffset
598
599 Returns:
600
601 Frame number
602
603 --*/
604 ;
605
606 EFI_STATUS
607 SetFrameListBaseAddress (
608 IN EFI_PCI_IO_PROTOCOL *PciIo,
609 IN UINT32 FLBASEADDRReg,
610 IN UINT32 Addr
611 )
612 /*++
613
614 Routine Description:
615
616 Set FrameListBase Address
617
618 Arguments:
619
620 PciIo - EFI_PCI_IO_PROTOCOL
621 FlBaseAddrReg - FrameListBase register
622 Addr - Address to set
623
624 Returns:
625
626 EFI_SUCCESS
627
628 --*/
629 ;
630
631 UINT32
632 GetFrameListBaseAddress (
633 IN EFI_PCI_IO_PROTOCOL *PciIo,
634 IN UINT32 FLBAddr
635 )
636 /*++
637
638 Routine Description:
639
640 Get Current Frame Number
641
642 Arguments:
643
644 PciIo - EFI_PCI_IO_PROTOCOL
645 FrameNumAddrOffset - FrameNum register AddrOffset
646
647 Returns:
648
649 Frame number
650
651 --*/
652 ;
653
654 EFI_STATUS
655 CreateFrameList (
656 IN USB_HC_DEV *HcDev,
657 IN UINT32 FLBASEADDRReg
658 )
659 /*++
660
661 Routine Description:
662
663 CreateFrameList
664
665 Arguments:
666
667 HcDev - USB_HC_DEV
668 FlBaseAddrReg - Frame List register
669
670 Returns:
671
672 EFI_OUT_OF_RESOURCES - Can't allocate memory resources
673 EFI_UNSUPPORTED - Map memory fail
674 EFI_SUCCESS - Success
675
676 --*/
677 ;
678
679 EFI_STATUS
680 FreeFrameListEntry (
681 IN USB_HC_DEV *UhcDev
682 )
683 /*++
684
685 Routine Description:
686
687 Free FrameList buffer
688
689 Arguments:
690
691 HcDev - USB_HC_DEV
692
693 Returns:
694
695 EFI_SUCCESS - success
696
697 --*/
698 ;
699
700 VOID
701 InitFrameList (
702 IN USB_HC_DEV *HcDev
703 )
704 /*++
705
706 Routine Description:
707
708 Initialize FrameList
709
710 Arguments:
711
712 HcDev - USB_HC_DEV
713
714 Returns:
715 VOID
716
717 --*/
718 ;
719
720 EFI_STATUS
721 CreateQH (
722 IN USB_HC_DEV *HcDev,
723 OUT QH_STRUCT **pptrQH
724 )
725 /*++
726
727 Routine Description:
728
729 CreateQH
730
731 Arguments:
732
733 HcDev - USB_HC_DEV
734 pptrQH - QH_STRUCT content to return
735 Returns:
736
737 EFI_SUCCESS - Success
738 EFI_OUT_OF_RESOURCES - Can't allocate memory
739
740 --*/
741 ;
742
743 VOID
744 SetQHHorizontalLinkPtr (
745 IN QH_STRUCT *ptrQH,
746 IN VOID *ptrNext
747 )
748 /*++
749
750 Routine Description:
751
752 Set QH Horizontal Link Pointer
753
754 Arguments:
755
756 PtrQH - QH_STRUCT
757 ptrNext - Data to write
758
759 Returns:
760
761 VOID
762
763 --*/
764 ;
765
766 VOID *
767 GetQHHorizontalLinkPtr (
768 IN QH_STRUCT *ptrQH
769 )
770 /*++
771
772 Routine Description:
773
774 Get QH Horizontal Link Pointer
775
776 Arguments:
777
778 PtrQH - QH_STRUCT
779
780
781 Returns:
782
783 Data to return
784
785 --*/
786 ;
787
788 VOID
789 SetQHHorizontalQHorTDSelect (
790 IN QH_STRUCT *ptrQH,
791 IN BOOLEAN bQH
792 )
793 /*++
794
795 Routine Description:
796
797 Set QH Horizontal QH or TD
798
799 Arguments:
800
801 PtrQH - QH_STRUCT
802 bQH - TRUE is QH FALSE is TD
803
804 Returns:
805 VOID
806
807 --*/
808 ;
809
810 VOID
811 SetQHHorizontalValidorInvalid (
812 IN QH_STRUCT *ptrQH,
813 IN BOOLEAN bValid
814 )
815 /*++
816
817 Routine Description:
818
819 Set QH Horizontal Valid or Invalid
820
821 Arguments:
822
823 PtrQH - QH_STRUCT
824 bValid - TRUE is Valid FALSE is Invalid
825
826 Returns:
827 VOID
828
829 --*/
830 ;
831
832 VOID
833 SetQHVerticalLinkPtr (
834 IN QH_STRUCT *ptrQH,
835 IN VOID *ptrNext
836 )
837 /*++
838
839 Routine Description:
840
841 Set QH Vertical Link Pointer
842
843 Arguments:
844
845 PtrQH - QH_STRUCT
846 ptrNext - Data to write
847 Returns:
848
849 VOID
850
851 --*/
852 ;
853
854 VOID *
855 GetQHVerticalLinkPtr (
856 IN QH_STRUCT *ptrQH
857 )
858 /*++
859
860 Routine Description:
861
862 Get QH Vertical Link Pointer
863
864 Arguments:
865
866 PtrQH - QH_STRUCT
867
868 Returns:
869
870 Data to return
871
872 --*/
873 ;
874
875 VOID
876 SetQHVerticalQHorTDSelect (
877 IN QH_STRUCT *ptrQH,
878 IN BOOLEAN bQH
879 )
880 /*++
881
882 Routine Description:
883
884 Set QH Vertical QH or TD
885
886 Arguments:
887
888 PtrQH - QH_STRUCT
889 bQH - TRUE is QH FALSE is TD
890
891 Returns:
892
893 VOID
894
895 --*/
896 ;
897
898 BOOLEAN
899 IsQHHorizontalQHSelect (
900 IN QH_STRUCT *ptrQH
901 )
902 /*++
903
904 Routine Description:
905
906 Is QH Horizontal QH Select
907
908 Arguments:
909
910 PtrQH - QH_STRUCT
911
912 Returns:
913
914 TRUE - QH
915 FALSE - TD
916
917 --*/
918 ;
919
920 VOID
921 SetQHVerticalValidorInvalid (
922 IN QH_STRUCT *ptrQH,
923 IN BOOLEAN bValid
924 )
925 /*++
926
927 Routine Description:
928
929 Set QH Vertical Valid or Invalid
930
931 Arguments:
932
933 PtrQH - QH_STRUCT
934 IsValid - TRUE is valid FALSE is invalid
935
936 Returns:
937
938 VOID
939
940 --*/
941 ;
942
943 BOOLEAN
944 GetQHVerticalValidorInvalid (
945 IN QH_STRUCT *ptrQH
946 )
947 /*++
948
949 Routine Description:
950
951 Get QH Vertical Valid or Invalid
952
953 Arguments:
954
955 PtrQH - QH_STRUCT
956
957 Returns:
958
959 TRUE - Valid
960 FALSE - Invalid
961
962 --*/
963 ;
964
965 EFI_STATUS
966 AllocateTDStruct (
967 IN USB_HC_DEV *HcDev,
968 OUT TD_STRUCT **ppTDStruct
969 )
970 /*++
971
972 Routine Description:
973
974 Allocate TD Struct
975
976 Arguments:
977
978 HcDev - USB_HC_DEV
979 ppTDStruct - place to store TD_STRUCT pointer
980 Returns:
981
982 EFI_SUCCESS
983
984 --*/
985 ;
986
987 EFI_STATUS
988 CreateTD (
989 IN USB_HC_DEV *HcDev,
990 OUT TD_STRUCT **pptrTD
991 )
992 /*++
993
994 Routine Description:
995
996 Create TD
997
998 Arguments:
999
1000 HcDev - USB_HC_DEV
1001 pptrTD - TD_STRUCT pointer to store
1002
1003 Returns:
1004
1005 EFI_OUT_OF_RESOURCES - Can't allocate resources
1006 EFI_SUCCESS - Success
1007
1008 --*/
1009 ;
1010
1011
1012 EFI_STATUS
1013 GenSetupStageTD (
1014 IN USB_HC_DEV *HcDev,
1015 IN UINT8 DevAddr,
1016 IN UINT8 Endpoint,
1017 IN BOOLEAN bSlow,
1018 IN UINT8 *pDevReq,
1019 IN UINT8 RequestLen,
1020 OUT TD_STRUCT **ppTD
1021 )
1022 /*++
1023
1024 Routine Description:
1025
1026 Generate Setup Stage TD
1027
1028 Arguments:
1029
1030 HcDev - USB_HC_DEV
1031 DevAddr - Device address
1032 Endpoint - Endpoint number
1033 bSlow - Full speed or low speed
1034 pDevReq - Device request
1035 RequestLen - Request length
1036 ppTD - TD_STRUCT to return
1037 Returns:
1038
1039 EFI_OUT_OF_RESOURCES - Can't allocate memory
1040 EFI_SUCCESS - Success
1041
1042 --*/
1043 ;
1044
1045 EFI_STATUS
1046 GenDataTD (
1047 IN USB_HC_DEV *HcDev,
1048 IN UINT8 DevAddr,
1049 IN UINT8 Endpoint,
1050 IN UINT8 *pData,
1051 IN UINT8 Len,
1052 IN UINT8 PktID,
1053 IN UINT8 Toggle,
1054 IN BOOLEAN bSlow,
1055 OUT TD_STRUCT **ppTD
1056 )
1057 /*++
1058
1059 Routine Description:
1060
1061 Generate Data Stage TD
1062
1063 Arguments:
1064
1065 HcDev - USB_HC_DEV
1066 DevAddr - Device address
1067 Endpoint - Endpoint number
1068 pData - Data buffer
1069 Len - Data length
1070 PktID - Packet ID
1071 Toggle - Data toggle value
1072 bSlow - Full speed or low speed
1073 ppTD - TD_STRUCT to return
1074 Returns:
1075
1076 EFI_OUT_OF_RESOURCES - Can't allocate memory
1077 EFI_SUCCESS - Success
1078
1079 --*/
1080 ;
1081
1082 EFI_STATUS
1083 CreateStatusTD (
1084 IN USB_HC_DEV *HcDev,
1085 IN UINT8 DevAddr,
1086 IN UINT8 Endpoint,
1087 IN UINT8 PktID,
1088 IN BOOLEAN bSlow,
1089 OUT TD_STRUCT **ppTD
1090 )
1091 /*++
1092
1093 Routine Description:
1094
1095 Generate Setup Stage TD
1096
1097 Arguments:
1098
1099 HcDev - USB_HC_DEV
1100 DevAddr - Device address
1101 Endpoint - Endpoint number
1102 bSlow - Full speed or low speed
1103 pDevReq - Device request
1104 RequestLen - Request length
1105 ppTD - TD_STRUCT to return
1106 Returns:
1107
1108 EFI_OUT_OF_RESOURCES - Can't allocate memory
1109 EFI_SUCCESS - Success
1110
1111 --*/
1112 ;
1113
1114 VOID
1115 SetTDLinkPtrValidorInvalid (
1116 IN TD_STRUCT *ptrTDStruct,
1117 IN BOOLEAN bValid
1118 )
1119 /*++
1120
1121 Routine Description:
1122
1123 Set TD Link Pointer Valid or Invalid
1124
1125 Arguments:
1126
1127 ptrTDStruct - TD_STRUCT
1128 bValid - TRUE is valid FALSE is invalid
1129
1130 Returns:
1131
1132 VOID
1133
1134 --*/
1135 ;
1136
1137 VOID
1138 SetTDLinkPtrQHorTDSelect (
1139 IN TD_STRUCT *ptrTDStruct,
1140 IN BOOLEAN bQH
1141 )
1142 /*++
1143
1144 Routine Description:
1145
1146 Set TD Link Pointer QH or TD Select
1147
1148 Arguments:
1149
1150 ptrTDStruct - TD_STRUCT
1151 bQH - TRUE is QH FALSE is TD
1152
1153 Returns:
1154
1155 VOID
1156
1157 --*/
1158 ;
1159
1160 VOID
1161 SetTDLinkPtrDepthorBreadth (
1162 IN TD_STRUCT *ptrTDStruct,
1163 IN BOOLEAN bDepth
1164 )
1165 /*++
1166
1167 Routine Description:
1168
1169 Set TD Link Pointer depth or bread priority
1170
1171 Arguments:
1172
1173 ptrTDStruct - TD_STRUCT
1174 bDepth - TRUE is Depth FALSE is Breadth
1175
1176 Returns:
1177
1178 VOID
1179
1180 --*/
1181 ;
1182
1183 VOID
1184 SetTDLinkPtr (
1185 IN TD_STRUCT *ptrTDStruct,
1186 IN VOID *ptrNext
1187 )
1188 /*++
1189
1190 Routine Description:
1191
1192 Set TD Link Pointer
1193
1194 Arguments:
1195
1196 ptrTDStruct - TD_STRUCT
1197 ptrNext - Pointer to set
1198
1199 Returns:
1200
1201 VOID
1202
1203 --*/
1204 ;
1205
1206 VOID *
1207 GetTDLinkPtr (
1208 IN TD_STRUCT *ptrTDStruct
1209 )
1210 /*++
1211
1212 Routine Description:
1213
1214 Get TD Link Pointer
1215
1216 Arguments:
1217
1218 ptrTDStruct - TD_STRUCT
1219
1220 Returns:
1221
1222 Pointer to get
1223
1224 --*/
1225 ;
1226
1227 VOID
1228 EnableorDisableTDShortPacket (
1229 IN TD_STRUCT *ptrTDStruct,
1230 IN BOOLEAN bEnable
1231 )
1232 /*++
1233
1234 Routine Description:
1235
1236 Enable or Disable TD ShortPacket
1237
1238 Arguments:
1239
1240 ptrTDStruct - TD_STRUCT
1241 bEnable - TRUE is Enanble FALSE is Disable
1242
1243 Returns:
1244
1245 VOID
1246
1247 --*/
1248 ;
1249
1250 VOID
1251 SetTDControlErrorCounter (
1252 IN TD_STRUCT *ptrTDStruct,
1253 IN UINT8 nMaxErrors
1254 )
1255 /*++
1256
1257 Routine Description:
1258
1259 Set TD Control ErrorCounter
1260
1261 Arguments:
1262
1263 ptrTDStruct - TD_STRUCT
1264 nMaxErrors - Error counter number
1265
1266 Returns:
1267
1268 VOID
1269
1270 --*/
1271 ;
1272
1273 VOID
1274 SetTDLoworFullSpeedDevice (
1275 IN TD_STRUCT *ptrTDStruct,
1276 IN BOOLEAN bLowSpeedDevice
1277 )
1278 /*++
1279
1280 Routine Description:
1281
1282 Set TD status low speed or full speed
1283
1284 Arguments:
1285
1286 ptrTDStruct - A point to TD_STRUCT
1287 bLowSpeedDevice - Show low speed or full speed
1288
1289 Returns:
1290
1291 VOID
1292
1293 --*/
1294 ;
1295
1296 VOID
1297 SetTDControlIsochronousorNot (
1298 IN TD_STRUCT *ptrTDStruct,
1299 IN BOOLEAN bIsochronous
1300 )
1301 /*++
1302
1303 Routine Description:
1304
1305 Set TD status Isochronous or not
1306
1307 Arguments:
1308
1309 ptrTDStruct - A point to TD_STRUCT
1310 IsIsochronous - Show Isochronous or not
1311
1312 Returns:
1313
1314 VOID
1315
1316 --*/
1317 ;
1318
1319 VOID
1320 SetorClearTDControlIOC (
1321 IN TD_STRUCT *ptrTDStruct,
1322 IN BOOLEAN bSet
1323 )
1324 /*++
1325
1326 Routine Description:
1327
1328 Set TD status IOC IsSet
1329
1330 Arguments:
1331
1332 ptrTDStruct - A point to TD_STRUCT
1333 IsSet - Show IOC set or not
1334
1335 Returns:
1336
1337 VOID
1338
1339 --*/
1340 ;
1341
1342 VOID
1343 SetTDStatusActiveorInactive (
1344 IN TD_STRUCT *ptrTDStruct,
1345 IN BOOLEAN bActive
1346 )
1347 /*++
1348
1349 Routine Description:
1350
1351 Set TD status active or not
1352 Arguments:
1353
1354 ptrTDStruct - A point to TD_STRUCT
1355 IsActive - Active or not
1356
1357 Returns:
1358
1359 VOID
1360
1361 --*/
1362 ;
1363
1364 UINT16
1365 SetTDTokenMaxLength (
1366 IN TD_STRUCT *ptrTDStruct,
1367 IN UINT16 nMaxLen
1368 )
1369 /*++
1370
1371 Routine Description:
1372
1373 Set TD Token maxlength
1374
1375 Arguments:
1376
1377 ptrTDStruct - A point to TD_STRUCT
1378 MaximumLength - Maximum length of TD Token
1379
1380 Returns:
1381
1382 Real maximum length set to TD Token
1383
1384 --*/
1385 ;
1386
1387 VOID
1388 SetTDTokenDataToggle1 (
1389 IN TD_STRUCT *ptrTDStruct
1390 )
1391 /*++
1392
1393 Routine Description:
1394
1395 Set TD Token data toggle1
1396
1397 Arguments:
1398
1399 ptrTDStruct - A point to TD_STRUCT
1400
1401 Returns:
1402
1403 VOID
1404
1405 --*/
1406 ;
1407
1408 VOID
1409 SetTDTokenDataToggle0 (
1410 IN TD_STRUCT *ptrTDStruct
1411 )
1412 /*++
1413
1414 Routine Description:
1415
1416 Set TD Token data toggle0
1417
1418 Arguments:
1419
1420 ptrTDStruct - A point to TD_STRUCT
1421
1422 Returns:
1423
1424 VOID
1425
1426 --*/
1427 ;
1428
1429 UINT8
1430 GetTDTokenDataToggle (
1431 IN TD_STRUCT *ptrTDStruct
1432 )
1433 /*++
1434
1435 Routine Description:
1436
1437 Get TD Token data toggle
1438
1439 Arguments:
1440
1441 ptrTDStruct - A point to TD_STRUCT
1442
1443 Returns:
1444
1445 data toggle value
1446
1447 --*/
1448 ;
1449
1450 VOID
1451 SetTDTokenEndPoint (
1452 IN TD_STRUCT *ptrTDStruct,
1453 IN UINTN nEndPoint
1454 )
1455 /*++
1456
1457 Routine Description:
1458
1459 Set Data Token endpoint number
1460
1461 Arguments:
1462
1463 ptrTDStruct - A point to TD_STRUCT
1464 EndPoint - End point number
1465
1466 Returns:
1467
1468 VOID
1469
1470 --*/
1471 ;
1472
1473 VOID
1474 SetTDTokenDeviceAddress (
1475 IN TD_STRUCT *ptrTDStruct,
1476 IN UINTN nDevAddr
1477 )
1478 /*++
1479
1480 Routine Description:
1481
1482 Set TD Token device address
1483
1484 Arguments:
1485
1486 ptrTDStruct - A point to TD_STRUCT
1487 DeviceAddress - Device address
1488
1489 Returns:
1490
1491 VOID
1492
1493 --*/
1494 ;
1495
1496 VOID
1497 SetTDTokenPacketID (
1498 IN TD_STRUCT *ptrTDStruct,
1499 IN UINT8 nPID
1500 )
1501 /*++
1502
1503 Routine Description:
1504
1505 Set TD Token packet ID
1506
1507 Arguments:
1508
1509 ptrTDStruct - A point to TD_STRUCT
1510 PID - Packet ID
1511
1512 Returns:
1513
1514 VOID
1515
1516 --*/
1517 ;
1518
1519 VOID
1520 SetTDDataBuffer (
1521 IN TD_STRUCT *ptrTDStruct
1522 )
1523 /*++
1524
1525 Routine Description:
1526
1527 Set TD data buffer
1528
1529 Arguments:
1530
1531 ptrTDStruct - A point to TD_STRUCT
1532
1533 Returns:
1534
1535 VOID
1536
1537 --*/
1538 ;
1539
1540 BOOLEAN
1541 IsTDStatusActive (
1542 IN TD_STRUCT *ptrTDStruct
1543 )
1544 /*++
1545
1546 Routine Description:
1547
1548 Indicate whether TD status active or not
1549
1550 Arguments:
1551
1552 ptrTDStruct - A point to TD_STRUCT
1553
1554 Returns:
1555
1556 TRUE - Active
1557 FALSE - Inactive
1558
1559 --*/
1560 ;
1561
1562 BOOLEAN
1563 IsTDStatusStalled (
1564 IN TD_STRUCT *ptrTDStruct
1565 )
1566 /*++
1567
1568 Routine Description:
1569
1570 Indicate whether TD status stalled or not
1571
1572 Arguments:
1573
1574 ptrTDStruct - A point to TD_STRUCT
1575
1576 Returns:
1577
1578 TRUE - Stalled
1579 FALSE - not stalled
1580
1581 --*/
1582 ;
1583
1584 BOOLEAN
1585 IsTDStatusBufferError (
1586 IN TD_STRUCT *ptrTDStruct
1587 )
1588 /*++
1589
1590 Routine Description:
1591
1592 Indicate whether TD status buffer error or not
1593
1594 Arguments:
1595
1596 ptrTDStruct - A point to TD_STRUCT
1597
1598 Returns:
1599
1600 TRUE - Buffer error
1601 FALSE - No error
1602
1603 --*/
1604 ;
1605
1606 BOOLEAN
1607 IsTDStatusBabbleError (
1608 IN TD_STRUCT *ptrTDStruct
1609 )
1610 /*++
1611
1612 Routine Description:
1613
1614 Indicate whether TD status babble error or not
1615
1616 Arguments:
1617
1618 ptrTDStruct - A point to TD_STRUCT
1619
1620 Returns:
1621
1622 TRUE - Babble error
1623 FALSE - No error
1624
1625 --*/
1626 ;
1627
1628 BOOLEAN
1629 IsTDStatusNAKReceived (
1630 IN TD_STRUCT *ptrTDStruct
1631 )
1632 /*++
1633
1634 Routine Description:
1635
1636 Indicate whether TD status NAK received
1637 Arguments:
1638
1639 ptrTDStruct - A point to TD_STRUCT
1640
1641 Returns:
1642
1643 TRUE - NAK received
1644 FALSE - NAK not received
1645
1646 --*/
1647 ;
1648
1649 BOOLEAN
1650 IsTDStatusCRCTimeOutError (
1651 IN TD_STRUCT *ptrTDStruct
1652 )
1653 /*++
1654
1655 Routine Description:
1656
1657 Indicate whether TD status CRC timeout error or not
1658
1659 Arguments:
1660
1661 ptrTDStruct - A point to TD_STRUCT
1662
1663 Returns:
1664
1665 TRUE - CRC timeout error
1666 FALSE - CRC timeout no error
1667
1668 --*/
1669 ;
1670
1671 BOOLEAN
1672 IsTDStatusBitStuffError (
1673 IN TD_STRUCT *ptrTDStruct
1674 )
1675 /*++
1676
1677 Routine Description:
1678
1679 Indicate whether TD status bit stuff error or not
1680
1681 Arguments:
1682
1683 ptrTDStruct - A point to TD_STRUCT
1684
1685 Returns:
1686
1687 TRUE - Bit stuff error
1688 FALSE - Bit stuff no error
1689
1690 --*/
1691 ;
1692
1693 UINT16
1694 GetTDStatusActualLength (
1695 IN TD_STRUCT *ptrTDStruct
1696 )
1697 /*++
1698
1699 Routine Description:
1700
1701 Get TD status length
1702
1703 Arguments:
1704
1705 ptrTDStruct - A point to TD_STRUCT
1706
1707 Returns:
1708
1709 Return Td status length
1710
1711 --*/
1712 ;
1713
1714 UINT16
1715 GetTDTokenMaxLength (
1716 IN TD_STRUCT *ptrTDStruct
1717 )
1718 /*++
1719
1720 Routine Description:
1721
1722 Get TD Token maximum length
1723
1724 Arguments:
1725
1726 ptrTDStruct - A point to TD_STRUCT
1727
1728 Returns:
1729
1730 Return TD token maximum length
1731
1732 --*/
1733 ;
1734
1735 UINT8
1736 GetTDTokenEndPoint (
1737 IN TD_STRUCT *ptrTDStruct
1738 )
1739 /*++
1740
1741 Routine Description:
1742
1743 Get TD Token endpoint number
1744
1745 Arguments:
1746
1747 ptrTDStruct - A point to TD_STRUCT
1748
1749 Returns:
1750
1751 Return TD Token endpoint number
1752
1753 --*/
1754 ;
1755
1756 UINT8
1757 GetTDTokenDeviceAddress (
1758 IN TD_STRUCT *ptrTDStruct
1759 )
1760 /*++
1761
1762 Routine Description:
1763
1764 Get TD Token device address
1765
1766 Arguments:
1767
1768 ptrTDStruct - A point to TD_STRUCT
1769
1770 Returns:
1771
1772 Return TD Token device address
1773
1774 --*/
1775 ;
1776
1777 UINT8
1778 GetTDTokenPacketID (
1779 IN TD_STRUCT *ptrTDStruct
1780 )
1781 /*++
1782
1783 Routine Description:
1784
1785 Get TD Token packet ID
1786
1787 Arguments:
1788
1789 ptrTDStruct - A point to TD_STRUCT
1790
1791 Returns:
1792
1793 Return TD Token packet ID
1794
1795 --*/
1796 ;
1797
1798 UINT8 *
1799 GetTDDataBuffer (
1800 IN TD_STRUCT *ptrTDStruct
1801 )
1802 /*++
1803
1804 Routine Description:
1805
1806 Get the point to TD data buffer
1807
1808 Arguments:
1809
1810 ptrTDStruct - A point to TD_STRUCT
1811
1812 Returns:
1813
1814 Return a point to TD data buffer
1815
1816 --*/
1817 ;
1818
1819 BOOLEAN
1820 GetTDLinkPtrValidorInvalid (
1821 IN TD_STRUCT *ptrTDStruct
1822 )
1823 /*++
1824
1825 Routine Description:
1826
1827 Get TD LinkPtr valid or not
1828
1829 Arguments:
1830
1831 ptrTDStruct - A point to TD_STRUCT
1832
1833 Returns:
1834
1835 TRUE - Invalid
1836 FALSE - Valid
1837
1838 --*/
1839 ;
1840
1841 UINTN
1842 CountTDsNumber (
1843 IN TD_STRUCT *ptrFirstTD
1844 )
1845 /*++
1846
1847 Routine Description:
1848
1849 Get the number of TDs
1850
1851 Arguments:
1852
1853 PtrFirstTD - A point to the first TD_STRUCT
1854
1855 Returns:
1856
1857 Return the number of TDs
1858
1859 --*/
1860 ;
1861
1862 VOID
1863 LinkTDToQH (
1864 IN QH_STRUCT *ptrQH,
1865 IN TD_STRUCT *ptrTD
1866 )
1867 /*++
1868
1869 Routine Description:
1870
1871 Link TD To QH
1872
1873 Arguments:
1874
1875 PtrQH - QH_STRUCT
1876 PtrTD - TD_STRUCT
1877 Returns:
1878
1879 VOID
1880
1881 --*/
1882 ;
1883
1884 VOID
1885 LinkTDToTD (
1886 IN TD_STRUCT *ptrPreTD,
1887 IN TD_STRUCT *ptrTD
1888 )
1889 /*++
1890
1891 Routine Description:
1892
1893 Link TD To TD
1894
1895 Arguments:
1896
1897 ptrPreTD - Previous TD_STRUCT to be linked
1898 PtrTD - TD_STRUCT to link
1899 Returns:
1900
1901 VOID
1902
1903 --*/
1904 ;
1905
1906 VOID
1907 SetorClearCurFrameListTerminate (
1908 IN FRAMELIST_ENTRY *pCurEntry,
1909 IN BOOLEAN bSet
1910 )
1911 /*++
1912
1913 Routine Description:
1914
1915 Set or clear current framelist terminate
1916
1917 Arguments:
1918
1919 pCurEntry - A point to FRAMELIST_ENTITY
1920 IsSet - TRUE to empty the frame and indicate the Pointer field is valid
1921
1922 Returns:
1923
1924 VOID
1925
1926 --*/
1927 ;
1928
1929 VOID
1930 SetCurFrameListQHorTD (
1931 IN FRAMELIST_ENTRY *pCurEntry,
1932 IN BOOLEAN bQH
1933 )
1934 /*++
1935
1936 Routine Description:
1937
1938 Set current framelist QH or TD
1939
1940 Arguments:
1941
1942 pCurEntry - A point to FRAMELIST_ENTITY
1943 IsQH - TRUE to set QH and FALSE to set TD
1944
1945 Returns:
1946
1947 VOID
1948
1949 --*/
1950 ;
1951
1952 BOOLEAN
1953 GetCurFrameListTerminate (
1954 IN FRAMELIST_ENTRY *pCurEntry
1955 )
1956 /*++
1957
1958 Routine Description:
1959
1960 Get current framelist terminate
1961
1962 Arguments:
1963
1964 pCurEntry - A point to FRAMELIST_ENTITY
1965
1966 Returns:
1967
1968 TRUE - Terminate
1969 FALSE - Not terminate
1970
1971 --*/
1972 ;
1973
1974 VOID
1975 SetCurFrameListPointer (
1976 IN FRAMELIST_ENTRY *pCurEntry,
1977 IN UINT8 *ptr
1978 )
1979 /*++
1980
1981 Routine Description:
1982
1983 Set current framelist pointer
1984
1985 Arguments:
1986
1987 pCurEntry - A point to FRAMELIST_ENTITY
1988 ptr - A point to FrameListPtr point to
1989
1990 Returns:
1991
1992 VOID
1993
1994 --*/
1995 ;
1996
1997 VOID *
1998 GetCurFrameListPointer (
1999 IN FRAMELIST_ENTRY *pCurEntry
2000 )
2001 /*++
2002
2003 Routine Description:
2004
2005 Get current framelist pointer
2006
2007 Arguments:
2008
2009 pCurEntry - A point to FRAMELIST_ENTITY
2010
2011 Returns:
2012
2013 A point FrameListPtr point to
2014
2015 --*/
2016 ;
2017
2018 VOID
2019 LinkQHToFrameList (
2020 IN FRAMELIST_ENTRY *pEntry,
2021 IN UINT16 FrameListIndex,
2022 IN QH_STRUCT *ptrQH
2023 )
2024 /*++
2025
2026 Routine Description:
2027
2028 Link QH To Frame List
2029
2030 Arguments:
2031
2032 pEntry - FRAMELIST_ENTRY
2033 FrameListIndex - Frame List Index
2034 PtrQH - QH to link
2035 Returns:
2036
2037 VOID
2038
2039 --*/
2040 ;
2041
2042 VOID
2043 DelLinkSingleQH (
2044 IN USB_HC_DEV *HcDev,
2045 IN QH_STRUCT *ptrQH,
2046 IN UINT16 FrameListIndex,
2047 IN BOOLEAN SearchOther,
2048 IN BOOLEAN Delete
2049 )
2050 /*++
2051
2052 Routine Description:
2053
2054 Unlink from frame list and delete single QH
2055
2056 Arguments:
2057
2058 HcDev - USB_HC_DEV
2059 PtrQH - QH_STRUCT
2060 FrameListIndex - Frame List Index
2061 SearchOther - Search Other QH
2062 Delete - TRUE is to delete the QH
2063
2064 Returns:
2065
2066 VOID
2067
2068 --*/
2069 ;
2070
2071 VOID
2072 DeleteQueuedTDs (
2073 IN USB_HC_DEV *HcDev,
2074 IN TD_STRUCT *ptrFirstTD
2075 )
2076 /*++
2077
2078 Routine Description:
2079
2080 Delete Queued TDs
2081
2082 Arguments:
2083
2084 HcDev - USB_HC_DEV
2085 PtrFirstTD - TD link list head
2086
2087 Returns:
2088
2089 VOID
2090
2091 --*/
2092 ;
2093
2094 VOID
2095 InsertQHTDToINTList (
2096 IN USB_HC_DEV *HcDev,
2097 IN QH_STRUCT *ptrQH,
2098 IN TD_STRUCT *ptrFirstTD,
2099 IN UINT8 DeviceAddress,
2100 IN UINT8 EndPointAddress,
2101 IN UINT8 DataToggle,
2102 IN UINTN DataLength,
2103 IN UINTN PollingInterval,
2104 IN VOID *Mapping,
2105 IN UINT8 *DataBuffer,
2106 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
2107 IN VOID *Context
2108 )
2109 /*++
2110 Routine Description:
2111
2112 Insert QH and TD To Interrupt List
2113
2114 Arguments:
2115
2116 HcDev - USB_HC_DEV
2117 PtrQH - QH_STRUCT
2118 PtrFirstTD - First TD_STRUCT
2119 DeviceAddress - Device Address
2120 EndPointAddress - EndPoint Address
2121 DataToggle - Data Toggle
2122 DataLength - Data length
2123 PollingInterval - Polling Interval when inserted to frame list
2124 Mapping - Mapping alue
2125 DataBuffer - Data buffer
2126 CallBackFunction- CallBackFunction after interrupt transfeer
2127 Context - CallBackFunction Context passed as function parameter
2128
2129 Returns:
2130
2131 EFI_SUCCESS - Sucess
2132 EFI_INVALID_PARAMETER - Paremeter is error
2133
2134 --*/
2135 ;
2136
2137 EFI_STATUS
2138 DeleteAsyncINTQHTDs (
2139 IN USB_HC_DEV *HcDev,
2140 IN UINT8 DeviceAddress,
2141 IN UINT8 EndPointAddress,
2142 OUT UINT8 *DataToggle
2143 )
2144 /*++
2145 Routine Description:
2146
2147 Delete Async INT QH and TDs
2148
2149 Arguments:
2150
2151 HcDev - USB_HC_DEV
2152 DeviceAddress - Device Address
2153 EndPointAddress - EndPoint Address
2154 DataToggle - Data Toggle
2155
2156 Returns:
2157
2158 EFI_SUCCESS - Sucess
2159 EFI_INVALID_PARAMETER - Paremeter is error
2160
2161 --*/
2162 ;
2163
2164 BOOLEAN
2165 CheckTDsResults (
2166 IN TD_STRUCT *ptrTD,
2167 IN UINTN RequiredLen,
2168 OUT UINT32 *Result,
2169 OUT UINTN *ErrTDPos,
2170 OUT UINTN *ActualTransferSize
2171 )
2172 /*++
2173
2174 Routine Description:
2175
2176 Check TDs Results
2177
2178 Arguments:
2179
2180 PtrTD - TD_STRUCT to check
2181 RequiredLen - Required Len
2182 Result - Transfer result
2183 ErrTDPos - Error TD Position
2184 ActualTransferSize - Actual Transfer Size
2185
2186 Returns:
2187
2188 TRUE - Sucess
2189 FALSE - Fail
2190
2191 --*/
2192 ;
2193
2194 VOID
2195 ExecuteAsyncINTTDs (
2196 IN USB_HC_DEV *HcDev,
2197 IN INTERRUPT_LIST *ptrList,
2198 OUT UINT32 *Result,
2199 OUT UINTN *ErrTDPos,
2200 OUT UINTN *ActualLen
2201 )
2202 /*++
2203
2204 Routine Description:
2205
2206 Execute Async Interrupt TDs
2207
2208 Arguments:
2209
2210 HcDev - USB_HC_DEV
2211 PtrList - INTERRUPT_LIST
2212 Result - Transfer result
2213 ErrTDPos - Error TD Position
2214 ActualTransferSize - Actual Transfer Size
2215
2216 Returns:
2217
2218 VOID
2219
2220 --*/
2221 ;
2222
2223 VOID
2224 UpdateAsyncINTQHTDs (
2225 IN INTERRUPT_LIST *ptrList,
2226 IN UINT32 Result,
2227 IN UINT32 ErrTDPos
2228 )
2229 /*++
2230
2231 Routine Description:
2232
2233 Update Async Interrupt QH and TDs
2234
2235 Arguments:
2236
2237 PtrList - INTERRUPT_LIST
2238 Result - Transfer reslut
2239 ErrTDPos - Error TD Position
2240
2241 Returns:
2242
2243 VOID
2244
2245 --*/
2246 ;
2247
2248 VOID
2249 ReleaseInterruptList (
2250 IN USB_HC_DEV *HcDev,
2251 IN LIST_ENTRY *ListHead
2252 )
2253 /*++
2254
2255 Routine Description:
2256
2257 Release Interrupt List
2258
2259 Arguments:
2260
2261 HcDev - USB_HC_DEV
2262 ListHead - List head
2263
2264 Returns:
2265
2266 VOID
2267
2268 --*/
2269 ;
2270
2271 EFI_STATUS
2272 ExecuteControlTransfer (
2273 IN USB_HC_DEV *HcDev,
2274 IN TD_STRUCT *ptrTD,
2275 IN UINT32 wIndex,
2276 OUT UINTN *ActualLen,
2277 IN UINTN TimeOut,
2278 OUT UINT32 *TransferResult
2279 )
2280 /*++
2281
2282 Routine Description:
2283
2284 Execute Control Transfer
2285
2286 Arguments:
2287
2288 HcDev - USB_HC_DEV
2289 PtrTD - TD_STRUCT
2290 wIndex - No use
2291 ActualLen - Actual transfered Len
2292 TimeOut - TimeOut value in milliseconds
2293 TransferResult - Transfer result
2294 Returns:
2295
2296 EFI_SUCCESS - Sucess
2297 EFI_DEVICE_ERROR - Error
2298
2299
2300 --*/
2301 ;
2302
2303 EFI_STATUS
2304 ExecBulkorSyncInterruptTransfer (
2305 IN USB_HC_DEV *HcDev,
2306 IN TD_STRUCT *ptrTD,
2307 IN UINT32 wIndex,
2308 OUT UINTN *ActualLen,
2309 OUT UINT8 *DataToggle,
2310 IN UINTN TimeOut,
2311 OUT UINT32 *TransferResult
2312 )
2313 /*++
2314
2315 Routine Description:
2316
2317 Execute Bulk or SyncInterrupt Transfer
2318
2319 Arguments:
2320
2321 HcDev - USB_HC_DEV
2322 PtrTD - TD_STRUCT
2323 wIndex - No use
2324 ActualLen - Actual transfered Len
2325 DataToggle - Data Toggle
2326 TimeOut - TimeOut value in milliseconds
2327 TransferResult - Transfer result
2328 Returns:
2329
2330 EFI_SUCCESS - Sucess
2331 EFI_DEVICE_ERROR - Error
2332 --*/
2333 ;
2334
2335 EFI_STATUS
2336 InitializeMemoryManagement (
2337 IN USB_HC_DEV *HcDev
2338 )
2339 /*++
2340
2341 Routine Description:
2342
2343 Initialize Memory Management
2344
2345 Arguments:
2346
2347 HcDev - USB_HC_DEV
2348
2349 Returns:
2350
2351 EFI_SUCCESS - Success
2352
2353 --*/
2354 ;
2355
2356 EFI_STATUS
2357 CreateMemoryBlock (
2358 IN USB_HC_DEV *HcDev,
2359 IN MEMORY_MANAGE_HEADER **MemoryHeader,
2360 IN UINTN MemoryBlockSizeInPages
2361 )
2362 /*++
2363
2364 Routine Description:
2365
2366 Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
2367 and use PciIo->Map to map the common buffer for Bus Master Read/Write.
2368
2369
2370 Arguments:
2371
2372 HcDev - USB_HC_DEV
2373 MemoryHeader - MEMORY_MANAGE_HEADER to output
2374 MemoryBlockSizeInPages - MemoryBlockSizeInPages
2375
2376 Returns:
2377
2378 EFI_SUCCESS - Success
2379 EFI_OUT_OF_RESOURCES - Out of resources
2380 EFI_UNSUPPORTED - Unsupported
2381
2382 --*/
2383 ;
2384
2385 EFI_STATUS
2386 FreeMemoryHeader (
2387 IN USB_HC_DEV *HcDev,
2388 IN MEMORY_MANAGE_HEADER *MemoryHeader
2389 )
2390 /*++
2391
2392 Routine Description:
2393
2394 Free Memory Header
2395
2396 Arguments:
2397
2398 HcDev - USB_HC_DEV
2399 MemoryHeader - MemoryHeader to be freed
2400
2401 Returns:
2402
2403 EFI_INVALID_PARAMETER - Parameter is error
2404 EFI_SUCCESS - Success
2405
2406 --*/
2407 ;
2408
2409 EFI_STATUS
2410 UhciAllocatePool (
2411 IN USB_HC_DEV *UhcDev,
2412 IN UINT8 **Pool,
2413 IN UINTN AllocSize
2414 )
2415 /*++
2416
2417 Routine Description:
2418
2419 Uhci Allocate Pool
2420
2421 Arguments:
2422
2423 HcDev - USB_HC_DEV
2424 Pool - Place to store pointer to the memory buffer
2425 AllocSize - Alloc Size
2426
2427 Returns:
2428
2429 EFI_SUCCESS - Success
2430
2431 --*/
2432 ;
2433
2434 VOID
2435 UhciFreePool (
2436 IN USB_HC_DEV *HcDev,
2437 IN UINT8 *Pool,
2438 IN UINTN AllocSize
2439 )
2440 /*++
2441
2442 Routine Description:
2443
2444 Uhci Free Pool
2445
2446 Arguments:
2447
2448 HcDev - USB_HC_DEV
2449 Pool - Pool to free
2450 AllocSize - Pool size
2451
2452 Returns:
2453
2454 VOID
2455
2456 --*/
2457 ;
2458
2459 VOID
2460 InsertMemoryHeaderToList (
2461 IN MEMORY_MANAGE_HEADER *MemoryHeader,
2462 IN MEMORY_MANAGE_HEADER *NewMemoryHeader
2463 )
2464 /*++
2465
2466 Routine Description:
2467
2468 Insert Memory Header To List
2469
2470 Arguments:
2471
2472 MemoryHeader - MEMORY_MANAGE_HEADER
2473 NewMemoryHeader - MEMORY_MANAGE_HEADER
2474
2475 Returns:
2476
2477 VOID
2478
2479 --*/
2480 ;
2481
2482 EFI_STATUS
2483 AllocMemInMemoryBlock (
2484 IN MEMORY_MANAGE_HEADER *MemoryHeader,
2485 IN VOID **Pool,
2486 IN UINTN NumberOfMemoryUnit
2487 )
2488 /*++
2489
2490 Routine Description:
2491
2492 Alloc Memory In MemoryBlock
2493
2494 Arguments:
2495
2496 MemoryHeader - MEMORY_MANAGE_HEADER
2497 Pool - Place to store pointer to memory
2498 NumberOfMemoryUnit - Number Of Memory Unit
2499
2500 Returns:
2501
2502 EFI_NOT_FOUND - Can't find the free memory
2503 EFI_SUCCESS - Success
2504
2505 --*/
2506 ;
2507
2508 BOOLEAN
2509 IsMemoryBlockEmptied (
2510 IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr
2511 )
2512 /*++
2513
2514 Routine Description:
2515
2516 Is Memory Block Emptied
2517
2518 Arguments:
2519
2520 MemoryHeaderPtr - MEMORY_MANAGE_HEADER
2521
2522 Returns:
2523
2524 TRUE - Empty
2525 FALSE - Not Empty
2526
2527 --*/
2528 ;
2529
2530 VOID
2531 DelinkMemoryBlock (
2532 IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,
2533 IN MEMORY_MANAGE_HEADER *FreeMemoryHeader
2534 )
2535 /*++
2536
2537 Routine Description:
2538
2539 Delink Memory Block
2540
2541 Arguments:
2542
2543 FirstMemoryHeader - MEMORY_MANAGE_HEADER
2544 NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER
2545
2546 Returns:
2547
2548 VOID
2549
2550 --*/
2551 ;
2552
2553 EFI_STATUS
2554 DelMemoryManagement (
2555 IN USB_HC_DEV *HcDev
2556 )
2557 /*++
2558
2559 Routine Description:
2560
2561 Delete Memory Management
2562
2563 Arguments:
2564
2565 HcDev - USB_HC_DEV
2566
2567 Returns:
2568
2569 EFI_SUCCESS - Success
2570
2571 --*/
2572 ;
2573
2574 VOID
2575 EnableMaxPacketSize (
2576 IN USB_HC_DEV *HcDev
2577 )
2578 /*++
2579
2580 Routine Description:
2581
2582 Enable Max Packet Size
2583
2584 Arguments:
2585
2586 HcDev - USB_HC_DEV
2587
2588 Returns:
2589
2590 VOID
2591
2592 --*/
2593 ;
2594
2595 VOID
2596 CleanUsbTransactions (
2597 IN USB_HC_DEV *HcDev
2598 )
2599 /*++
2600
2601 Routine Description:
2602
2603 Clean USB Transactions
2604
2605 Arguments:
2606
2607 HcDev - A point to USB_HC_DEV
2608
2609 Returns:
2610
2611 VOID
2612
2613 --*/
2614 ;
2615
2616 VOID
2617 TurnOffUSBEmulation (
2618 IN EFI_PCI_IO_PROTOCOL *PciIo
2619 )
2620 /*++
2621
2622 Routine Description:
2623
2624 Set current framelist QH or TD
2625
2626 Arguments:
2627
2628 pCurEntry - A point to FRAMELIST_ENTITY
2629 IsQH - TRUE to set QH and FALSE to set TD
2630
2631 Returns:
2632
2633 VOID
2634
2635 --*/
2636 ;
2637
2638 #endif