2 * Header containing the structure specific to the Silicon Image I3132 Sata PCI card
4 * Copyright (c) 2011-2015, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #ifndef __SATASII3132_H
17 #define __SATASII3132_H
21 #include <Protocol/AtaPassThru.h>
22 #include <Protocol/PciIo.h>
24 #include <Library/UefiLib.h>
25 #include <Library/DebugLib.h>
26 #include <Library/PcdLib.h>
27 #include <Library/BaseMemoryLib.h>
28 #include <Library/UefiBootServicesTableLib.h>
30 #include <IndustryStandard/Pci.h>
32 #define SATA_SII3132_DEVICE_ID 0x3132
33 #define SATA_SII3132_VENDOR_ID 0x1095
35 #define SII3132_PORT_SIGNATURE_PMP 0x96690101
36 #define SII3132_PORT_SIGNATURE_ATAPI 0xEB140101
37 #define SII3132_PORT_SIGNATURE_ATA 0x00000101
40 * Silicon Image SiI3132 Registers
42 #define SII3132_GLOBAL_CONTROL_REG 0x40
43 #define SII3132_GLOBAL_FLASHADDR_REG 0x70
45 #define SII3132_PORT_STATUS_REG 0x1000
46 #define SII3132_PORT_CONTROLSET_REG 0x1000
47 #define SII3132_PORT_CONTROLCLEAR_REG 0x1004
48 #define SII3132_PORT_INTSTATUS_REG 0x1008
49 #define SII3132_PORT_ENABLEINT_REG 0x1010
50 #define SII3132_PORT_INTCLEAR_REG 0x1014
51 #define SII3132_PORT_32BITACTIVADDR_REG 0x101C
52 #define SII3132_PORT_CMDEXECFIFO_REG 0x1020
53 #define SII3132_PORT_CMDERROR_REG 0x1024
54 #define SII3132_PORT_ERRCOUNTDECODE 0x1040
55 #define SII3132_PORT_ERRCOUNTCRC 0x1044
56 #define SII3132_PORT_ERRCOUNTHANDSHAKE 0x1048
57 #define SII3132_PORT_SLOTSTATUS_REG 0x1800
58 #define SII3132_PORT_CMDACTIV_REG 0x1C00
59 #define SII3132_PORT_SSTATUS_REG 0x1F04
61 #define SII3132_PORT_CONTROL_RESET (1 << 0)
62 #define SII3132_PORT_DEVICE_RESET (1 << 1)
63 #define SII3132_PORT_CONTROL_INT (1 << 2)
64 #define SII3132_PORT_CONTROL_32BITACTIVATION (1 << 10)
66 #define SII3132_PORT_STATUS_PORTREADY 0x80000000
68 #define SII3132_PORT_INT_CMDCOMPL (1 << 0)
69 #define SII3132_PORT_INT_CMDERR (1 << 1)
70 #define SII3132_PORT_INT_PORTRDY (1 << 2)
72 #define SATA_SII3132_MAXPORT 2
74 #define PRB_CTRL_ATA 0x0
75 #define PRB_CTRL_PROT_OVERRIDE 0x1
76 #define PRB_CTRL_RESTRANSMIT 0x2
77 #define PRB_CTRL_EXT_CMD 0x4
78 #define PRB_CTRL_RCV 0x8
79 #define PRB_CTRL_PKT_READ 0x10
80 #define PRB_CTRL_PKT_WRITE 0x20
81 #define PRB_CTRL_INT_MASK 0x40
82 #define PRB_CTRL_SRST 0x80
84 #define PRB_PROT_PACKET 0x01
85 #define PRB_PROT_LEGACY_QUEUE 0x02
86 #define PRB_PROT_NATIVE_QUEUE 0x04
87 #define PRB_PROT_READ 0x08
88 #define PRB_PROT_WRITE 0x10
89 #define PRB_PROT_TRANSPARENT 0x20
91 #define SGE_XCF (1 << 28)
92 #define SGE_DRD (1 << 29)
93 #define SGE_LNK (1 << 30)
94 #define SGE_TRM 0x80000000
96 typedef struct _SATA_SI3132_SGE
{
97 UINT32 DataAddressLow
;
98 UINT32 DataAddressHigh
;
103 typedef struct _SATA_SI3132_FIS
{
111 typedef struct _SATA_SI3132_PRB
{
113 UINT16 ProtocolOverride
;
114 UINT32 RecTransCount
;
116 SATA_SI3132_SGE Sge
[2];
119 typedef struct _SATA_SI3132_DEVICE
{
120 LIST_ENTRY Link
; // This attribute must be the first entry of this structure (to avoid pointer computation)
122 struct _SATA_SI3132_PORT
*Port
; //Parent Port
124 } SATA_SI3132_DEVICE
;
126 typedef struct _SATA_SI3132_PORT
{
129 struct _SATA_SI3132_INSTANCE
*Instance
;
131 //TODO: Support Port multiplier
134 SATA_SI3132_PRB
* HostPRB
;
135 EFI_PHYSICAL_ADDRESS PhysAddrHostPRB
;
136 VOID
* PciAllocMappingPRB
;
139 typedef struct _SATA_SI3132_INSTANCE
{
142 SATA_SI3132_PORT Ports
[SATA_SII3132_MAXPORT
];
144 EFI_ATA_PASS_THRU_PROTOCOL AtaPassThruProtocol
;
146 EFI_PCI_IO_PROTOCOL
*PciIo
;
147 } SATA_SI3132_INSTANCE
;
149 #define SATA_SII3132_SIGNATURE SIGNATURE_32('s', 'i', '3', '2')
150 #define INSTANCE_FROM_ATAPASSTHRU_THIS(a) CR(a, SATA_SI3132_INSTANCE, AtaPassThruProtocol, SATA_SII3132_SIGNATURE)
152 #define SATA_GLOBAL_READ32(Offset, Value) PciIo->Mem.Read (PciIo, EfiPciIoWidthUint32, 0, Offset, 1, Value)
153 #define SATA_GLOBAL_WRITE32(Offset, Value) { UINT32 Value32 = Value; PciIo->Mem.Write (PciIo, EfiPciIoWidthUint32, 0, Offset, 1, &Value32); }
155 #define SATA_PORT_READ32(Offset, Value) PciIo->Mem.Read (PciIo, EfiPciIoWidthUint32, 1, Offset, 1, Value)
156 #define SATA_PORT_WRITE32(Offset, Value) { UINT32 Value32 = Value; PciIo->Mem.Write (PciIo, EfiPciIoWidthUint32, 1, Offset, 1, &Value32); }
158 #define SATA_TRACE(txt) DEBUG((EFI_D_VERBOSE, "ARM_SATA: " txt "\n"))
160 extern EFI_COMPONENT_NAME_PROTOCOL gSataSiI3132ComponentName
;
161 extern EFI_COMPONENT_NAME2_PROTOCOL gSataSiI3132ComponentName2
;
164 * Component Name Protocol Functions
168 SataSiI3132ComponentNameGetDriverName (
169 IN EFI_COMPONENT_NAME_PROTOCOL
*This
,
171 OUT CHAR16
**DriverName
176 SataSiI3132ComponentNameGetControllerName (
177 IN EFI_COMPONENT_NAME_PROTOCOL
*This
,
178 IN EFI_HANDLE ControllerHandle
,
179 IN EFI_HANDLE ChildHandle OPTIONAL
,
181 OUT CHAR16
**ControllerName
184 EFI_STATUS
SiI3132HwResetPort (SATA_SI3132_PORT
*Port
);
187 * Driver Binding Protocol Functions
191 SataSiI3132DriverBindingSupported (
192 IN EFI_DRIVER_BINDING_PROTOCOL
*This
,
193 IN EFI_HANDLE Controller
,
194 IN EFI_DEVICE_PATH_PROTOCOL
*RemainingDevicePath
199 SataSiI3132DriverBindingStart (
200 IN EFI_DRIVER_BINDING_PROTOCOL
*This
,
201 IN EFI_HANDLE Controller
,
202 IN EFI_DEVICE_PATH_PROTOCOL
*RemainingDevicePath
207 SataSiI3132DriverBindingStop (
208 IN EFI_DRIVER_BINDING_PROTOCOL
*This
,
209 IN EFI_HANDLE Controller
,
210 IN UINTN NumberOfChildren
,
211 IN EFI_HANDLE
*ChildHandleBuffer
214 EFI_STATUS
SiI3132AtaPassThruCommand (
215 IN SATA_SI3132_INSTANCE
*pSataSiI3132Instance
,
216 IN SATA_SI3132_PORT
*pSataPort
,
217 IN UINT16 PortMultiplierPort
,
218 IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET
*Packet
,
219 IN EFI_EVENT Event OPTIONAL
223 * EFI ATA Pass Thru Protocol
225 EFI_STATUS
SiI3132AtaPassThru (
226 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
228 IN UINT16 PortMultiplierPort
,
229 IN OUT EFI_ATA_PASS_THRU_COMMAND_PACKET
*Packet
,
230 IN EFI_EVENT Event OPTIONAL
233 EFI_STATUS
SiI3132GetNextPort (
234 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
238 EFI_STATUS
SiI3132GetNextDevice (
239 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
241 IN OUT UINT16
*PortMultiplierPort
244 EFI_STATUS
SiI3132BuildDevicePath (
245 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
247 IN UINT16 PortMultiplierPort
,
248 IN OUT EFI_DEVICE_PATH_PROTOCOL
**DevicePath
251 EFI_STATUS
SiI3132GetDevice (
252 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
253 IN EFI_DEVICE_PATH_PROTOCOL
*DevicePath
,
255 OUT UINT16
*PortMultiplierPort
258 EFI_STATUS
SiI3132ResetPort (
259 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
263 EFI_STATUS
SiI3132ResetDevice (
264 IN EFI_ATA_PASS_THRU_PROTOCOL
*This
,
266 IN UINT16 PortMultiplierPort