IntelFrameworkModulePkg/Bus/Pci/PciBus/Dxe/pcibus.h

   1 /*++
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   pcibus.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver
  19
  20 Revision History
  21
  22 --*/
  23
  24 #ifndef _EFI_PCI_BUS_H
  25 #define _EFI_PCI_BUS_H
  26
  27 //
  28 // The package level header files this module uses
  29 //
  30 #include <PiDxe.h>
  31 #include <Common/FrameworkStatusCode.h>
  32 #include <Common/FrameworkStatusCodeDataTypeId.h>
  33 //
  34 // The protocols, PPI and GUID defintions for this module
  35 //
  36 #include <Protocol/LoadedImage.h>
  37 #include <Protocol/PciHostBridgeResourceAllocation.h>
  38 #include <Protocol/PciIo.h>
  39 #include <Guid/PciHotplugDevice.h>
  40 #include <Protocol/PciRootBridgeIo.h>
  41 #include <Protocol/PciHotPlugRequest.h>
  42 #include <Protocol/DevicePath.h>
  43 #include <Protocol/PciPlatform.h>
  44 #include <Protocol/PciHotPlugInit.h>
  45 #include <Protocol/Decompress.h>
  46 #include <Guid/PciOptionRomTable.h>
  47 #include <Protocol/BusSpecificDriverOverride.h>
  48 #include <Protocol/UgaIo.h>
  49 //
  50 // The Library classes this module consumes
  51 //
  52 #include <Library/DebugLib.h>
  53 #include <Library/UefiDriverEntryPoint.h>
  54 #include <Library/BaseLib.h>
  55 #include <Library/UefiLib.h>
  56 #include <Library/BaseMemoryLib.h>
  57 #include <Library/ReportStatusCodeLib.h>
  58 #include <Library/MemoryAllocationLib.h>
  59 #include <Library/UefiBootServicesTableLib.h>
  60 #include <Library/DevicePathLib.h>
  61 #include <Library/PcdLib.h>
  62 #include <Library/PciIncompatibleDeviceSupportLib.h>
  63
  64 #include <IndustryStandard/Pci23.h>
  65 #include <IndustryStandard/PeImage.h>
  66 #include <IndustryStandard/Acpi.h>
  67 #include "ComponentName.h"
  68
  69 ///
  70 /// Device handle Extended Data. Used for many
  71 /// errors and progress codes to point to the device.
  72 ///
  73 typedef struct {
  74   EFI_HANDLE            Handle;
  75 } REPORT_STATUS_CODE_LIBRARY_DEVICE_HANDLE_EXTENDED_DATA;
  76
  77 ///
  78 /// Resource Allocation Failure Extended Error Data
  79 ///
  80 typedef struct {
  81   UINT32                             Bar;
  82   UINT16                             DevicePathSize;
  83   UINT16                             ReqResSize;
  84   UINT16                             AllocResSize;
  85   UINT8                              *DevicePath;
  86   UINT8                              *ReqRes;
  87   UINT8                              *AllocRes;
  88 } REPORT_STATUS_CODE_LIBRARY_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
  89
  90
  91 //
  92 // Driver Produced Protocol Prototypes
  93 //
  94
  95 #define VGABASE1  0x3B0
  96 #define VGALIMIT1 0x3BB
  97
  98 #define VGABASE2  0x3C0
  99 #define VGALIMIT2 0x3DF
 100
 101 #define ISABASE   0x100
 102 #define ISALIMIT  0x3FF
 103
 104 typedef enum {
 105   PciBarTypeUnknown = 0,
 106   PciBarTypeIo16,
 107   PciBarTypeIo32,
 108   PciBarTypeMem32,
 109   PciBarTypePMem32,
 110   PciBarTypeMem64,
 111   PciBarTypePMem64,
 112   PciBarTypeIo,
 113   PciBarTypeMem,
 114   PciBarTypeMaxType
 115 } PCI_BAR_TYPE;
 116
 117 typedef struct {
 118   UINT64        BaseAddress;
 119   UINT64        Length;
 120   UINT64        Alignment;
 121   PCI_BAR_TYPE  BarType;
 122   BOOLEAN       Prefetchable;
 123   UINT8         MemType;
 124   UINT8         Offset;
 125 } PCI_BAR;
 126
 127 #define PPB_BAR_0                             0
 128 #define PPB_BAR_1                             1
 129 #define PPB_IO_RANGE                          2
 130 #define PPB_MEM32_RANGE                       3
 131 #define PPB_PMEM32_RANGE                      4
 132 #define PPB_PMEM64_RANGE                      5
 133 #define PPB_MEM64_RANGE                       0xFF
 134
 135 #define P2C_BAR_0                             0
 136 #define P2C_MEM_1                             1
 137 #define P2C_MEM_2                             2
 138 #define P2C_IO_1                              3
 139 #define P2C_IO_2                              4
 140
 141 #define PCI_IO_DEVICE_SIGNATURE               EFI_SIGNATURE_32 ('p', 'c', 'i', 'o')
 142
 143 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 144 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 145 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 146 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 147 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 148 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 149 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 150
 151 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 152 //
 153 // Define resource status constant
 154 //
 155 #define EFI_RESOURCE_NONEXISTENT  0xFFFFFFFFFFFFFFFFULL
 156 #define EFI_RESOURCE_LESS         0xFFFFFFFFFFFFFFFEULL
 157 #define EFI_RESOURCE_SATISFIED    0x0000000000000000ULL
 158
 159 //
 160 // Define option for attribute
 161 //
 162 #define EFI_SET_SUPPORTS    0
 163 #define EFI_SET_ATTRIBUTES  1
 164
 165 typedef struct _PCI_IO_DEVICE {
 166   UINT32                                    Signature;
 167   EFI_HANDLE                                Handle;
 168   EFI_PCI_IO_PROTOCOL                       PciIo;
 169   LIST_ENTRY                                Link;
 170
 171   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 172   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 173   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 174
 175   //
 176   // PCI configuration space header type
 177   //
 178   PCI_TYPE00                                Pci;
 179
 180   //
 181   // Bus number, Device number, Function number
 182   //
 183   UINT8                                     BusNumber;
 184   UINT8                                     DeviceNumber;
 185   UINT8                                     FunctionNumber;
 186
 187   //
 188   // BAR for this PCI Device
 189   //
 190   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 191
 192   //
 193   // The bridge device this pci device is subject to
 194   //
 195   struct _PCI_IO_DEVICE                     *Parent;
 196
 197   //
 198   // A linked list for children Pci Device if it is bridge device
 199   //
 200   LIST_ENTRY                                ChildList;
 201
 202   //
 203   // TURE if the PCI bus driver creates the handle for this PCI device
 204   //
 205   BOOLEAN                                   Registered;
 206
 207   //
 208   // TRUE if the PCI bus driver successfully allocates the resource required by
 209   // this PCI device
 210   //
 211   BOOLEAN                                   Allocated;
 212
 213   //
 214   // The attribute this PCI device currently set
 215   //
 216   UINT64                                    Attributes;
 217
 218   //
 219   // The attributes this PCI device actually supports
 220   //
 221   UINT64                                    Supports;
 222
 223   //
 224   // The resource decode the bridge supports
 225   //
 226   UINT32                                    Decodes;
 227
 228   //
 229   // The OptionRom Size
 230   //
 231   UINT64                                    RomSize;
 232
 233   //
 234   // The OptionRom Size
 235   //
 236   UINT64                                    RomBase;
 237
 238   //
 239   // TRUE if all OpROM (in device or in platform specific position) have been processed
 240   //
 241   BOOLEAN                                   AllOpRomProcessed;
 242
 243   //
 244   // TRUE if there is any EFI driver in the OptionRom
 245   //
 246   BOOLEAN                                   BusOverride;
 247
 248   //
 249   //  A list tracking reserved resource on a bridge device
 250   //
 251   LIST_ENTRY                                ReservedResourceList;
 252
 253   //
 254   // A list tracking image handle of platform specific overriding driver
 255   //
 256   LIST_ENTRY                                OptionRomDriverList;
 257
 258   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 259   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 260
 261   BOOLEAN                                   IsPciExp;
 262
 263 } PCI_IO_DEVICE;
 264
 265
 266 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 267   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 268
 269 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 270   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 271
 272 #define PCI_IO_DEVICE_FROM_LINK(a) \
 273   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 274
 275 //
 276 // Global Variables
 277 //
 278 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
 279 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
 280 extern LIST_ENTRY                                   gPciDevicePool;
 281 extern BOOLEAN                                      gFullEnumeration;
 282 extern UINTN                                        gPciHostBridgeNumber;
 283 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 284 extern UINT64                                       gAllOne;
 285 extern UINT64                                       gAllZero;
 286
 287 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 288
 289 #include "PciIo.h"
 290 #include "PciCommand.h"
 291 #include "PciDeviceSupport.h"
 292 #include "PciEnumerator.h"
 293 #include "PciEnumeratorSupport.h"
 294 #include "PciDriverOverride.h"
 295 #include "PciRomTable.h"
 296 #include "PciOptionRomSupport.h"
 297 #include "PciPowerManagement.h"
 298 #include "PciHotPlugSupport.h"
 299 #include "PciLib.h"
 300
 301 //
 302 // PCI Bus Support Function Prototypes
 303 //
 304 EFI_STATUS
 305 EFIAPI
 306 PciBusDriverBindingSupported (
 307   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 308   IN EFI_HANDLE                     Controller,
 309   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 310   );
 311
 312 EFI_STATUS
 313 EFIAPI
 314 PciBusDriverBindingStart (
 315   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 316   IN EFI_HANDLE                     Controller,
 317   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 318   );
 319
 320 EFI_STATUS
 321 EFIAPI
 322 PciBusDriverBindingStop (
 323   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 324   IN  EFI_HANDLE                    Controller,
 325   IN  UINTN                         NumberOfChildren,
 326   IN  EFI_HANDLE                    *ChildHandleBuffer
 327   );
 328
 329 #endif