IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h

   1 /** @file
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   PciLib.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver Lib header file.
  19   Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
  20   support hot plug.
  21
  22 Revision History
  23
  24 **/
  25
  26 #ifndef _EFI_PCI_LIB_H_
  27 #define _EFI_PCI_LIB_H_
  28
  29 //
  30 // Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask
  31 //
  32 #define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01
  33 #define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02
  34 #define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04
  35 #define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08
  36 #define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a
  37
  38 typedef struct {
  39   EFI_HANDLE            Handle;
  40 } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
  41
  42 typedef struct {
  43   UINT32                             Bar;
  44   UINT16                             DevicePathSize;
  45   UINT16                             ReqResSize;
  46   UINT16                             AllocResSize;
  47   UINT8                              *DevicePath;
  48   UINT8                              *ReqRes;
  49   UINT8                              *AllocRes;
  50 } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
  51
  52 /**
  53   Install protocol gEfiPciHotPlugRequestProtocolGuid
  54   @param Status    return status of protocol installation.
  55 **/
  56 VOID
  57 InstallHotPlugRequestProtocol (
  58   IN  EFI_STATUS                    *Status
  59   );
  60
  61 /**
  62   Install protocol gEfiPciHotplugDeviceGuid into hotplug device
  63   instance.
  64
  65   @param PciIoDevice  hotplug device instance.
  66
  67 **/
  68 VOID
  69 InstallPciHotplugGuid (
  70   IN  PCI_IO_DEVICE                  *PciIoDevice
  71   );
  72
  73 /**
  74   UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device
  75   instance.
  76
  77   @param PciIoDevice  hotplug device instance.
  78
  79 **/
  80 VOID
  81 UninstallPciHotplugGuid (
  82   IN  PCI_IO_DEVICE                  *PciIoDevice
  83   );
  84
  85 /**
  86   Retrieve the BAR information via PciIo interface.
  87
  88   @param PciIoDevice Pci device instance.
  89 **/
  90 VOID
  91 GetBackPcCardBar (
  92   IN  PCI_IO_DEVICE                  *PciIoDevice
  93   );
  94
  95 /**
  96   Remove rejected pci device from specific root bridge
  97   handle.
  98
  99   @param RootBridgeHandle  specific parent root bridge handle.
 100   @param Bridge            Bridge device instance.
 101
 102   @retval EFI_SUCCESS  Success operation.
 103 **/
 104 EFI_STATUS
 105 RemoveRejectedPciDevices (
 106   EFI_HANDLE        RootBridgeHandle,
 107   IN PCI_IO_DEVICE  *Bridge
 108   );
 109
 110 /**
 111   Wrapper function for allocating resource for pci host bridge.
 112
 113   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 114
 115 **/
 116 EFI_STATUS
 117 PciHostBridgeResourceAllocator (
 118   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 119   );
 120
 121 /**
 122   Wrapper function for allocating resource for pci host bridge without hotplug device support.
 123
 124   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 125
 126 **/
 127 EFI_STATUS
 128 PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (
 129   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 130   );
 131
 132 /**
 133   Wrapper function for allocating resource for pci host bridge with hotplug device support.
 134
 135   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 136
 137 **/
 138 EFI_STATUS
 139 PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (
 140   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 141   );
 142
 143 /**
 144   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 145   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 146
 147   @param  Bridge          Bridge device instance.
 148   @param  StartBusNumber  start point.
 149   @param  SubBusNumber    Point to sub bus number.
 150   @param  PaddedBusRange  Customized bus number.
 151
 152   @retval EFI_SUCCESS     Success.
 153   @retval EFI_DEVICE_ERROR Fail to scan bus.
 154 **/
 155 EFI_STATUS
 156 PciScanBus (
 157   IN PCI_IO_DEVICE                      *Bridge,
 158   IN UINT8                              StartBusNumber,
 159   OUT UINT8                             *SubBusNumber,
 160   OUT UINT8                             *PaddedBusRange
 161   );
 162
 163 /**
 164   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 165   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 166
 167   @param  Bridge          Bridge device instance.
 168   @param  StartBusNumber  start point.
 169   @param  SubBusNumber    Point to sub bus number.
 170   @param  PaddedBusRange  Customized bus number.
 171
 172   @retval EFI_SUCCESS     Success.
 173   @retval EFI_DEVICE_ERROR Fail to scan bus.
 174 **/
 175 EFI_STATUS
 176 PciScanBus_WithHotPlugDeviceSupport (
 177   IN PCI_IO_DEVICE                      *Bridge,
 178   IN UINT8                              StartBusNumber,
 179   OUT UINT8                             *SubBusNumber,
 180   OUT UINT8                             *PaddedBusRange
 181   );
 182
 183 /**
 184   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 185   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 186
 187   @param  Bridge          Bridge device instance.
 188   @param  StartBusNumber  start point.
 189   @param  SubBusNumber    Point to sub bus number.
 190   @param  PaddedBusRange  Customized bus number.
 191
 192   @retval EFI_SUCCESS     Success.
 193   @retval EFI_DEVICE_ERROR Fail to scan bus.
 194 **/
 195 EFI_STATUS
 196 PciScanBus_WithoutHotPlugDeviceSupport (
 197   IN PCI_IO_DEVICE                      *Bridge,
 198   IN UINT8                              StartBusNumber,
 199   OUT UINT8                             *SubBusNumber,
 200   OUT UINT8                             *PaddedBusRange
 201   );
 202
 203 /**
 204   Process Option Rom on this host bridge.
 205
 206   @param Bridge  Pci bridge device instance.
 207
 208   @retval EFI_SUCCESS Success.
 209 **/
 210 EFI_STATUS
 211 PciRootBridgeP2CProcess (
 212   IN PCI_IO_DEVICE *Bridge
 213   );
 214
 215 /**
 216   Process Option Rom on this host bridge.
 217
 218   @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 219
 220   @retval EFI_NOT_FOUND Can not find the root bridge instance.
 221   @retval EFI_SUCCESS   Success process.
 222 **/
 223 EFI_STATUS
 224 PciHostBridgeP2CProcess (
 225   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 226   );
 227
 228 /**
 229   This function is used to enumerate the entire host bridge
 230   in a given platform.
 231
 232   @param PciResAlloc   A pointer to the resource allocate protocol.
 233
 234   @retval EFI_OUT_OF_RESOURCES no enough resource.
 235   @retval EFI_SUCCESS Success.
 236
 237 **/
 238 EFI_STATUS
 239 PciHostBridgeEnumerator (
 240   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc
 241   );
 242
 243 /**
 244   Read PCI configuration space through EFI_PCI_IO_PROTOCOL.
 245
 246   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 247   @param  Width               Signifies the width of the memory operations.
 248   @param  Address             The address within the PCI configuration space for the PCI controller.
 249   @param  Count               The number of unit to be read.
 250   @param  Buffer              For read operations, the destination buffer to store the results. For
 251                               write operations, the source buffer to write data from.
 252
 253   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 254   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 255   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 256   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 257
 258 **/
 259 EFI_STATUS
 260 PciIoRead (
 261   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 262   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 263   IN       UINT32                                 Address,
 264   IN       UINTN                                  Count,
 265   IN OUT   VOID                                   *Buffer
 266   );
 267
 268 /**
 269   Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
 270
 271   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 272   @param  Width               Signifies the width of the memory operations.
 273   @param  Address             The address within the PCI configuration space for the PCI controller.
 274   @param  Count               The number of unit to be write.
 275   @param  Buffer              For read operations, the destination buffer to store the results. For
 276                               write operations, the source buffer to write data from.
 277
 278   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 279   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 280   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 281   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 282
 283 **/
 284 EFI_STATUS
 285 PciIoWrite (
 286   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 287   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 288   IN       UINT32                                 Address,
 289   IN       UINTN                                  Count,
 290   IN OUT   VOID                                   *Buffer
 291   );
 292
 293 /**
 294   Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 295
 296   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 297   @param  Pci                 A pointer to PCI_TYPE00.
 298   @param  Width               Signifies the width of the memory operations.
 299   @param  Address             The address within the PCI configuration space for the PCI controller.
 300   @param  Count               The number of unit to be write.
 301   @param  Buffer              For read operations, the destination buffer to store the results. For
 302                               write operations, the source buffer to write data from.
 303
 304   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 305   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 306   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 307   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 308
 309 **/
 310 EFI_STATUS
 311 PciRootBridgeIoWrite (
 312   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 313   IN       PCI_TYPE00                             *Pci,
 314   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 315   IN       UINT64                                 Address,
 316   IN       UINTN                                  Count,
 317   IN OUT   VOID                                   *Buffer
 318   );
 319
 320 /**
 321   Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 322
 323   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 324   @param  Pci                 A pointer to PCI_TYPE00.
 325   @param  Width               Signifies the width of the memory operations.
 326   @param  Address             The address within the PCI configuration space for the PCI controller.
 327   @param  Count               The number of unit to be read.
 328   @param  Buffer              For read operations, the destination buffer to store the results. For
 329                               write operations, the source buffer to write data from.
 330
 331   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 332   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 333   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 334   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 335
 336 **/
 337 EFI_STATUS
 338 PciRootBridgeIoRead (
 339   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 340   IN       PCI_TYPE00                             *Pci,         OPTIONAL
 341   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 342   IN       UINT64                                 Address,
 343   IN       UINTN                                  Count,
 344   IN OUT   VOID                                   *Buffer
 345   );
 346 #endif