3 This file contains URB request, each request is warpped in a
4 URB (Usb Request Block).
6 Copyright (c) 2007, Intel Corporation
7 All rights reserved. This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef _EFI_EHCI_URB_H_
18 #define _EFI_EHCI_URB_H_
21 typedef struct _EHC_QTD EHC_QTD
;
22 typedef struct _EHC_QH EHC_QH
;
23 typedef struct _URB URB
;
27 // Transfer types, used in URB to identify the transfer type
29 EHC_CTRL_TRANSFER
= 0x01,
30 EHC_BULK_TRANSFER
= 0x02,
31 EHC_INT_TRANSFER_SYNC
= 0x04,
32 EHC_INT_TRANSFER_ASYNC
= 0x08,
34 EHC_QTD_SIG
= SIGNATURE_32 ('U', 'S', 'B', 'T'),
35 EHC_QH_SIG
= SIGNATURE_32 ('U', 'S', 'B', 'H'),
36 EHC_URB_SIG
= SIGNATURE_32 ('U', 'S', 'B', 'R'),
39 // Hardware related bit definitions
50 QTD_PID_OUTPUT
= 0x00,
56 QTD_STAT_DO_PING
= 0x01,
57 QTD_STAT_DO_CS
= 0x02,
58 QTD_STAT_TRANS_ERR
= 0x08,
59 QTD_STAT_BABBLE_ERR
= 0x10,
60 QTD_STAT_BUFF_ERR
= 0x20,
61 QTD_STAT_HALTED
= 0x40,
62 QTD_STAT_ACTIVE
= 0x80,
63 QTD_STAT_ERR_MASK
= QTD_STAT_TRANS_ERR
| QTD_STAT_BABBLE_ERR
| QTD_STAT_BUFF_ERR
,
67 QTD_BUF_MASK
= 0x0FFF,
69 QH_MICROFRAME_0
= 0x01,
70 QH_MICROFRAME_1
= 0x02,
71 QH_MICROFRAME_2
= 0x04,
72 QH_MICROFRAME_3
= 0x08,
73 QH_MICROFRAME_4
= 0x10,
74 QH_MICROFRAME_5
= 0x20,
75 QH_MICROFRAME_6
= 0x40,
76 QH_MICROFRAME_7
= 0x80,
78 USB_ERR_SHORT_PACKET
= 0x200
82 // Fill in the hardware link point: pass in a EHC_QH/QH_HW
83 // pointer to QH_LINK; A EHC_QTD/QTD_HW pointer to QTD_LINK
85 #define QH_LINK(Addr, Type, Term) \
86 ((UINT32) ((EHC_LOW_32BIT (Addr) & 0xFFFFFFE0) | (Type) | ((Term) ? 1 : 0)))
88 #define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))
91 // The defination of EHCI hardware used data structure for
92 // little endian architecture. The QTD and QH structures
93 // are required to be 32 bytes aligned. Don't add members
94 // to the head of the associated software strucuture.
106 UINT32 TotalBytes
: 15;
107 UINT32 DataToggle
: 1;
116 // Endpoint capabilities/Characteristics DWord 1 and DWord 2
118 UINT32 DeviceAddr
: 7;
123 UINT32 ReclaimHead
: 1;
124 UINT32 MaxPacketLen
: 11;
126 UINT32 NakReload
: 4;
132 UINT32 Multiplier
: 2;
135 // Transaction execution overlay area
146 UINT32 TotalBytes
: 15;
147 UINT32 DataToggle
: 1;
156 // Endpoint address and its capabilities
158 typedef struct _USB_ENDPOINT
{
160 UINT8 EpAddr
; // Endpoint address, no direction encoded in
161 EFI_USB_DATA_DIRECTION Direction
;
166 UINT8 Toggle
; // Data toggle, not used for control transfer
168 UINTN PollRate
; // Polling interval used by EHCI
172 // Software QTD strcture, this is used to manage all the
173 // QTD generated from a URB. Don't add fields before QtdHw.
178 LIST_ENTRY QtdList
; // The list of QTDs to one end point
179 UINT8
*Data
; // Buffer of the original data
180 UINTN DataLen
; // Original amount of data in this QTD
184 // Software QH structure. All three different transaction types
185 // supported by UEFI USB, that is the control/bulk/interrupt
186 // transfers use the queue head and queue token strcuture.
188 // Interrupt QHs are linked to periodic frame list in the reversed
189 // 2^N tree. Each interrupt QH is linked to the list starting at
190 // frame 0. There is a dummy interrupt QH linked to each frame as
191 // a sentinental whose polling interval is 1. Synchronous interrupt
192 // transfer is linked after this dummy QH.
194 // For control/bulk transfer, only synchronous (in the sense of UEFI)
195 // transfer is supported. A dummy QH is linked to EHCI AsyncListAddr
196 // as the reclamation header. New transfer is inserted after this QH.
201 EHC_QH
*NextQh
; // The queue head pointed to by horizontal link
202 LIST_ENTRY Qtds
; // The list of QTDs to this queue head
207 // URB (Usb Request Block) contains information for all kinds of
215 // Transaction information
218 EFI_USB_DEVICE_REQUEST
*Request
; // Control transfer only
219 VOID
*RequestPhy
; // Address of the mapped request
223 VOID
*DataPhy
; // Address of the mapped user data
225 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
234 // Transaction result
237 UINTN Completed
; // completed data length
244 Create a single QTD to hold the data.
246 @param Ehc The EHCI device.
247 @param Data Current data not associated with a QTD.
248 @param DataLen The length of the data.
249 @param PktId Packet ID to use in the QTD.
250 @param Toggle Data toggle to use in the QTD.
251 @param MaxPacket Maximu packet length of the endpoint.
253 @return Created QTD or NULL if failed to create one.
269 Allocate and initialize a EHCI queue head.
271 @param Ehci The EHCI device.
272 @param Ep The endpoint to create queue head for.
274 @return Created queue head or NULL if failed to create one.
279 IN USB2_HC_DEV
*Ehci
,
285 Free an allocated URB. It is possible for it to be partially inited.
287 @param Ehc The EHCI device.
288 @param Urb The URB to free.
301 Create a new URB and its associated QTD.
303 @param Ehc The EHCI device.
304 @param DevAddr The device address.
305 @param EpAddr Endpoint addrress & its direction.
306 @param DevSpeed The device speed.
307 @param Toggle Initial data toggle to use.
308 @param MaxPacket The max packet length of the endpoint.
309 @param Hub The transaction translator to use.
310 @param Type The transaction type.
311 @param Request The standard USB request for control transfer.
312 @param Data The user data to transfer.
313 @param DataLen The length of data buffer.
314 @param Callback The function to call when data is transferred.
315 @param Context The context to the callback.
316 @param Interval The interval for interrupt transfer.
318 @return Created URB or NULL.
329 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Hub
,
331 IN EFI_USB_DEVICE_REQUEST
*Request
,
334 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,