Import EhciDxe and UhciDxe into MdeModulePkg.
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / UhciQueue.h
1 /** @file
2
3 Copyright (c) 2007, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13
14 UhciQueue.h
15
16 Abstract:
17
18 The definition for UHCI register operation routines.
19
20 Revision History
21
22
23 **/
24
25 #ifndef _EFI_UHCI_QUEUE_H_
26 #define _EFI_UHCI_QUEUE_H_
27
28 //
29 // Macroes used to set various links in UHCI's driver.
30 // In this UHCI driver, QH's horizontal link always pointers to other QH,
31 // and its vertical link always pointers to TD. TD's next pointer always
32 // pointers to other sibling TD. Frame link always pointers to QH because
33 // ISO transfer isn't supported.
34 //
35 // We should use UINT32 to access these pointers to void race conditions
36 // with hardware.
37 //
38 #define QH_HLINK(Pointer, Terminate) \
39 (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | 0x02 | ((Terminate) ? 0x01 : 0))
40
41 #define QH_VLINK(Pointer, Terminate) \
42 (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | ((Terminate) ? 0x01 : 0))
43
44 #define TD_LINK(Pointer, VertFirst, Terminate) \
45 (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | \
46 ((VertFirst) ? 0x04 : 0) | ((Terminate) ? 0x01 : 0))
47
48 #define LINK_TERMINATED(Link) (((Link) & 0x01) != 0)
49
50 #define UHCI_ADDR(QhOrTd) ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0))
51
52 #pragma pack(1)
53 //
54 // Both links in QH has this internal structure:
55 // Next pointer: 28, Reserved: 2, NextIsQh: 1, Terminate: 1
56 // This is the same as frame list entry.
57 //
58 typedef struct {
59 UINT32 HorizonLink;
60 UINT32 VerticalLink;
61 } UHCI_QH_HW;
62
63 //
64 // Next link in TD has this internal structure:
65 // Next pointer: 28, Reserved: 1, Vertical First: 1, NextIsQh: 1, Terminate: 1
66 //
67 typedef struct {
68 UINT32 NextLink;
69 UINT32 ActualLen : 11;
70 UINT32 Reserved1 : 5;
71 UINT32 Status : 8;
72 UINT32 IntOnCpl : 1;
73 UINT32 IsIsoch : 1;
74 UINT32 LowSpeed : 1;
75 UINT32 ErrorCount : 2;
76 UINT32 ShortPacket : 1;
77 UINT32 Reserved2 : 2;
78 UINT32 PidCode : 8;
79 UINT32 DeviceAddr : 7;
80 UINT32 EndPoint : 4;
81 UINT32 DataToggle : 1;
82 UINT32 Reserved3 : 1;
83 UINT32 MaxPacketLen: 11;
84 UINT32 DataBuffer;
85 } UHCI_TD_HW;
86 #pragma pack()
87
88 typedef struct _UHCI_TD_SW UHCI_TD_SW;
89 typedef struct _UHCI_QH_SW UHCI_QH_SW;
90
91 typedef struct _UHCI_QH_SW {
92 UHCI_QH_HW QhHw;
93 UHCI_QH_SW *NextQh;
94 UHCI_TD_SW *TDs;
95 UINTN Interval;
96 } UHCI_QH_SW;
97
98 typedef struct _UHCI_TD_SW {
99 UHCI_TD_HW TdHw;
100 UHCI_TD_SW *NextTd;
101 UINT8 *Data;
102 UINT16 DataLen;
103 } UHCI_TD_SW;
104
105
106 /**
107 Link the TD To QH
108
109 @param Qh The queue head for the TD to link to
110 @param Td The TD to link
111
112 @return VOID
113
114 **/
115 VOID
116 UhciLinkTdToQh (
117 IN UHCI_QH_SW *Qh,
118 IN UHCI_TD_SW *Td
119 )
120 ;
121
122
123 /**
124 Unlink TD from the QH
125
126 @param Qh The queue head to unlink from
127 @param Td The TD to unlink
128
129 @return VOID
130
131 **/
132 VOID
133 UhciUnlinkTdFromQh (
134 IN UHCI_QH_SW *Qh,
135 IN UHCI_TD_SW *Td
136 )
137 ;
138
139
140 /**
141 Map address of request structure buffer
142
143 @param Uhc The UHCI device
144 @param Request The user request buffer
145 @param MappedAddr Mapped address of request
146 @param Map Identificaion of this mapping to return
147
148 @return EFI_SUCCESS : Success
149 @return EFI_DEVICE_ERROR : Fail to map the user request
150
151 **/
152 EFI_STATUS
153 UhciMapUserRequest (
154 IN USB_HC_DEV *Uhc,
155 IN OUT VOID *Request,
156 OUT UINT8 **MappedAddr,
157 OUT VOID **Map
158 )
159 ;
160
161
162 /**
163 Map address of user data buffer
164
165 @param Uhc The UHCI device
166 @param Direction direction of the data transfer
167 @param Data The user data buffer
168 @param Len Length of the user data
169 @param PktId Packet identificaion
170 @param MappedAddr mapped address to return
171 @param Map identificaion of this mapping to return
172
173 @return EFI_SUCCESS : Success
174 @return EFI_DEVICE_ERROR : Fail to map the user data
175
176 **/
177 EFI_STATUS
178 UhciMapUserData (
179 IN USB_HC_DEV *Uhc,
180 IN EFI_USB_DATA_DIRECTION Direction,
181 IN VOID *Data,
182 IN OUT UINTN *Len,
183 OUT UINT8 *PktId,
184 OUT UINT8 **MappedAddr,
185 OUT VOID **Map
186 )
187 ;
188
189
190 /**
191 Delete a list of TDs
192
193 @param Uhc The UHCI device
194 @param FirstTd TD link list head
195
196 @return VOID
197
198 **/
199 VOID
200 UhciDestoryTds (
201 IN USB_HC_DEV *Uhc,
202 IN UHCI_TD_SW *FirstTd
203 )
204 ;
205
206
207 /**
208 Create an initialize a new queue head
209
210 @param Uhc The UHCI device
211 @param Interval The polling interval for the queue
212
213 @return The newly created queue header
214
215 **/
216 UHCI_QH_SW *
217 UhciCreateQh (
218 IN USB_HC_DEV *Uhc,
219 IN UINTN Interval
220 )
221 ;
222
223
224 /**
225 Create Tds list for Control Transfer
226
227 @param Uhc The UHCI device
228 @param DeviceAddr The device address
229 @param DataPktId Packet Identification of Data Tds
230 @param Request A pointer to request structure buffer to transfer
231 @param Data A pointer to user data buffer to transfer
232 @param DataLen Length of user data to transfer
233 @param MaxPacket Maximum packet size for control transfer
234 @param IsLow Full speed or low speed
235
236 @return The Td list head for the control transfer
237
238 **/
239 UHCI_TD_SW *
240 UhciCreateCtrlTds (
241 IN USB_HC_DEV *Uhc,
242 IN UINT8 DeviceAddr,
243 IN UINT8 DataPktId,
244 IN UINT8 *Request,
245 IN UINT8 *Data,
246 IN UINTN DataLen,
247 IN UINT8 MaxPacket,
248 IN BOOLEAN IsLow
249 )
250 ;
251
252
253 /**
254 Create Tds list for Bulk/Interrupt Transfer
255
256 @param Uhc USB_HC_DEV
257 @param DevAddr Address of Device
258 @param EndPoint Endpoint Number
259 @param PktId Packet Identification of Data Tds
260 @param Data A pointer to user data buffer to transfer
261 @param DataLen Length of user data to transfer
262 @param DataToggle Data Toggle Pointer
263 @param MaxPacket Maximum packet size for Bulk/Interrupt transfer
264 @param IsLow Is Low Speed Device
265
266 @return The Tds list head for the bulk transfer
267
268 **/
269 UHCI_TD_SW *
270 UhciCreateBulkOrIntTds (
271 IN USB_HC_DEV *Uhc,
272 IN UINT8 DevAddr,
273 IN UINT8 EndPoint,
274 IN UINT8 PktId,
275 IN UINT8 *Data,
276 IN UINTN DataLen,
277 IN OUT UINT8 *DataToggle,
278 IN UINT8 MaxPacket,
279 IN BOOLEAN IsLow
280 )
281 ;
282
283 #endif