3 This file contains the definition for XHCI host controller schedule routines.
5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #ifndef _EFI_XHCI_SCHED_H_
17 #define _EFI_XHCI_SCHED_H_
19 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
22 // Transfer types, used in URB to identify the transfer type
24 #define XHC_CTRL_TRANSFER 0x01
25 #define XHC_BULK_TRANSFER 0x02
26 #define XHC_INT_TRANSFER_SYNC 0x04
27 #define XHC_INT_TRANSFER_ASYNC 0x08
28 #define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
33 #define TRB_TYPE_NORMAL 1
34 #define TRB_TYPE_SETUP_STAGE 2
35 #define TRB_TYPE_DATA_STAGE 3
36 #define TRB_TYPE_STATUS_STAGE 4
37 #define TRB_TYPE_ISOCH 5
38 #define TRB_TYPE_LINK 6
39 #define TRB_TYPE_EVENT_DATA 7
40 #define TRB_TYPE_NO_OP 8
41 #define TRB_TYPE_EN_SLOT 9
42 #define TRB_TYPE_DIS_SLOT 10
43 #define TRB_TYPE_ADDRESS_DEV 11
44 #define TRB_TYPE_CON_ENDPOINT 12
45 #define TRB_TYPE_EVALU_CONTXT 13
46 #define TRB_TYPE_RESET_ENDPOINT 14
47 #define TRB_TYPE_STOP_ENDPOINT 15
48 #define TRB_TYPE_SET_TR_DEQUE 16
49 #define TRB_TYPE_RESET_DEV 17
50 #define TRB_TYPE_GET_PORT_BANW 21
51 #define TRB_TYPE_FORCE_HEADER 22
52 #define TRB_TYPE_NO_OP_COMMAND 23
53 #define TRB_TYPE_TRANS_EVENT 32
54 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
55 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
56 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
57 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
58 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
61 // Endpoint Type (EP Type).
63 #define ED_NOT_VALID 0
64 #define ED_ISOCH_OUT 1
66 #define ED_INTERRUPT_OUT 3
67 #define ED_CONTROL_BIDIR 4
70 #define ED_INTERRUPT_IN 7
73 // 6.4.5 TRB Completion Codes
75 #define TRB_COMPLETION_INVALID 0
76 #define TRB_COMPLETION_SUCCESS 1
77 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
78 #define TRB_COMPLETION_BABBLE_ERROR 3
79 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
80 #define TRB_COMPLETION_TRB_ERROR 5
81 #define TRB_COMPLETION_STALL_ERROR 6
82 #define TRB_COMPLETION_SHORT_PACKET 13
83 #define TRB_COMPLETION_STOPPED 26
84 #define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
87 // The topology string used to present usb device location
89 typedef struct _USB_DEV_TOPOLOGY
{
91 // The tier concatenation of down stream port.
93 UINT32 RouteString
:20;
95 // The root port number of the chain.
99 // The Tier the device reside.
105 // USB Device's RouteChart
107 typedef union _USB_DEV_ROUTE
{
109 USB_DEV_TOPOLOGY Route
;
113 // Endpoint address and its capabilities
115 typedef struct _USB_ENDPOINT
{
117 // Store logical device address assigned by UsbBus
118 // It's because some XHCI host controllers may assign the same physcial device
119 // address for those devices inserted at different root port.
124 EFI_USB_DATA_DIRECTION Direction
;
133 typedef struct _TRB_TEMPLATE
{
146 typedef struct _TRANSFER_RING
{
149 TRB_TEMPLATE
*RingEnqueue
;
150 TRB_TEMPLATE
*RingDequeue
;
154 typedef struct _EVENT_RING
{
158 TRB_TEMPLATE
*EventRingEnqueue
;
159 TRB_TEMPLATE
*EventRingDequeue
;
164 // URB (Usb Request Block) contains information for all kinds of
167 typedef struct _URB
{
171 // Usb Device URB related information
174 EFI_USB_DEVICE_REQUEST
*Request
;
179 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
186 // completed data length
190 // Command/Tranfer Ring info
193 TRB_TEMPLATE
*TrbStart
;
194 TRB_TEMPLATE
*TrbEnd
;
200 TRB_TEMPLATE
*EvtTrb
;
204 // 6.5 Event Ring Segment Table
205 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
206 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
207 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
208 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
210 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
213 UINT32 RingTrbSize
:16;
216 } EVENT_RING_SEG_TABLE_ENTRY
;
219 // 6.4.1.1 Normal TRB
220 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
221 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
222 // Rings, and to define the Data stage information for Control Transfer Rings.
224 typedef struct _TRANSFER_TRB_NORMAL
{
244 } TRANSFER_TRB_NORMAL
;
247 // 6.4.1.2.1 Setup Stage TRB
248 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
250 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
251 UINT32 bmRequestType
:8;
270 } TRANSFER_TRB_CONTROL_SETUP
;
273 // 6.4.1.2.2 Data Stage TRB
274 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
276 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
296 } TRANSFER_TRB_CONTROL_DATA
;
299 // 6.4.1.2.2 Data Stage TRB
300 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
302 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
318 } TRANSFER_TRB_CONTROL_STATUS
;
321 // 6.4.2.1 Transfer Event TRB
322 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
323 // for more information on the use and operation of Transfer Events.
325 typedef struct _EVT_TRB_TRANSFER
{
331 UINT32 Completecode
:8;
344 // 6.4.2.2 Command Completion Event TRB
345 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
346 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
348 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
354 UINT32 Completecode
:8;
361 } EVT_TRB_COMMAND_COMPLETION
;
364 TRB_TEMPLATE TrbTemplate
;
365 TRANSFER_TRB_NORMAL TrbNormal
;
366 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
367 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
368 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
372 // 6.4.3.1 No Op Command TRB
373 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
374 // mechanisms offered by the xHCI.
376 typedef struct _CMD_TRB_NO_OP
{
388 // 6.4.3.2 Enable Slot Command TRB
389 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
390 // selected slot to the host in a Command Completion Event.
392 typedef struct _CMD_TRB_ENABLE_SLOT
{
401 } CMD_TRB_ENABLE_SLOT
;
404 // 6.4.3.3 Disable Slot Command TRB
405 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
406 // internal xHC resources assigned to the slot.
408 typedef struct _CMD_TRB_DISABLE_SLOT
{
418 } CMD_TRB_DISABLE_SLOT
;
421 // 6.4.3.4 Address Device Command TRB
422 // The Address Device Command TRB transitions the selected Device Context from the Default to the
423 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
424 // issue a SET_ADDRESS request to the USB device.
426 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
439 } CMD_TRB_ADDRESS_DEVICE
;
442 // 6.4.3.5 Configure Endpoint Command TRB
443 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
444 // endpoints selected by the command.
446 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
459 } CMD_TRB_CONFIG_ENDPOINT
;
462 // 6.4.3.6 Evaluate Context Command TRB
463 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
464 // Context data structures in the Device Context have been modified by system software and that the xHC
465 // shall evaluate any changes
467 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
479 } CMD_TRB_EVALUATE_CONTEXT
;
482 // 6.4.3.7 Reset Endpoint Command TRB
483 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
485 typedef struct _CMD_TRB_RESET_ENDPOINT
{
497 } CMD_TRB_RESET_ENDPOINT
;
500 // 6.4.3.8 Stop Endpoint Command TRB
501 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
502 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
504 typedef struct _CMD_TRB_STOP_ENDPOINT
{
516 } CMD_TRB_STOP_ENDPOINT
;
519 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
520 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
521 // Pointer and DCS fields of an Endpoint or Stream Context.
523 typedef struct _CMD_SET_TR_DEQ_POINTER
{
537 } CMD_SET_TR_DEQ_POINTER
;
541 // A Link TRB provides support for non-contiguous TRB Rings.
543 typedef struct _LINK_TRB
{
549 UINT32 InterTarget
:10;
562 // 6.2.2 Slot Context
564 typedef struct _SLOT_CONTEXT
{
565 UINT32 RouteString
:20;
570 UINT32 ContextEntries
:5;
572 UINT32 MaxExitLatency
:16;
573 UINT32 RootHubPortNum
:8;
576 UINT32 TTHubSlotId
:8;
580 UINT32 InterTarget
:10;
582 UINT32 DeviceAddress
:8;
592 typedef struct _SLOT_CONTEXT_64
{
593 UINT32 RouteString
:20;
598 UINT32 ContextEntries
:5;
600 UINT32 MaxExitLatency
:16;
601 UINT32 RootHubPortNum
:8;
604 UINT32 TTHubSlotId
:8;
608 UINT32 InterTarget
:10;
610 UINT32 DeviceAddress
:8;
633 // 6.2.3 Endpoint Context
635 typedef struct _ENDPOINT_CONTEXT
{
639 UINT32 MaxPStreams
:5;
649 UINT32 MaxBurstSize
:8;
650 UINT32 MaxPacketSize
:16;
656 UINT32 AverageTRBLength
:16;
657 UINT32 MaxESITPayload
:16;
664 typedef struct _ENDPOINT_CONTEXT_64
{
668 UINT32 MaxPStreams
:5;
678 UINT32 MaxBurstSize
:8;
679 UINT32 MaxPacketSize
:16;
685 UINT32 AverageTRBLength
:16;
686 UINT32 MaxESITPayload
:16;
702 } ENDPOINT_CONTEXT_64
;
706 // 6.2.5.1 Input Control Context
708 typedef struct _INPUT_CONTRL_CONTEXT
{
717 } INPUT_CONTRL_CONTEXT
;
719 typedef struct _INPUT_CONTRL_CONTEXT_64
{
736 } INPUT_CONTRL_CONTEXT_64
;
739 // 6.2.1 Device Context
741 typedef struct _DEVICE_CONTEXT
{
743 ENDPOINT_CONTEXT EP
[31];
746 typedef struct _DEVICE_CONTEXT_64
{
747 SLOT_CONTEXT_64 Slot
;
748 ENDPOINT_CONTEXT_64 EP
[31];
752 // 6.2.5 Input Context
754 typedef struct _INPUT_CONTEXT
{
755 INPUT_CONTRL_CONTEXT InputControlContext
;
757 ENDPOINT_CONTEXT EP
[31];
760 typedef struct _INPUT_CONTEXT_64
{
761 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
762 SLOT_CONTEXT_64 Slot
;
763 ENDPOINT_CONTEXT_64 EP
[31];
768 Initialize the XHCI host controller for schedule.
770 @param Xhc The XHCI Instance to be initialized.
775 IN USB_XHCI_INSTANCE
*Xhc
779 Free the resouce allocated at initializing schedule.
781 @param Xhc The XHCI Instance.
786 IN USB_XHCI_INSTANCE
*Xhc
790 Ring the door bell to notify XHCI there is a transaction to be executed through URB.
792 @param Xhc The XHCI Instance.
793 @param Urb The URB to be rung.
795 @retval EFI_SUCCESS Successfully ring the door bell.
799 RingIntTransferDoorBell (
800 IN USB_XHCI_INSTANCE
*Xhc
,
805 Execute the transfer by polling the URB. This is a synchronous operation.
807 @param Xhc The XHCI Instance.
808 @param CmdTransfer The executed URB is for cmd transfer or not.
809 @param Urb The URB to execute.
810 @param Timeout The time to wait before abort, in millisecond.
812 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
813 @return EFI_TIMEOUT The transfer failed due to time out.
814 @return EFI_SUCCESS The transfer finished OK.
819 IN USB_XHCI_INSTANCE
*Xhc
,
820 IN BOOLEAN CmdTransfer
,
826 Delete a single asynchronous interrupt transfer for
827 the device and endpoint.
829 @param Xhc The XHCI Instance.
830 @param BusAddr The logical device address assigned by UsbBus driver.
831 @param EpNum The endpoint of the target.
833 @retval EFI_SUCCESS An asynchronous transfer is removed.
834 @retval EFI_NOT_FOUND No transfer for the device is found.
838 XhciDelAsyncIntTransfer (
839 IN USB_XHCI_INSTANCE
*Xhc
,
845 Remove all the asynchronous interrupt transfers.
847 @param Xhc The XHCI Instance.
851 XhciDelAllAsyncIntTransfers (
852 IN USB_XHCI_INSTANCE
*Xhc
856 Insert a single asynchronous interrupt transfer for
857 the device and endpoint.
859 @param Xhc The XHCI Instance
860 @param BusAddr The logical device address assigned by UsbBus driver
861 @param EpAddr Endpoint addrress
862 @param DevSpeed The device speed
863 @param MaxPacket The max packet length of the endpoint
864 @param DataLen The length of data buffer
865 @param Callback The function to call when data is transferred
866 @param Context The context to the callback
868 @return Created URB or NULL
872 XhciInsertAsyncIntTransfer (
873 IN USB_XHCI_INSTANCE
*Xhc
,
879 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
886 @param Xhc The XHCI Instance.
890 XhcSetBiosOwnership (
891 IN USB_XHCI_INSTANCE
*Xhc
897 @param Xhc The XHCI Instance.
901 XhcClearBiosOwnership (
902 IN USB_XHCI_INSTANCE
*Xhc
906 Find out the slot id according to the device's route string.
908 @param Xhc The XHCI Instance.
909 @param RouteString The route string described the device location.
911 @return The slot id used by the device.
916 XhcRouteStringToSlotId (
917 IN USB_XHCI_INSTANCE
*Xhc
,
918 IN USB_DEV_ROUTE RouteString
922 Calculate the device context index by endpoint address and direction.
924 @param EpAddr The target endpoint number.
925 @param Direction The direction of the target endpoint.
927 @return The device context index of endpoint.
937 Ring the door bell to notify XHCI there is a transaction to be executed.
939 @param Xhc The XHCI Instance.
940 @param SlotId The slot id of the target device.
941 @param Dci The device context index of the target slot or endpoint.
943 @retval EFI_SUCCESS Successfully ring the door bell.
949 IN USB_XHCI_INSTANCE
*Xhc
,
955 Interrupt transfer periodic check handler.
957 @param Event Interrupt event.
958 @param Context Pointer to USB_XHCI_INSTANCE.
963 XhcMonitorAsyncRequests (
969 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
971 @param Xhc The XHCI Instance.
972 @param ParentRouteChart The route string pointed to the parent device if it exists.
973 @param Port The port to be polled.
974 @param PortState The port state.
976 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
977 @retval Others Should not appear.
982 XhcPollPortStatusChange (
983 IN USB_XHCI_INSTANCE
*Xhc
,
984 IN USB_DEV_ROUTE ParentRouteChart
,
986 IN EFI_USB_PORT_STATUS
*PortState
990 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
992 @param Xhc The XHCI Instance.
993 @param SlotId The slot id to be configured.
994 @param PortNum The total number of downstream port supported by the hub.
995 @param TTT The TT think time of the hub device.
996 @param MTT The multi-TT of the hub device.
998 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
1002 XhcConfigHubContext (
1003 IN USB_XHCI_INSTANCE
*Xhc
,
1012 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
1014 @param Xhc The XHCI Instance.
1015 @param SlotId The slot id to be configured.
1016 @param PortNum The total number of downstream port supported by the hub.
1017 @param TTT The TT think time of the hub device.
1018 @param MTT The multi-TT of the hub device.
1020 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
1024 XhcConfigHubContext64 (
1025 IN USB_XHCI_INSTANCE
*Xhc
,
1034 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1036 @param Xhc The XHCI Instance.
1037 @param SlotId The slot id to be configured.
1038 @param DeviceSpeed The device's speed.
1039 @param ConfigDesc The pointer to the usb device configuration descriptor.
1041 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1047 IN USB_XHCI_INSTANCE
*Xhc
,
1049 IN UINT8 DeviceSpeed
,
1050 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1055 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1057 @param Xhc The XHCI Instance.
1058 @param SlotId The slot id to be configured.
1059 @param DeviceSpeed The device's speed.
1060 @param ConfigDesc The pointer to the usb device configuration descriptor.
1062 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1068 IN USB_XHCI_INSTANCE
*Xhc
,
1070 IN UINT8 DeviceSpeed
,
1071 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1075 Set interface through XHCI's Configure_Endpoint cmd.
1077 @param Xhc The XHCI Instance.
1078 @param SlotId The slot id to be configured.
1079 @param DeviceSpeed The device's speed.
1080 @param ConfigDesc The pointer to the usb device configuration descriptor.
1081 @param Request USB device request to send.
1083 @retval EFI_SUCCESS Successfully set interface.
1089 IN USB_XHCI_INSTANCE
*Xhc
,
1091 IN UINT8 DeviceSpeed
,
1092 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
,
1093 IN EFI_USB_DEVICE_REQUEST
*Request
1097 Set interface through XHCI's Configure_Endpoint cmd.
1099 @param Xhc The XHCI Instance.
1100 @param SlotId The slot id to be configured.
1101 @param DeviceSpeed The device's speed.
1102 @param ConfigDesc The pointer to the usb device configuration descriptor.
1103 @param Request USB device request to send.
1105 @retval EFI_SUCCESS Successfully set interface.
1111 IN USB_XHCI_INSTANCE
*Xhc
,
1113 IN UINT8 DeviceSpeed
,
1114 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
,
1115 IN EFI_USB_DEVICE_REQUEST
*Request
1119 Find out the actual device address according to the requested device address from UsbBus.
1121 @param Xhc The XHCI Instance.
1122 @param BusDevAddr The requested device address by UsbBus upper driver.
1124 @return The actual device address assigned to the device.
1129 XhcBusDevAddrToSlotId (
1130 IN USB_XHCI_INSTANCE
*Xhc
,
1135 Assign and initialize the device slot for a new device.
1137 @param Xhc The XHCI Instance.
1138 @param ParentRouteChart The route string pointed to the parent device.
1139 @param ParentPort The port at which the device is located.
1140 @param RouteChart The route string pointed to the device.
1141 @param DeviceSpeed The device speed.
1143 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1148 XhcInitializeDeviceSlot (
1149 IN USB_XHCI_INSTANCE
*Xhc
,
1150 IN USB_DEV_ROUTE ParentRouteChart
,
1151 IN UINT16 ParentPort
,
1152 IN USB_DEV_ROUTE RouteChart
,
1153 IN UINT8 DeviceSpeed
1157 Assign and initialize the device slot for a new device.
1159 @param Xhc The XHCI Instance.
1160 @param ParentRouteChart The route string pointed to the parent device.
1161 @param ParentPort The port at which the device is located.
1162 @param RouteChart The route string pointed to the device.
1163 @param DeviceSpeed The device speed.
1165 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1170 XhcInitializeDeviceSlot64 (
1171 IN USB_XHCI_INSTANCE
*Xhc
,
1172 IN USB_DEV_ROUTE ParentRouteChart
,
1173 IN UINT16 ParentPort
,
1174 IN USB_DEV_ROUTE RouteChart
,
1175 IN UINT8 DeviceSpeed
1179 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1181 @param Xhc The XHCI Instance.
1182 @param SlotId The slot id to be evaluated.
1183 @param MaxPacketSize The max packet size supported by the device control transfer.
1185 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1190 XhcEvaluateContext (
1191 IN USB_XHCI_INSTANCE
*Xhc
,
1193 IN UINT32 MaxPacketSize
1198 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1200 @param Xhc The XHCI Instance.
1201 @param SlotId The slot id to be evaluated.
1202 @param MaxPacketSize The max packet size supported by the device control transfer.
1204 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1209 XhcEvaluateContext64 (
1210 IN USB_XHCI_INSTANCE
*Xhc
,
1212 IN UINT32 MaxPacketSize
1217 Disable the specified device slot.
1219 @param Xhc The XHCI Instance.
1220 @param SlotId The slot id to be disabled.
1222 @retval EFI_SUCCESS Successfully disable the device slot.
1228 IN USB_XHCI_INSTANCE
*Xhc
,
1234 Disable the specified device slot.
1236 @param Xhc The XHCI Instance.
1237 @param SlotId The slot id to be disabled.
1239 @retval EFI_SUCCESS Successfully disable the device slot.
1244 XhcDisableSlotCmd64 (
1245 IN USB_XHCI_INSTANCE
*Xhc
,
1251 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1253 @param Xhc The XHCI Instance.
1254 @param TrsRing The transfer ring to sync.
1256 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1262 IN USB_XHCI_INSTANCE
*Xhc
,
1263 TRANSFER_RING
*TrsRing
1267 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1269 @param Xhc The XHCI Instance.
1270 @param EvtRing The event ring to sync.
1272 @retval EFI_SUCCESS The event ring is synchronized successfully.
1278 IN USB_XHCI_INSTANCE
*Xhc
,
1283 Check if there is a new generated event.
1285 @param Xhc The XHCI Instance.
1286 @param EvtRing The event ring to check.
1287 @param NewEvtTrb The new event TRB found.
1289 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1290 @retval EFI_NOT_READY The event ring has no new event.
1296 IN USB_XHCI_INSTANCE
*Xhc
,
1297 IN EVENT_RING
*EvtRing
,
1298 OUT TRB_TEMPLATE
**NewEvtTrb
1302 Create XHCI transfer ring.
1304 @param Xhc The XHCI Instance.
1305 @param TrbNum The number of TRB in the ring.
1306 @param TransferRing The created transfer ring.
1310 CreateTransferRing (
1311 IN USB_XHCI_INSTANCE
*Xhc
,
1313 OUT TRANSFER_RING
*TransferRing
1317 Create XHCI event ring.
1319 @param Xhc The XHCI Instance.
1320 @param EventRing The created event ring.
1325 IN USB_XHCI_INSTANCE
*Xhc
,
1326 OUT EVENT_RING
*EventRing
1330 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1331 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1332 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1333 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1334 Stopped to the Running state.
1336 @param Xhc The XHCI Instance.
1337 @param Urb The urb which makes the endpoint halted.
1339 @retval EFI_SUCCESS The recovery is successful.
1340 @retval Others Failed to recovery halted endpoint.
1345 XhcRecoverHaltedEndpoint (
1346 IN USB_XHCI_INSTANCE
*Xhc
,
1351 System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer
1352 Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to
1353 the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running
1356 @param Xhc The XHCI Instance.
1357 @param Urb The urb which doesn't get completed in a specified timeout range.
1359 @retval EFI_SUCCESS The dequeuing of the TDs is successful.
1360 @retval Others Failed to stop the endpoint and dequeue the TDs.
1365 XhcDequeueTrbFromEndpoint (
1366 IN USB_XHCI_INSTANCE
*Xhc
,
1371 Stop endpoint through XHCI's Stop_Endpoint cmd.
1373 @param Xhc The XHCI Instance.
1374 @param SlotId The slot id to be configured.
1375 @param Dci The device context index of endpoint.
1376 @param PendingUrb The pending URB to check completion status when stopping the end point.
1378 @retval EFI_SUCCESS Stop endpoint successfully.
1379 @retval Others Failed to stop endpoint.
1385 IN USB_XHCI_INSTANCE
*Xhc
,
1388 IN URB
*PendingUrb OPTIONAL
1392 Reset endpoint through XHCI's Reset_Endpoint cmd.
1394 @param Xhc The XHCI Instance.
1395 @param SlotId The slot id to be configured.
1396 @param Dci The device context index of endpoint.
1398 @retval EFI_SUCCESS Reset endpoint successfully.
1399 @retval Others Failed to reset endpoint.
1405 IN USB_XHCI_INSTANCE
*Xhc
,
1411 Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.
1413 @param Xhc The XHCI Instance.
1414 @param SlotId The slot id to be configured.
1415 @param Dci The device context index of endpoint.
1416 @param Urb The dequeue pointer of the transfer ring specified
1417 by the urb to be updated.
1419 @retval EFI_SUCCESS Set transfer ring dequeue pointer succeeds.
1420 @retval Others Failed to set transfer ring dequeue pointer.
1425 XhcSetTrDequeuePointer (
1426 IN USB_XHCI_INSTANCE
*Xhc
,
1433 Create a new URB for a new transaction.
1435 @param Xhc The XHCI Instance
1436 @param DevAddr The device address
1437 @param EpAddr Endpoint addrress
1438 @param DevSpeed The device speed
1439 @param MaxPacket The max packet length of the endpoint
1440 @param Type The transaction type
1441 @param Request The standard USB request for control transfer
1442 @param Data The user data to transfer
1443 @param DataLen The length of data buffer
1444 @param Callback The function to call when data is transferred
1445 @param Context The context to the callback
1447 @return Created URB or NULL
1452 IN USB_XHCI_INSTANCE
*Xhc
,
1458 IN EFI_USB_DEVICE_REQUEST
*Request
,
1461 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1466 Free an allocated URB.
1468 @param Xhc The XHCI device.
1469 @param Urb The URB to free.
1474 IN USB_XHCI_INSTANCE
*Xhc
,
1479 Create a transfer TRB.
1481 @param Xhc The XHCI Instance
1482 @param Urb The urb used to construct the transfer TRB.
1484 @return Created TRB or NULL
1488 XhcCreateTransferTrb (
1489 IN USB_XHCI_INSTANCE
*Xhc
,