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MdeModulePkg/Xhci: Add 10ms delay before sending SendAddr cmd to dev
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1 /** @file
2 Private Header file for Usb Host Controller PEIM
3
4 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17 #ifndef _RECOVERY_XHC_H_
18 #define _RECOVERY_XHC_H_
19
20 #include <PiPei.h>
21
22 #include <Ppi/UsbController.h>
23 #include <Ppi/Usb2HostController.h>
24
25 #include <Library/DebugLib.h>
26 #include <Library/PeimEntryPoint.h>
27 #include <Library/PeiServicesLib.h>
28 #include <Library/BaseMemoryLib.h>
29 #include <Library/TimerLib.h>
30 #include <Library/IoLib.h>
31 #include <Library/MemoryAllocationLib.h>
32
33 typedef struct _PEI_XHC_DEV PEI_XHC_DEV;
34 typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
35
36 #include "UsbHcMem.h"
37 #include "XhciReg.h"
38 #include "XhciSched.h"
39
40 #define CMD_RING_TRB_NUMBER 0x100
41 #define TR_RING_TRB_NUMBER 0x100
42 #define ERST_NUMBER 0x01
43 #define EVENT_RING_TRB_NUMBER 0x200
44
45 #define XHC_1_MICROSECOND 1
46 #define XHC_1_MILLISECOND (1000 * XHC_1_MICROSECOND)
47 #define XHC_1_SECOND (1000 * XHC_1_MILLISECOND)
48
49 //
50 // XHC reset timeout experience values.
51 // The unit is millisecond, setting it as 1s.
52 //
53 #define XHC_RESET_TIMEOUT (1000)
54
55 //
56 // TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.
57 // The unit is microsecond, setting it as 10ms.
58 //
59 #define XHC_RESET_RECOVERY_DELAY (10 * 1000)
60
61 //
62 // Wait for root port state stable.
63 //
64 #define XHC_ROOT_PORT_STATE_STABLE (200 * XHC_1_MILLISECOND)
65
66 //
67 // XHC generic timeout experience values.
68 // The unit is millisecond, setting it as 10s.
69 //
70 #define XHC_GENERIC_TIMEOUT (10 * 1000)
71
72 #define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
73 #define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
74 #define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
75
76 #define XHC_REG_BIT_IS_SET(XHC, Offset, Bit) \
77 (XHC_BIT_IS_SET(XhcPeiReadOpReg ((XHC), (Offset)), (Bit)))
78
79 #define USB_DESC_TYPE_HUB 0x29
80 #define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a
81
82 //
83 // The RequestType in EFI_USB_DEVICE_REQUEST is composed of
84 // three fields: One bit direction, 2 bit type, and 5 bit
85 // target.
86 //
87 #define USB_REQUEST_TYPE(Dir, Type, Target) \
88 ((UINT8)((((Dir) == EfiUsbDataIn ? 0x01 : 0) << 7) | (Type) | (Target)))
89
90 struct _USB_DEV_CONTEXT {
91 //
92 // Whether this entry in UsbDevContext array is used or not.
93 //
94 BOOLEAN Enabled;
95 //
96 // The slot id assigned to the new device through XHCI's Enable_Slot cmd.
97 //
98 UINT8 SlotId;
99 //
100 // The route string presented an attached usb device.
101 //
102 USB_DEV_ROUTE RouteString;
103 //
104 // The route string of parent device if it exists. Otherwise it's zero.
105 //
106 USB_DEV_ROUTE ParentRouteString;
107 //
108 // The actual device address assigned by XHCI through Address_Device command.
109 //
110 UINT8 XhciDevAddr;
111 //
112 // The requested device address from UsbBus driver through Set_Address standard usb request.
113 // As XHCI spec replaces this request with Address_Device command, we have to record the
114 // requested device address and establish a mapping relationship with the actual device address.
115 // Then UsbBus driver just need to be aware of the requested device address to access usb device
116 // through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual
117 // device address and access the actual device.
118 //
119 UINT8 BusDevAddr;
120 //
121 // The pointer to the input device context.
122 //
123 VOID *InputContext;
124 //
125 // The pointer to the output device context.
126 //
127 VOID *OutputContext;
128 //
129 // The transfer queue for every endpoint.
130 //
131 VOID *EndpointTransferRing[31];
132 //
133 // The device descriptor which is stored to support XHCI's Evaluate_Context cmd.
134 //
135 EFI_USB_DEVICE_DESCRIPTOR DevDesc;
136 //
137 // As a usb device may include multiple configuration descriptors, we dynamically allocate an array
138 // to store them.
139 // Note that every configuration descriptor stored here includes those lower level descriptors,
140 // such as Interface descriptor, Endpoint descriptor, and so on.
141 // These information is used to support XHCI's Config_Endpoint cmd.
142 //
143 EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;
144 };
145
146 #define USB_XHC_DEV_SIGNATURE SIGNATURE_32 ('x', 'h', 'c', 'i')
147
148 struct _PEI_XHC_DEV {
149 UINTN Signature;
150 PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi;
151 EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
152 UINT32 UsbHostControllerBaseAddress;
153 USBHC_MEM_POOL *MemPool;
154
155 //
156 // XHCI configuration data
157 //
158 UINT8 CapLength; ///< Capability Register Length
159 XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1
160 XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2
161 XHC_HCCPARAMS HcCParams; ///< Capability Parameters
162 UINT32 DBOff; ///< Doorbell Offset
163 UINT32 RTSOff; ///< Runtime Register Space Offset
164 UINT32 PageSize;
165 UINT32 MaxScratchpadBufs;
166 UINT64 *ScratchBuf;
167 UINT64 *ScratchEntry;
168 UINT64 *DCBAA;
169 UINT32 MaxSlotsEn;
170 //
171 // Cmd Transfer Ring
172 //
173 TRANSFER_RING CmdRing;
174 //
175 // EventRing
176 //
177 EVENT_RING EventRing;
178
179 //
180 // Store device contexts managed by XHCI device
181 // The array supports up to 255 devices, entry 0 is reserved and should not be used.
182 //
183 USB_DEV_CONTEXT UsbDevContext[256];
184 };
185
186 #define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)
187
188 /**
189 Initialize the memory management pool for the host controller.
190
191 @return Pointer to the allocated memory pool or NULL if failed.
192
193 **/
194 USBHC_MEM_POOL *
195 UsbHcInitMemPool (
196 VOID
197 )
198 ;
199
200 /**
201 Release the memory management pool.
202
203 @param Pool The USB memory pool to free.
204
205 **/
206 VOID
207 UsbHcFreeMemPool (
208 IN USBHC_MEM_POOL *Pool
209 )
210 ;
211
212 /**
213 Allocate some memory from the host controller's memory pool
214 which can be used to communicate with host controller.
215
216 @param Pool The host controller's memory pool.
217 @param Size Size of the memory to allocate.
218
219 @return The allocated memory or NULL.
220
221 **/
222 VOID *
223 UsbHcAllocateMem (
224 IN USBHC_MEM_POOL *Pool,
225 IN UINTN Size
226 )
227 ;
228
229 /**
230 Free the allocated memory back to the memory pool.
231
232 @param Pool The memory pool of the host controller.
233 @param Mem The memory to free.
234 @param Size The size of the memory to free.
235
236 **/
237 VOID
238 UsbHcFreeMem (
239 IN USBHC_MEM_POOL *Pool,
240 IN VOID *Mem,
241 IN UINTN Size
242 )
243 ;
244
245 #endif