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1 /** @file
2 x64-specifc functionality for DxeLoad.
3
4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include "DxeIpl.h"
10 #include "X64/VirtualMemory.h"
11
12
13
14 /**
15 Transfers control to DxeCore.
16
17 This function performs a CPU architecture specific operations to execute
18 the entry point of DxeCore with the parameters of HobList.
19 It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
20
21 @param DxeCoreEntryPoint The entry point of DxeCore.
22 @param HobList The start of HobList passed to DxeCore.
23
24 **/
25 VOID
26 HandOffToDxeCore (
27 IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
28 IN EFI_PEI_HOB_POINTERS HobList
29 )
30 {
31 VOID *BaseOfStack;
32 VOID *TopOfStack;
33 EFI_STATUS Status;
34 UINTN PageTables;
35 UINT32 Index;
36 EFI_VECTOR_HANDOFF_INFO *VectorInfo;
37 EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
38
39 if (IsNullDetectionEnabled ()) {
40 ClearFirst4KPage (HobList.Raw);
41 }
42
43 //
44 // Get Vector Hand-off Info PPI and build Guided HOB
45 //
46 Status = PeiServicesLocatePpi (
47 &gEfiVectorHandoffInfoPpiGuid,
48 0,
49 NULL,
50 (VOID **)&VectorHandoffInfoPpi
51 );
52 if (Status == EFI_SUCCESS) {
53 DEBUG ((EFI_D_INFO, "Vector Hand-off Info PPI is gotten, GUIDed HOB is created!\n"));
54 VectorInfo = VectorHandoffInfoPpi->Info;
55 Index = 1;
56 while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {
57 VectorInfo ++;
58 Index ++;
59 }
60 BuildGuidDataHob (
61 &gEfiVectorHandoffInfoPpiGuid,
62 VectorHandoffInfoPpi->Info,
63 sizeof (EFI_VECTOR_HANDOFF_INFO) * Index
64 );
65 }
66
67 //
68 // Allocate 128KB for the Stack
69 //
70 BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
71 ASSERT (BaseOfStack != NULL);
72
73 //
74 // Compute the top of the stack we were allocated. Pre-allocate a UINTN
75 // for safety.
76 //
77 TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
78 TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
79
80 PageTables = 0;
81 if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
82 //
83 // Create page table and save PageMapLevel4 to CR3
84 //
85 PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE);
86 } else {
87 //
88 // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
89 // for the DxeIpl and the DxeCore are both X64.
90 //
91 ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);
92 ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
93 }
94
95 //
96 // End of PEI phase signal
97 //
98 Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);
99 ASSERT_EFI_ERROR (Status);
100
101 if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
102 AsmWriteCr3 (PageTables);
103 }
104
105 //
106 // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
107 //
108 UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);
109
110 //
111 // Transfer the control to the entry point of DxeCore.
112 //
113 SwitchStack (
114 (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
115 HobList.Raw,
116 NULL,
117 TopOfStack
118 );
119 }