MdeModulePkg/Include/Library/PciHostBridgeLib.h

   1 /** @file
   2   PCI Host Bridge Library consumed by PciHostBridgeDxe driver returning
   3   the platform specific information about the PCI Host Bridge.
   4
   5   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9 #ifndef __PCI_HOST_BRIDGE_LIB_H__
  10 #define __PCI_HOST_BRIDGE_LIB_H__
  11
  12 //
  13 // (Base > Limit) indicates an aperture is not available.
  14 //
  15 typedef struct {
  16   //
  17   // Base and Limit are the device address instead of host address when
  18   // Translation is not zero
  19   //
  20   UINT64 Base;
  21   UINT64 Limit;
  22   //
  23   // According to UEFI 2.7, Device Address = Host Address + Translation,
  24   // so Translation = Device Address - Host Address.
  25   // On platforms where Translation is not zero, the subtraction is probably to
  26   // be performed with UINT64 wrap-around semantics, for we may translate an
  27   // above-4G host address into a below-4G device address for legacy PCIe device
  28   // compatibility.
  29   //
  30   // NOTE: The alignment of Translation is required to be larger than any BAR
  31   // alignment in the same root bridge, so that the same alignment can be
  32   // applied to both device address and host address, which simplifies the
  33   // situation and makes the current resource allocation code in generic PCI
  34   // host bridge driver still work.
  35   //
  36   UINT64 Translation;
  37 } PCI_ROOT_BRIDGE_APERTURE;
  38
  39 typedef struct {
  40   UINT32                   Segment;               ///< Segment number.
  41   UINT64                   Supports;              ///< Supported attributes.
  42                                                   ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
  43                                                   ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
  44   UINT64                   Attributes;            ///< Initial attributes.
  45                                                   ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
  46                                                   ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
  47   BOOLEAN                  DmaAbove4G;            ///< DMA above 4GB memory.
  48                                                   ///< Set to TRUE when root bridge supports DMA above 4GB memory.
  49   BOOLEAN                  NoExtendedConfigSpace; ///< When FALSE, the root bridge supports
  50                                                   ///< Extended (4096-byte) Configuration Space.
  51                                                   ///< When TRUE, the root bridge supports
  52                                                   ///< 256-byte Configuration Space only.
  53   BOOLEAN                  ResourceAssigned;      ///< Resource assignment status of the root bridge.
  54                                                   ///< Set to TRUE if Bus/IO/MMIO resources for root bridge have been assigned.
  55   UINT64                   AllocationAttributes;  ///< Allocation attributes.
  56                                                   ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
  57                                                   ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
  58                                                   ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
  59   PCI_ROOT_BRIDGE_APERTURE Bus;                   ///< Bus aperture which can be used by the root bridge.
  60   PCI_ROOT_BRIDGE_APERTURE Io;                    ///< IO aperture which can be used by the root bridge.
  61   PCI_ROOT_BRIDGE_APERTURE Mem;                   ///< MMIO aperture below 4GB which can be used by the root bridge.
  62   PCI_ROOT_BRIDGE_APERTURE MemAbove4G;            ///< MMIO aperture above 4GB which can be used by the root bridge.
  63   PCI_ROOT_BRIDGE_APERTURE PMem;                  ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
  64   PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;           ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
  65   EFI_DEVICE_PATH_PROTOCOL *DevicePath;           ///< Device path.
  66 } PCI_ROOT_BRIDGE;
  67
  68 /**
  69   Return all the root bridge instances in an array.
  70
  71   @param Count  Return the count of root bridge instances.
  72
  73   @return All the root bridge instances in an array.
  74           The array should be passed into PciHostBridgeFreeRootBridges()
  75           when it's not used.
  76 **/
  77 PCI_ROOT_BRIDGE *
  78 EFIAPI
  79 PciHostBridgeGetRootBridges (
  80   UINTN *Count
  81   );
  82
  83 /**
  84   Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
  85
  86   @param Bridges The root bridge instances array.
  87   @param Count   The count of the array.
  88 **/
  89 VOID
  90 EFIAPI
  91 PciHostBridgeFreeRootBridges (
  92   PCI_ROOT_BRIDGE *Bridges,
  93   UINTN           Count
  94   );
  95
  96 /**
  97   Inform the platform that the resource conflict happens.
  98
  99   @param HostBridgeHandle Handle of the Host Bridge.
 100   @param Configuration    Pointer to PCI I/O and PCI memory resource descriptors.
 101                           The Configuration contains the resources for all the
 102                           root bridges. The resource for each root bridge is
 103                           terminated with END descriptor and an additional END
 104                           is appended indicating the end of the entire resources.
 105                           The resource descriptor field values follow the description
 106                           in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.SubmitResources().
 107 **/
 108 VOID
 109 EFIAPI
 110 PciHostBridgeResourceConflict (
 111   EFI_HANDLE           HostBridgeHandle,
 112   VOID                 *Configuration
 113   );
 114
 115 #endif