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1 /** @file
2 EFI IOMMU Protocol.
3
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9
10 #ifndef __IOMMU_H__
11 #define __IOMMU_H__
12
13 //
14 // IOMMU Protocol GUID value
15 //
16 #define EDKII_IOMMU_PROTOCOL_GUID \
17 { \
18 0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \
19 }
20
21 //
22 // Forward reference for pure ANSI compatability
23 //
24 typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;
25
26 //
27 // Revision The revision to which the IOMMU interface adheres.
28 // All future revisions must be backwards compatible.
29 // If a future version is not back wards compatible it is not the same GUID.
30 //
31 #define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000
32
33 //
34 // IOMMU Access for SetAttribute
35 //
36 // These types can be "ORed" together as needed.
37 // Any undefined bits are reserved and must be zero.
38 //
39 #define EDKII_IOMMU_ACCESS_READ 0x1
40 #define EDKII_IOMMU_ACCESS_WRITE 0x2
41
42 //
43 // IOMMU Operation for Map
44 //
45 typedef enum {
46 ///
47 /// A read operation from system memory by a bus master that is not capable of producing
48 /// PCI dual address cycles.
49 ///
50 EdkiiIoMmuOperationBusMasterRead,
51 ///
52 /// A write operation from system memory by a bus master that is not capable of producing
53 /// PCI dual address cycles.
54 ///
55 EdkiiIoMmuOperationBusMasterWrite,
56 ///
57 /// Provides both read and write access to system memory by both the processor and a bus
58 /// master that is not capable of producing PCI dual address cycles.
59 ///
60 EdkiiIoMmuOperationBusMasterCommonBuffer,
61 ///
62 /// A read operation from system memory by a bus master that is capable of producing PCI
63 /// dual address cycles.
64 ///
65 EdkiiIoMmuOperationBusMasterRead64,
66 ///
67 /// A write operation to system memory by a bus master that is capable of producing PCI
68 /// dual address cycles.
69 ///
70 EdkiiIoMmuOperationBusMasterWrite64,
71 ///
72 /// Provides both read and write access to system memory by both the processor and a bus
73 /// master that is capable of producing PCI dual address cycles.
74 ///
75 EdkiiIoMmuOperationBusMasterCommonBuffer64,
76 EdkiiIoMmuOperationMaximum
77 } EDKII_IOMMU_OPERATION;
78
79 //
80 // IOMMU attribute for AllocateBuffer
81 // Any undefined bits are reserved and must be zero.
82 //
83 #define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
84 #define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED 0x0800
85 #define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
86
87 #define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE | EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED | EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
88
89 #define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
90
91 /**
92 Set IOMMU attribute for a system memory.
93
94 If the IOMMU protocol exists, the system memory cannot be used
95 for DMA by default.
96
97 When a device requests a DMA access for a system memory,
98 the device driver need use SetAttribute() to update the IOMMU
99 attribute to request DMA access (read and/or write).
100
101 The DeviceHandle is used to identify which device submits the request.
102 The IOMMU implementation need translate the device path to an IOMMU device ID,
103 and set IOMMU hardware register accordingly.
104 1) DeviceHandle can be a standard PCI device.
105 The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.
106 The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.
107 The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ|EDKII_IOMMU_ACCESS_WRITE.
108 After the memory is used, the memory need set 0 to keep it being protected.
109 2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).
110 The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.
111
112 @param[in] This The protocol instance pointer.
113 @param[in] DeviceHandle The device who initiates the DMA access request.
114 @param[in] Mapping The mapping value returned from Map().
115 @param[in] IoMmuAccess The IOMMU access.
116
117 @retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.
118 @retval EFI_INVALID_PARAMETER DeviceHandle is an invalid handle.
119 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
120 @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.
121 @retval EFI_UNSUPPORTED DeviceHandle is unknown by the IOMMU.
122 @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.
123 @retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.
124 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.
125 @retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.
126
127 **/
128 typedef
129 EFI_STATUS
130 (EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(
131 IN EDKII_IOMMU_PROTOCOL *This,
132 IN EFI_HANDLE DeviceHandle,
133 IN VOID *Mapping,
134 IN UINT64 IoMmuAccess
135 );
136
137 /**
138 Provides the controller-specific addresses required to access system memory from a
139 DMA bus master.
140
141 @param This The protocol instance pointer.
142 @param Operation Indicates if the bus master is going to read or write to system memory.
143 @param HostAddress The system memory address to map to the PCI controller.
144 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
145 that were mapped.
146 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
147 access the hosts HostAddress.
148 @param Mapping A resulting value to pass to Unmap().
149
150 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
151 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
152 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
153 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
154 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
155
156 **/
157 typedef
158 EFI_STATUS
159 (EFIAPI *EDKII_IOMMU_MAP)(
160 IN EDKII_IOMMU_PROTOCOL *This,
161 IN EDKII_IOMMU_OPERATION Operation,
162 IN VOID *HostAddress,
163 IN OUT UINTN *NumberOfBytes,
164 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
165 OUT VOID **Mapping
166 );
167
168 /**
169 Completes the Map() operation and releases any corresponding resources.
170
171 @param This The protocol instance pointer.
172 @param Mapping The mapping value returned from Map().
173
174 @retval EFI_SUCCESS The range was unmapped.
175 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
176 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
177 **/
178 typedef
179 EFI_STATUS
180 (EFIAPI *EDKII_IOMMU_UNMAP)(
181 IN EDKII_IOMMU_PROTOCOL *This,
182 IN VOID *Mapping
183 );
184
185 /**
186 Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
187 OperationBusMasterCommonBuffer64 mapping.
188
189 @param This The protocol instance pointer.
190 @param Type This parameter is not used and must be ignored.
191 @param MemoryType The type of memory to allocate, EfiBootServicesData or
192 EfiRuntimeServicesData.
193 @param Pages The number of pages to allocate.
194 @param HostAddress A pointer to store the base system memory address of the
195 allocated range.
196 @param Attributes The requested bit mask of attributes for the allocated range.
197
198 @retval EFI_SUCCESS The requested memory pages were allocated.
199 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
200 MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.
201 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
202 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
203
204 **/
205 typedef
206 EFI_STATUS
207 (EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(
208 IN EDKII_IOMMU_PROTOCOL *This,
209 IN EFI_ALLOCATE_TYPE Type,
210 IN EFI_MEMORY_TYPE MemoryType,
211 IN UINTN Pages,
212 IN OUT VOID **HostAddress,
213 IN UINT64 Attributes
214 );
215
216 /**
217 Frees memory that was allocated with AllocateBuffer().
218
219 @param This The protocol instance pointer.
220 @param Pages The number of pages to free.
221 @param HostAddress The base system memory address of the allocated range.
222
223 @retval EFI_SUCCESS The requested memory pages were freed.
224 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
225 was not allocated with AllocateBuffer().
226
227 **/
228 typedef
229 EFI_STATUS
230 (EFIAPI *EDKII_IOMMU_FREE_BUFFER)(
231 IN EDKII_IOMMU_PROTOCOL *This,
232 IN UINTN Pages,
233 IN VOID *HostAddress
234 );
235
236 ///
237 /// IOMMU Protocol structure.
238 ///
239 struct _EDKII_IOMMU_PROTOCOL {
240 UINT64 Revision;
241 EDKII_IOMMU_SET_ATTRIBUTE SetAttribute;
242 EDKII_IOMMU_MAP Map;
243 EDKII_IOMMU_UNMAP Unmap;
244 EDKII_IOMMU_ALLOCATE_BUFFER AllocateBuffer;
245 EDKII_IOMMU_FREE_BUFFER FreeBuffer;
246 };
247
248 ///
249 /// IOMMU Protocol GUID variable.
250 ///
251 extern EFI_GUID gEdkiiIoMmuProtocolGuid;
252
253 #endif