MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c

   1 /** @file
   2   Set a IDT entry for debug purpose
   3
   4   Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
   5
   6 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
   7
   8 This program and the accompanying materials
   9 are licensed and made available under the terms and conditions of the BSD License
  10 which accompanies this distribution.  The full text of the license may be found at
  11 http://opensource.org/licenses/bsd-license.php
  12
  13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  15
  16 **/
  17 #include "ScriptExecute.h"
  18 //
  19 // INTERRUPT_GATE_DESCRIPTOR and SetIdtEntry () are used to setup IDT to do debug
  20 //
  21
  22 #pragma pack(1)
  23
  24 typedef struct {
  25   UINT16    Offset15To0;
  26   UINT16    SegmentSelector;
  27   UINT16    Attributes;
  28   UINT16    Offset31To16;
  29   UINT32    Offset63To32;
  30   UINT32    Reserved;
  31 } INTERRUPT_GATE_DESCRIPTOR;
  32
  33 #define INTERRUPT_GATE_ATTRIBUTE   0x8e00
  34
  35 #pragma pack()
  36
  37 #define IA32_PG_P                   BIT0
  38 #define IA32_PG_RW                  BIT1
  39 #define IA32_PG_PS                  BIT7
  40
  41 UINT64                             mPhyMask;
  42 BOOLEAN                            mPage1GSupport;
  43 VOID                               *mOriginalHandler;
  44 UINTN                              mS3NvsPageTableAddress;
  45
  46 VOID
  47 EFIAPI
  48 PageFaultHandlerHook (
  49   VOID
  50   );
  51
  52 VOID
  53 HookPageFaultHandler (
  54   IN INTERRUPT_GATE_DESCRIPTOR                     *IdtEntry
  55   )
  56 {
  57   UINT32         RegEax;
  58   UINT32         RegEdx;
  59
  60   AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
  61   mPhyMask = LShiftU64 (1, (UINT8)RegEax) - 1;
  62   mPhyMask &= (1ull << 48) - SIZE_4KB;
  63
  64   mPage1GSupport = FALSE;
  65   if (PcdGetBool(PcdUse1GPageTable)) {
  66     AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
  67     if (RegEax >= 0x80000001) {
  68       AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
  69       if ((RegEdx & BIT26) != 0) {
  70         mPage1GSupport = TRUE;
  71       }
  72     }
  73   }
  74
  75   //
  76   // Set Page Fault entry to catch >4G access
  77   //
  78   mOriginalHandler = (VOID *)(UINTN)(LShiftU64 (IdtEntry->Offset63To32, 32) + IdtEntry->Offset15To0 + (IdtEntry->Offset31To16 << 16));
  79   IdtEntry->Offset15To0     = (UINT16)((UINTN)PageFaultHandlerHook);
  80   IdtEntry->SegmentSelector = (UINT16)AsmReadCs ();
  81   IdtEntry->Attributes      = (UINT16)INTERRUPT_GATE_ATTRIBUTE;
  82   IdtEntry->Offset31To16    = (UINT16)((UINTN)PageFaultHandlerHook >> 16);
  83   IdtEntry->Offset63To32    = (UINT32)((UINTN)PageFaultHandlerHook >> 32);
  84   IdtEntry->Reserved        = 0;
  85
  86   if (mPage1GSupport) {
  87     mS3NvsPageTableAddress = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(2);
  88   }else {
  89     mS3NvsPageTableAddress = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(6);
  90   }
  91 }
  92
  93 /**
  94   Set a IDT entry for interrupt vector 3 for debug purpose.
  95
  96   @param  AcpiS3Context  a pointer to a structure of ACPI_S3_CONTEXT
  97
  98 **/
  99 VOID
 100 SetIdtEntry (
 101   IN ACPI_S3_CONTEXT     *AcpiS3Context
 102   )
 103 {
 104   INTERRUPT_GATE_DESCRIPTOR                     *IdtEntry;
 105   IA32_DESCRIPTOR                               *IdtDescriptor;
 106   UINTN                                         S3DebugBuffer;
 107
 108   //
 109   // Restore IDT for debug
 110   //
 111   IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
 112   AsmWriteIdtr (IdtDescriptor);
 113
 114   //
 115   // Setup the default CPU exception handlers
 116   //
 117   SetupCpuExceptionHandlers ();
 118
 119   //
 120   // Update IDT entry INT3
 121   //
 122   IdtEntry = (INTERRUPT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (3 * sizeof (INTERRUPT_GATE_DESCRIPTOR)));
 123   S3DebugBuffer = (UINTN) (AcpiS3Context->S3DebugBufferAddress);
 124
 125   IdtEntry->Offset15To0     = (UINT16)S3DebugBuffer;
 126   IdtEntry->SegmentSelector = (UINT16)AsmReadCs ();
 127   IdtEntry->Attributes      = (UINT16)INTERRUPT_GATE_ATTRIBUTE;
 128   IdtEntry->Offset31To16    = (UINT16)(S3DebugBuffer >> 16);
 129   IdtEntry->Offset63To32    = (UINT32)(S3DebugBuffer >> 32);
 130   IdtEntry->Reserved        = 0;
 131
 132   IdtEntry = (INTERRUPT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (14 * sizeof (INTERRUPT_GATE_DESCRIPTOR)));
 133   HookPageFaultHandler (IdtEntry);
 134
 135   AsmWriteIdtr (IdtDescriptor);
 136 }
 137
 138 UINTN
 139 GetNewPage (
 140   IN UINTN  PageNum
 141   )
 142 {
 143   UINTN  NewPage;
 144   NewPage = mS3NvsPageTableAddress;
 145   ZeroMem ((VOID *)NewPage, EFI_PAGES_TO_SIZE(PageNum));
 146   mS3NvsPageTableAddress += EFI_PAGES_TO_SIZE(PageNum);
 147   return NewPage;
 148 }
 149
 150 BOOLEAN
 151 EFIAPI
 152 PageFaultHandler (
 153   VOID
 154   )
 155 {
 156   UINT64         *PageTable;
 157   UINT64         PFAddress;
 158   UINTN          PTIndex;
 159
 160   PFAddress = AsmReadCr2 ();
 161   DEBUG ((EFI_D_ERROR, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));
 162
 163   if (PFAddress >= mPhyMask + SIZE_4KB) {
 164     return FALSE;
 165   }
 166   PFAddress &= mPhyMask;
 167
 168   PageTable = (UINT64*)(UINTN)(AsmReadCr3 () & mPhyMask);
 169
 170   PTIndex = BitFieldRead64 (PFAddress, 39, 47);
 171   // PML4E
 172   if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
 173     PageTable[PTIndex] = GetNewPage (1) | IA32_PG_P | IA32_PG_RW;
 174   }
 175   PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);
 176   PTIndex = BitFieldRead64 (PFAddress, 30, 38);
 177   // PDPTE
 178   if (mPage1GSupport) {
 179     PageTable[PTIndex] = PFAddress | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
 180   } else {
 181     if ((PageTable[PTIndex] & IA32_PG_P) == 0) {
 182       PageTable[PTIndex] = GetNewPage (1) | IA32_PG_P | IA32_PG_RW;
 183     }
 184     PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);
 185     PTIndex = BitFieldRead64 (PFAddress, 21, 29);
 186     // PD
 187     PageTable[PTIndex] = PFAddress | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;
 188   }
 189
 190   return TRUE;
 191 }