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1 /** @file
2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.
3
4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7 **/
8
9 #ifndef _ACPI_5_0_H_
10 #define _ACPI_5_0_H_
11
12 #include <IndustryStandard/Acpi40.h>
13
14 //
15 // Define for Desriptor
16 //
17 #define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A
18 #define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C
19 #define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E
20
21 #define ACPI_FIXED_DMA_DESCRIPTOR 0x55
22 #define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C
23 #define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E
24
25 #pragma pack(1)
26
27 ///
28 /// Generic DMA Descriptor.
29 ///
30 typedef PACKED struct {
31 ACPI_SMALL_RESOURCE_HEADER Header;
32 UINT16 DmaRequestLine;
33 UINT16 DmaChannel;
34 UINT8 DmaTransferWidth;
35 } EFI_ACPI_FIXED_DMA_DESCRIPTOR;
36
37 ///
38 /// GPIO Connection Descriptor
39 ///
40 typedef PACKED struct {
41 ACPI_LARGE_RESOURCE_HEADER Header;
42 UINT8 RevisionId;
43 UINT8 ConnectionType;
44 UINT16 GeneralFlags;
45 UINT16 InterruptFlags;
46 UINT8 PinConfiguration;
47 UINT16 OutputDriveStrength;
48 UINT16 DebounceTimeout;
49 UINT16 PinTableOffset;
50 UINT8 ResourceSourceIndex;
51 UINT16 ResourceSourceNameOffset;
52 UINT16 VendorDataOffset;
53 UINT16 VendorDataLength;
54 } EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;
55
56 #define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0
57 #define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1
58
59 ///
60 /// Serial Bus Resource Descriptor (Generic)
61 ///
62 typedef PACKED struct {
63 ACPI_LARGE_RESOURCE_HEADER Header;
64 UINT8 RevisionId;
65 UINT8 ResourceSourceIndex;
66 UINT8 SerialBusType;
67 UINT8 GeneralFlags;
68 UINT16 TypeSpecificFlags;
69 UINT8 TypeSpecificRevisionId;
70 UINT16 TypeDataLength;
71 // Type specific data
72 } EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;
73
74 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1
75 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2
76 #define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3
77
78 ///
79 /// Serial Bus Resource Descriptor (I2C)
80 ///
81 typedef PACKED struct {
82 ACPI_LARGE_RESOURCE_HEADER Header;
83 UINT8 RevisionId;
84 UINT8 ResourceSourceIndex;
85 UINT8 SerialBusType;
86 UINT8 GeneralFlags;
87 UINT16 TypeSpecificFlags;
88 UINT8 TypeSpecificRevisionId;
89 UINT16 TypeDataLength;
90 UINT32 ConnectionSpeed;
91 UINT16 SlaveAddress;
92 } EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;
93
94 ///
95 /// Serial Bus Resource Descriptor (SPI)
96 ///
97 typedef PACKED struct {
98 ACPI_LARGE_RESOURCE_HEADER Header;
99 UINT8 RevisionId;
100 UINT8 ResourceSourceIndex;
101 UINT8 SerialBusType;
102 UINT8 GeneralFlags;
103 UINT16 TypeSpecificFlags;
104 UINT8 TypeSpecificRevisionId;
105 UINT16 TypeDataLength;
106 UINT32 ConnectionSpeed;
107 UINT8 DataBitLength;
108 UINT8 Phase;
109 UINT8 Polarity;
110 UINT16 DeviceSelection;
111 } EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;
112
113 ///
114 /// Serial Bus Resource Descriptor (UART)
115 ///
116 typedef PACKED struct {
117 ACPI_LARGE_RESOURCE_HEADER Header;
118 UINT8 RevisionId;
119 UINT8 ResourceSourceIndex;
120 UINT8 SerialBusType;
121 UINT8 GeneralFlags;
122 UINT16 TypeSpecificFlags;
123 UINT8 TypeSpecificRevisionId;
124 UINT16 TypeDataLength;
125 UINT32 DefaultBaudRate;
126 UINT16 RxFIFO;
127 UINT16 TxFIFO;
128 UINT8 Parity;
129 UINT8 SerialLinesEnabled;
130 } EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;
131
132 #pragma pack()
133
134 //
135 // Ensure proper structure formats
136 //
137 #pragma pack(1)
138
139 ///
140 /// ACPI 5.0 Generic Address Space definition
141 ///
142 typedef struct {
143 UINT8 AddressSpaceId;
144 UINT8 RegisterBitWidth;
145 UINT8 RegisterBitOffset;
146 UINT8 AccessSize;
147 UINT64 Address;
148 } EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;
149
150 //
151 // Generic Address Space Address IDs
152 //
153 #define EFI_ACPI_5_0_SYSTEM_MEMORY 0
154 #define EFI_ACPI_5_0_SYSTEM_IO 1
155 #define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2
156 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3
157 #define EFI_ACPI_5_0_SMBUS 4
158 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A
159 #define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
160
161 //
162 // Generic Address Space Access Sizes
163 //
164 #define EFI_ACPI_5_0_UNDEFINED 0
165 #define EFI_ACPI_5_0_BYTE 1
166 #define EFI_ACPI_5_0_WORD 2
167 #define EFI_ACPI_5_0_DWORD 3
168 #define EFI_ACPI_5_0_QWORD 4
169
170 //
171 // ACPI 5.0 table structures
172 //
173
174 ///
175 /// Root System Description Pointer Structure
176 ///
177 typedef struct {
178 UINT64 Signature;
179 UINT8 Checksum;
180 UINT8 OemId[6];
181 UINT8 Revision;
182 UINT32 RsdtAddress;
183 UINT32 Length;
184 UINT64 XsdtAddress;
185 UINT8 ExtendedChecksum;
186 UINT8 Reserved[3];
187 } EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
188
189 ///
190 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.)
191 ///
192 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2
193
194 ///
195 /// Common table header, this prefaces all ACPI tables, including FACS, but
196 /// excluding the RSD PTR structure
197 ///
198 typedef struct {
199 UINT32 Signature;
200 UINT32 Length;
201 } EFI_ACPI_5_0_COMMON_HEADER;
202
203 //
204 // Root System Description Table
205 // No definition needed as it is a common description table header, the same with
206 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
207 //
208
209 ///
210 /// RSDT Revision (as defined in ACPI 5.0 spec.)
211 ///
212 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
213
214 //
215 // Extended System Description Table
216 // No definition needed as it is a common description table header, the same with
217 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
218 //
219
220 ///
221 /// XSDT Revision (as defined in ACPI 5.0 spec.)
222 ///
223 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
224
225 ///
226 /// Fixed ACPI Description Table Structure (FADT)
227 ///
228 typedef struct {
229 EFI_ACPI_DESCRIPTION_HEADER Header;
230 UINT32 FirmwareCtrl;
231 UINT32 Dsdt;
232 UINT8 Reserved0;
233 UINT8 PreferredPmProfile;
234 UINT16 SciInt;
235 UINT32 SmiCmd;
236 UINT8 AcpiEnable;
237 UINT8 AcpiDisable;
238 UINT8 S4BiosReq;
239 UINT8 PstateCnt;
240 UINT32 Pm1aEvtBlk;
241 UINT32 Pm1bEvtBlk;
242 UINT32 Pm1aCntBlk;
243 UINT32 Pm1bCntBlk;
244 UINT32 Pm2CntBlk;
245 UINT32 PmTmrBlk;
246 UINT32 Gpe0Blk;
247 UINT32 Gpe1Blk;
248 UINT8 Pm1EvtLen;
249 UINT8 Pm1CntLen;
250 UINT8 Pm2CntLen;
251 UINT8 PmTmrLen;
252 UINT8 Gpe0BlkLen;
253 UINT8 Gpe1BlkLen;
254 UINT8 Gpe1Base;
255 UINT8 CstCnt;
256 UINT16 PLvl2Lat;
257 UINT16 PLvl3Lat;
258 UINT16 FlushSize;
259 UINT16 FlushStride;
260 UINT8 DutyOffset;
261 UINT8 DutyWidth;
262 UINT8 DayAlrm;
263 UINT8 MonAlrm;
264 UINT8 Century;
265 UINT16 IaPcBootArch;
266 UINT8 Reserved1;
267 UINT32 Flags;
268 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
269 UINT8 ResetValue;
270 UINT8 Reserved2[3];
271 UINT64 XFirmwareCtrl;
272 UINT64 XDsdt;
273 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
274 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
275 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
276 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;
283 } EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;
284
285 ///
286 /// FADT Version (as defined in ACPI 5.0 spec.)
287 ///
288 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05
289
290 //
291 // Fixed ACPI Description Table Preferred Power Management Profile
292 //
293 #define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0
294 #define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1
295 #define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2
296 #define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3
297 #define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4
298 #define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5
299 #define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6
300 #define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7
301 #define EFI_ACPI_5_0_PM_PROFILE_TABLET 8
302
303 //
304 // Fixed ACPI Description Table Boot Architecture Flags
305 // All other bits are reserved and must be set to 0.
306 //
307 #define EFI_ACPI_5_0_LEGACY_DEVICES BIT0
308 #define EFI_ACPI_5_0_8042 BIT1
309 #define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2
310 #define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3
311 #define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4
312 #define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5
313
314 //
315 // Fixed ACPI Description Table Fixed Feature Flags
316 // All other bits are reserved and must be set to 0.
317 //
318 #define EFI_ACPI_5_0_WBINVD BIT0
319 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
320 #define EFI_ACPI_5_0_PROC_C1 BIT2
321 #define EFI_ACPI_5_0_P_LVL2_UP BIT3
322 #define EFI_ACPI_5_0_PWR_BUTTON BIT4
323 #define EFI_ACPI_5_0_SLP_BUTTON BIT5
324 #define EFI_ACPI_5_0_FIX_RTC BIT6
325 #define EFI_ACPI_5_0_RTC_S4 BIT7
326 #define EFI_ACPI_5_0_TMR_VAL_EXT BIT8
327 #define EFI_ACPI_5_0_DCK_CAP BIT9
328 #define EFI_ACPI_5_0_RESET_REG_SUP BIT10
329 #define EFI_ACPI_5_0_SEALED_CASE BIT11
330 #define EFI_ACPI_5_0_HEADLESS BIT12
331 #define EFI_ACPI_5_0_CPU_SW_SLP BIT13
332 #define EFI_ACPI_5_0_PCI_EXP_WAK BIT14
333 #define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15
334 #define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16
335 #define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17
336 #define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18
337 #define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
338 #define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20
339 #define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21
340
341 ///
342 /// Firmware ACPI Control Structure
343 ///
344 typedef struct {
345 UINT32 Signature;
346 UINT32 Length;
347 UINT32 HardwareSignature;
348 UINT32 FirmwareWakingVector;
349 UINT32 GlobalLock;
350 UINT32 Flags;
351 UINT64 XFirmwareWakingVector;
352 UINT8 Version;
353 UINT8 Reserved0[3];
354 UINT32 OspmFlags;
355 UINT8 Reserved1[24];
356 } EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
357
358 ///
359 /// FACS Version (as defined in ACPI 5.0 spec.)
360 ///
361 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02
362
363 ///
364 /// Firmware Control Structure Feature Flags
365 /// All other bits are reserved and must be set to 0.
366 ///
367 #define EFI_ACPI_5_0_S4BIOS_F BIT0
368 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
369
370 ///
371 /// OSPM Enabled Firmware Control Structure Flags
372 /// All other bits are reserved and must be set to 0.
373 ///
374 #define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0
375
376 //
377 // Differentiated System Description Table,
378 // Secondary System Description Table
379 // and Persistent System Description Table,
380 // no definition needed as they are common description table header, the same with
381 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
382 //
383 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
384 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
385
386 ///
387 /// Multiple APIC Description Table header definition. The rest of the table
388 /// must be defined in a platform specific manner.
389 ///
390 typedef struct {
391 EFI_ACPI_DESCRIPTION_HEADER Header;
392 UINT32 LocalApicAddress;
393 UINT32 Flags;
394 } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
395
396 ///
397 /// MADT Revision (as defined in ACPI 5.0 spec.)
398 ///
399 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
400
401 ///
402 /// Multiple APIC Flags
403 /// All other bits are reserved and must be set to 0.
404 ///
405 #define EFI_ACPI_5_0_PCAT_COMPAT BIT0
406
407 //
408 // Multiple APIC Description Table APIC structure types
409 // All other values between 0x0D and 0x7F are reserved and
410 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
411 //
412 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00
413 #define EFI_ACPI_5_0_IO_APIC 0x01
414 #define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02
415 #define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
416 #define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04
417 #define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
418 #define EFI_ACPI_5_0_IO_SAPIC 0x06
419 #define EFI_ACPI_5_0_LOCAL_SAPIC 0x07
420 #define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08
421 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09
422 #define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A
423 #define EFI_ACPI_5_0_GIC 0x0B
424 #define EFI_ACPI_5_0_GICD 0x0C
425
426 //
427 // APIC Structure Definitions
428 //
429
430 ///
431 /// Processor Local APIC Structure Definition
432 ///
433 typedef struct {
434 UINT8 Type;
435 UINT8 Length;
436 UINT8 AcpiProcessorId;
437 UINT8 ApicId;
438 UINT32 Flags;
439 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
440
441 ///
442 /// Local APIC Flags. All other bits are reserved and must be 0.
443 ///
444 #define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0
445
446 ///
447 /// IO APIC Structure
448 ///
449 typedef struct {
450 UINT8 Type;
451 UINT8 Length;
452 UINT8 IoApicId;
453 UINT8 Reserved;
454 UINT32 IoApicAddress;
455 UINT32 GlobalSystemInterruptBase;
456 } EFI_ACPI_5_0_IO_APIC_STRUCTURE;
457
458 ///
459 /// Interrupt Source Override Structure
460 ///
461 typedef struct {
462 UINT8 Type;
463 UINT8 Length;
464 UINT8 Bus;
465 UINT8 Source;
466 UINT32 GlobalSystemInterrupt;
467 UINT16 Flags;
468 } EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
469
470 ///
471 /// Platform Interrupt Sources Structure Definition
472 ///
473 typedef struct {
474 UINT8 Type;
475 UINT8 Length;
476 UINT16 Flags;
477 UINT8 InterruptType;
478 UINT8 ProcessorId;
479 UINT8 ProcessorEid;
480 UINT8 IoSapicVector;
481 UINT32 GlobalSystemInterrupt;
482 UINT32 PlatformInterruptSourceFlags;
483 UINT8 CpeiProcessorOverride;
484 UINT8 Reserved[31];
485 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
486
487 //
488 // MPS INTI flags.
489 // All other bits are reserved and must be set to 0.
490 //
491 #define EFI_ACPI_5_0_POLARITY (3 << 0)
492 #define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)
493
494 ///
495 /// Non-Maskable Interrupt Source Structure
496 ///
497 typedef struct {
498 UINT8 Type;
499 UINT8 Length;
500 UINT16 Flags;
501 UINT32 GlobalSystemInterrupt;
502 } EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
503
504 ///
505 /// Local APIC NMI Structure
506 ///
507 typedef struct {
508 UINT8 Type;
509 UINT8 Length;
510 UINT8 AcpiProcessorId;
511 UINT16 Flags;
512 UINT8 LocalApicLint;
513 } EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;
514
515 ///
516 /// Local APIC Address Override Structure
517 ///
518 typedef struct {
519 UINT8 Type;
520 UINT8 Length;
521 UINT16 Reserved;
522 UINT64 LocalApicAddress;
523 } EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
524
525 ///
526 /// IO SAPIC Structure
527 ///
528 typedef struct {
529 UINT8 Type;
530 UINT8 Length;
531 UINT8 IoApicId;
532 UINT8 Reserved;
533 UINT32 GlobalSystemInterruptBase;
534 UINT64 IoSapicAddress;
535 } EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;
536
537 ///
538 /// Local SAPIC Structure
539 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
540 ///
541 typedef struct {
542 UINT8 Type;
543 UINT8 Length;
544 UINT8 AcpiProcessorId;
545 UINT8 LocalSapicId;
546 UINT8 LocalSapicEid;
547 UINT8 Reserved[3];
548 UINT32 Flags;
549 UINT32 ACPIProcessorUIDValue;
550 } EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
551
552 ///
553 /// Platform Interrupt Sources Structure
554 ///
555 typedef struct {
556 UINT8 Type;
557 UINT8 Length;
558 UINT16 Flags;
559 UINT8 InterruptType;
560 UINT8 ProcessorId;
561 UINT8 ProcessorEid;
562 UINT8 IoSapicVector;
563 UINT32 GlobalSystemInterrupt;
564 UINT32 PlatformInterruptSourceFlags;
565 } EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
566
567 ///
568 /// Platform Interrupt Source Flags.
569 /// All other bits are reserved and must be set to 0.
570 ///
571 #define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0
572
573 ///
574 /// Processor Local x2APIC Structure Definition
575 ///
576 typedef struct {
577 UINT8 Type;
578 UINT8 Length;
579 UINT8 Reserved[2];
580 UINT32 X2ApicId;
581 UINT32 Flags;
582 UINT32 AcpiProcessorUid;
583 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
584
585 ///
586 /// Local x2APIC NMI Structure
587 ///
588 typedef struct {
589 UINT8 Type;
590 UINT8 Length;
591 UINT16 Flags;
592 UINT32 AcpiProcessorUid;
593 UINT8 LocalX2ApicLint;
594 UINT8 Reserved[3];
595 } EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;
596
597 ///
598 /// GIC Structure
599 ///
600 typedef struct {
601 UINT8 Type;
602 UINT8 Length;
603 UINT16 Reserved;
604 UINT32 GicId;
605 UINT32 AcpiProcessorUid;
606 UINT32 Flags;
607 UINT32 ParkingProtocolVersion;
608 UINT32 PerformanceInterruptGsiv;
609 UINT64 ParkedAddress;
610 UINT64 PhysicalBaseAddress;
611 } EFI_ACPI_5_0_GIC_STRUCTURE;
612
613 ///
614 /// GIC Flags. All other bits are reserved and must be 0.
615 ///
616 #define EFI_ACPI_5_0_GIC_ENABLED BIT0
617 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
618
619 ///
620 /// GIC Distributor Structure
621 ///
622 typedef struct {
623 UINT8 Type;
624 UINT8 Length;
625 UINT16 Reserved1;
626 UINT32 GicId;
627 UINT64 PhysicalBaseAddress;
628 UINT32 SystemVectorBase;
629 UINT32 Reserved2;
630 } EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;
631
632 ///
633 /// Smart Battery Description Table (SBST)
634 ///
635 typedef struct {
636 EFI_ACPI_DESCRIPTION_HEADER Header;
637 UINT32 WarningEnergyLevel;
638 UINT32 LowEnergyLevel;
639 UINT32 CriticalEnergyLevel;
640 } EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;
641
642 ///
643 /// SBST Version (as defined in ACPI 5.0 spec.)
644 ///
645 #define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
646
647 ///
648 /// Embedded Controller Boot Resources Table (ECDT)
649 /// The table is followed by a null terminated ASCII string that contains
650 /// a fully qualified reference to the name space object.
651 ///
652 typedef struct {
653 EFI_ACPI_DESCRIPTION_HEADER Header;
654 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;
655 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;
656 UINT32 Uid;
657 UINT8 GpeBit;
658 } EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
659
660 ///
661 /// ECDT Version (as defined in ACPI 5.0 spec.)
662 ///
663 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
664
665 ///
666 /// System Resource Affinity Table (SRAT). The rest of the table
667 /// must be defined in a platform specific manner.
668 ///
669 typedef struct {
670 EFI_ACPI_DESCRIPTION_HEADER Header;
671 UINT32 Reserved1; ///< Must be set to 1
672 UINT64 Reserved2;
673 } EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
674
675 ///
676 /// SRAT Version (as defined in ACPI 5.0 spec.)
677 ///
678 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03
679
680 //
681 // SRAT structure types.
682 // All other values between 0x03 an 0xFF are reserved and
683 // will be ignored by OSPM.
684 //
685 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
686 #define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01
687 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02
688
689 ///
690 /// Processor Local APIC/SAPIC Affinity Structure Definition
691 ///
692 typedef struct {
693 UINT8 Type;
694 UINT8 Length;
695 UINT8 ProximityDomain7To0;
696 UINT8 ApicId;
697 UINT32 Flags;
698 UINT8 LocalSapicEid;
699 UINT8 ProximityDomain31To8[3];
700 UINT32 ClockDomain;
701 } EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
702
703 ///
704 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
705 ///
706 #define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
707
708 ///
709 /// Memory Affinity Structure Definition
710 ///
711 typedef struct {
712 UINT8 Type;
713 UINT8 Length;
714 UINT32 ProximityDomain;
715 UINT16 Reserved1;
716 UINT32 AddressBaseLow;
717 UINT32 AddressBaseHigh;
718 UINT32 LengthLow;
719 UINT32 LengthHigh;
720 UINT32 Reserved2;
721 UINT32 Flags;
722 UINT64 Reserved3;
723 } EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;
724
725 //
726 // Memory Flags. All other bits are reserved and must be 0.
727 //
728 #define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)
729 #define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)
730 #define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)
731
732 ///
733 /// Processor Local x2APIC Affinity Structure Definition
734 ///
735 typedef struct {
736 UINT8 Type;
737 UINT8 Length;
738 UINT8 Reserved1[2];
739 UINT32 ProximityDomain;
740 UINT32 X2ApicId;
741 UINT32 Flags;
742 UINT32 ClockDomain;
743 UINT8 Reserved2[4];
744 } EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
745
746 ///
747 /// System Locality Distance Information Table (SLIT).
748 /// The rest of the table is a matrix.
749 ///
750 typedef struct {
751 EFI_ACPI_DESCRIPTION_HEADER Header;
752 UINT64 NumberOfSystemLocalities;
753 } EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
754
755 ///
756 /// SLIT Version (as defined in ACPI 5.0 spec.)
757 ///
758 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
759
760 ///
761 /// Corrected Platform Error Polling Table (CPEP)
762 ///
763 typedef struct {
764 EFI_ACPI_DESCRIPTION_HEADER Header;
765 UINT8 Reserved[8];
766 } EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
767
768 ///
769 /// CPEP Version (as defined in ACPI 5.0 spec.)
770 ///
771 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
772
773 //
774 // CPEP processor structure types.
775 //
776 #define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00
777
778 ///
779 /// Corrected Platform Error Polling Processor Structure Definition
780 ///
781 typedef struct {
782 UINT8 Type;
783 UINT8 Length;
784 UINT8 ProcessorId;
785 UINT8 ProcessorEid;
786 UINT32 PollingInterval;
787 } EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
788
789 ///
790 /// Maximum System Characteristics Table (MSCT)
791 ///
792 typedef struct {
793 EFI_ACPI_DESCRIPTION_HEADER Header;
794 UINT32 OffsetProxDomInfo;
795 UINT32 MaximumNumberOfProximityDomains;
796 UINT32 MaximumNumberOfClockDomains;
797 UINT64 MaximumPhysicalAddress;
798 } EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
799
800 ///
801 /// MSCT Version (as defined in ACPI 5.0 spec.)
802 ///
803 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
804
805 ///
806 /// Maximum Proximity Domain Information Structure Definition
807 ///
808 typedef struct {
809 UINT8 Revision;
810 UINT8 Length;
811 UINT32 ProximityDomainRangeLow;
812 UINT32 ProximityDomainRangeHigh;
813 UINT32 MaximumProcessorCapacity;
814 UINT64 MaximumMemoryCapacity;
815 } EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
816
817 ///
818 /// ACPI RAS Feature Table definition.
819 ///
820 typedef struct {
821 EFI_ACPI_DESCRIPTION_HEADER Header;
822 UINT8 PlatformCommunicationChannelIdentifier[12];
823 } EFI_ACPI_5_0_RAS_FEATURE_TABLE;
824
825 ///
826 /// RASF Version (as defined in ACPI 5.0 spec.)
827 ///
828 #define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01
829
830 ///
831 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
832 ///
833 typedef struct {
834 UINT32 Signature;
835 UINT16 Command;
836 UINT16 Status;
837 UINT16 Version;
838 UINT8 RASCapabilities[16];
839 UINT8 SetRASCapabilities[16];
840 UINT16 NumberOfRASFParameterBlocks;
841 UINT32 SetRASCapabilitiesStatus;
842 } EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
843
844 ///
845 /// ACPI RASF PCC command code
846 ///
847 #define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01
848
849 ///
850 /// ACPI RASF Platform RAS Capabilities
851 ///
852 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01
853 #define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02
854
855 ///
856 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
857 ///
858 typedef struct {
859 UINT16 Type;
860 UINT16 Version;
861 UINT16 Length;
862 UINT16 PatrolScrubCommand;
863 UINT64 RequestedAddressRange[2];
864 UINT64 ActualAddressRange[2];
865 UINT16 Flags;
866 UINT8 RequestedSpeed;
867 } EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
868
869 ///
870 /// ACPI RASF Patrol Scrub command
871 ///
872 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01
873 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02
874 #define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03
875
876 ///
877 /// Memory Power State Table definition.
878 ///
879 typedef struct {
880 EFI_ACPI_DESCRIPTION_HEADER Header;
881 UINT8 PlatformCommunicationChannelIdentifier;
882 UINT8 Reserved[3];
883 // Memory Power Node Structure
884 // Memory Power State Characteristics
885 } EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;
886
887 ///
888 /// MPST Version (as defined in ACPI 5.0 spec.)
889 ///
890 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01
891
892 ///
893 /// MPST Platform Communication Channel Shared Memory Region definition.
894 ///
895 typedef struct {
896 UINT32 Signature;
897 UINT16 Command;
898 UINT16 Status;
899 UINT32 MemoryPowerCommandRegister;
900 UINT32 MemoryPowerStatusRegister;
901 UINT32 PowerStateId;
902 UINT32 MemoryPowerNodeId;
903 UINT64 MemoryEnergyConsumed;
904 UINT64 ExpectedAveragePowerComsuned;
905 } EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
906
907 ///
908 /// ACPI MPST PCC command code
909 ///
910 #define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03
911
912 ///
913 /// ACPI MPST Memory Power command
914 ///
915 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01
916 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02
917 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03
918 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04
919
920 ///
921 /// MPST Memory Power Node Table
922 ///
923 typedef struct {
924 UINT8 PowerStateValue;
925 UINT8 PowerStateInformationIndex;
926 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;
927
928 typedef struct {
929 UINT8 Flag;
930 UINT8 Reserved;
931 UINT16 MemoryPowerNodeId;
932 UINT32 Length;
933 UINT64 AddressBase;
934 UINT64 AddressLength;
935 UINT32 NumberOfPowerStates;
936 UINT32 NumberOfPhysicalComponents;
937 //EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];
938 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];
939 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;
940
941 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01
942 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02
943 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04
944
945 typedef struct {
946 UINT16 MemoryPowerNodeCount;
947 UINT8 Reserved[2];
948 } EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;
949
950 ///
951 /// MPST Memory Power State Characteristics Table
952 ///
953 typedef struct {
954 UINT8 PowerStateStructureID;
955 UINT8 Flag;
956 UINT16 Reserved;
957 UINT32 AveragePowerConsumedInMPS0;
958 UINT32 RelativePowerSavingToMPS0;
959 UINT64 ExitLatencyToMPS0;
960 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
961
962 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01
963 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02
964 #define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04
965
966 typedef struct {
967 UINT16 MemoryPowerStateCharacteristicsCount;
968 UINT8 Reserved[2];
969 } EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
970
971 ///
972 /// Memory Topology Table definition.
973 ///
974 typedef struct {
975 EFI_ACPI_DESCRIPTION_HEADER Header;
976 UINT32 Reserved;
977 } EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;
978
979 ///
980 /// PMTT Version (as defined in ACPI 5.0 spec.)
981 ///
982 #define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
983
984 ///
985 /// Common Memory Aggregator Device Structure.
986 ///
987 typedef struct {
988 UINT8 Type;
989 UINT8 Reserved;
990 UINT16 Length;
991 UINT16 Flags;
992 UINT16 Reserved1;
993 } EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
994
995 ///
996 /// Memory Aggregator Device Type
997 ///
998 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1
999 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
1000 #define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3
1001
1002 ///
1003 /// Socket Memory Aggregator Device Structure.
1004 ///
1005 typedef struct {
1006 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1007 UINT16 SocketIdentifier;
1008 UINT16 Reserved;
1009 //EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];
1010 } EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1011
1012 ///
1013 /// MemoryController Memory Aggregator Device Structure.
1014 ///
1015 typedef struct {
1016 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1017 UINT32 ReadLatency;
1018 UINT32 WriteLatency;
1019 UINT32 ReadBandwidth;
1020 UINT32 WriteBandwidth;
1021 UINT16 OptimalAccessUnit;
1022 UINT16 OptimalAccessAlignment;
1023 UINT16 Reserved;
1024 UINT16 NumberOfProximityDomains;
1025 //UINT32 ProximityDomain[NumberOfProximityDomains];
1026 //EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];
1027 } EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1028
1029 ///
1030 /// DIMM Memory Aggregator Device Structure.
1031 ///
1032 typedef struct {
1033 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;
1034 UINT16 PhysicalComponentIdentifier;
1035 UINT16 Reserved;
1036 UINT32 SizeOfDimm;
1037 UINT32 SmbiosHandle;
1038 } EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
1039
1040 ///
1041 /// Boot Graphics Resource Table definition.
1042 ///
1043 typedef struct {
1044 EFI_ACPI_DESCRIPTION_HEADER Header;
1045 ///
1046 /// 2-bytes (16 bit) version ID. This value must be 1.
1047 ///
1048 UINT16 Version;
1049 ///
1050 /// 1-byte status field indicating current status about the table.
1051 /// Bits[7:1] = Reserved (must be zero)
1052 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.
1053 ///
1054 UINT8 Status;
1055 ///
1056 /// 1-byte enumerated type field indicating format of the image.
1057 /// 0 = Bitmap
1058 /// 1 - 255 Reserved (for future use)
1059 ///
1060 UINT8 ImageType;
1061 ///
1062 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1063 /// of the image bitmap.
1064 ///
1065 UINT64 ImageAddress;
1066 ///
1067 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1068 /// (X, Y) display offset of the top left corner of the boot image.
1069 /// The top left corner of the display is at offset (0, 0).
1070 ///
1071 UINT32 ImageOffsetX;
1072 ///
1073 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1074 /// (X, Y) display offset of the top left corner of the boot image.
1075 /// The top left corner of the display is at offset (0, 0).
1076 ///
1077 UINT32 ImageOffsetY;
1078 } EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;
1079
1080 ///
1081 /// BGRT Revision
1082 ///
1083 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1084
1085 ///
1086 /// BGRT Version
1087 ///
1088 #define EFI_ACPI_5_0_BGRT_VERSION 0x01
1089
1090 ///
1091 /// BGRT Status
1092 ///
1093 #define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00
1094 #define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01
1095 #define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED
1096 #define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED
1097
1098 ///
1099 /// BGRT Image Type
1100 ///
1101 #define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00
1102
1103 ///
1104 /// FPDT Version (as defined in ACPI 5.0 spec.)
1105 ///
1106 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1107
1108 ///
1109 /// FPDT Performance Record Types
1110 ///
1111 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000
1112 #define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001
1113
1114 ///
1115 /// FPDT Performance Record Revision
1116 ///
1117 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01
1118 #define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1119
1120 ///
1121 /// FPDT Runtime Performance Record Types
1122 ///
1123 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000
1124 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001
1125 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002
1126
1127 ///
1128 /// FPDT Runtime Performance Record Revision
1129 ///
1130 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01
1131 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01
1132 #define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02
1133
1134 ///
1135 /// FPDT Performance Record header
1136 ///
1137 typedef struct {
1138 UINT16 Type;
1139 UINT8 Length;
1140 UINT8 Revision;
1141 } EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;
1142
1143 ///
1144 /// FPDT Performance Table header
1145 ///
1146 typedef struct {
1147 UINT32 Signature;
1148 UINT32 Length;
1149 } EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;
1150
1151 ///
1152 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1153 ///
1154 typedef struct {
1155 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1156 UINT32 Reserved;
1157 ///
1158 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1159 ///
1160 UINT64 BootPerformanceTablePointer;
1161 } EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1162
1163 ///
1164 /// FPDT S3 Performance Table Pointer Record Structure
1165 ///
1166 typedef struct {
1167 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1168 UINT32 Reserved;
1169 ///
1170 /// 64-bit processor-relative physical address of the S3 Performance Table.
1171 ///
1172 UINT64 S3PerformanceTablePointer;
1173 } EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1174
1175 ///
1176 /// FPDT Firmware Basic Boot Performance Record Structure
1177 ///
1178 typedef struct {
1179 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1180 UINT32 Reserved;
1181 ///
1182 /// Timer value logged at the beginning of firmware image execution.
1183 /// This may not always be zero or near zero.
1184 ///
1185 UINT64 ResetEnd;
1186 ///
1187 /// Timer value logged just prior to loading the OS boot loader into memory.
1188 /// For non-UEFI compatible boots, this field must be zero.
1189 ///
1190 UINT64 OsLoaderLoadImageStart;
1191 ///
1192 /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1193 /// For non-UEFI compatible boots, the timer value logged will be just prior
1194 /// to the INT 19h handler invocation.
1195 ///
1196 UINT64 OsLoaderStartImageStart;
1197 ///
1198 /// Timer value logged at the point when the OS loader calls the
1199 /// ExitBootServices function for UEFI compatible firmware.
1200 /// For non-UEFI compatible boots, this field must be zero.
1201 ///
1202 UINT64 ExitBootServicesEntry;
1203 ///
1204 /// Timer value logged at the point just prior towhen the OS loader gaining
1205 /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1206 /// For non-UEFI compatible boots, this field must be zero.
1207 ///
1208 UINT64 ExitBootServicesExit;
1209 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1210
1211 ///
1212 /// FPDT Firmware Basic Boot Performance Table signature
1213 ///
1214 #define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')
1215
1216 //
1217 // FPDT Firmware Basic Boot Performance Table
1218 //
1219 typedef struct {
1220 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1221 //
1222 // one or more Performance Records.
1223 //
1224 } EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1225
1226 ///
1227 /// FPDT "S3PT" S3 Performance Table
1228 ///
1229 #define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')
1230
1231 //
1232 // FPDT Firmware S3 Boot Performance Table
1233 //
1234 typedef struct {
1235 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;
1236 //
1237 // one or more Performance Records.
1238 //
1239 } EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;
1240
1241 ///
1242 /// FPDT Basic S3 Resume Performance Record
1243 ///
1244 typedef struct {
1245 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1246 ///
1247 /// A count of the number of S3 resume cycles since the last full boot sequence.
1248 ///
1249 UINT32 ResumeCount;
1250 ///
1251 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1252 /// OS waking vector. Only the most recent resume cycle's time is retained.
1253 ///
1254 UINT64 FullResume;
1255 ///
1256 /// Average timer value of all resume cycles logged since the last full boot
1257 /// sequence, including the most recent resume. Note that the entire log of
1258 /// timer values does not need to be retained in order to calculate this average.
1259 ///
1260 UINT64 AverageResume;
1261 } EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;
1262
1263 ///
1264 /// FPDT Basic S3 Suspend Performance Record
1265 ///
1266 typedef struct {
1267 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;
1268 ///
1269 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1270 /// Only the most recent suspend cycle's timer value is retained.
1271 ///
1272 UINT64 SuspendStart;
1273 ///
1274 /// Timer value recorded at the final firmware write to SLP_TYP (or other
1275 /// mechanism) used to trigger hardware entry to S3.
1276 /// Only the most recent suspend cycle's timer value is retained.
1277 ///
1278 UINT64 SuspendEnd;
1279 } EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;
1280
1281 ///
1282 /// Firmware Performance Record Table definition.
1283 ///
1284 typedef struct {
1285 EFI_ACPI_DESCRIPTION_HEADER Header;
1286 } EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1287
1288 ///
1289 /// Generic Timer Description Table definition.
1290 ///
1291 typedef struct {
1292 EFI_ACPI_DESCRIPTION_HEADER Header;
1293 UINT64 PhysicalAddress;
1294 UINT32 GlobalFlags;
1295 UINT32 SecurePL1TimerGSIV;
1296 UINT32 SecurePL1TimerFlags;
1297 UINT32 NonSecurePL1TimerGSIV;
1298 UINT32 NonSecurePL1TimerFlags;
1299 UINT32 VirtualTimerGSIV;
1300 UINT32 VirtualTimerFlags;
1301 UINT32 NonSecurePL2TimerGSIV;
1302 UINT32 NonSecurePL2TimerFlags;
1303 } EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;
1304
1305 ///
1306 /// GTDT Version (as defined in ACPI 5.0 spec.)
1307 ///
1308 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01
1309
1310 ///
1311 /// Global Flags. All other bits are reserved and must be 0.
1312 ///
1313 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0
1314 #define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1
1315
1316 ///
1317 /// Timer Flags. All other bits are reserved and must be 0.
1318 ///
1319 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0
1320 #define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1
1321
1322 ///
1323 /// Boot Error Record Table (BERT)
1324 ///
1325 typedef struct {
1326 EFI_ACPI_DESCRIPTION_HEADER Header;
1327 UINT32 BootErrorRegionLength;
1328 UINT64 BootErrorRegion;
1329 } EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;
1330
1331 ///
1332 /// BERT Version (as defined in ACPI 5.0 spec.)
1333 ///
1334 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1335
1336 ///
1337 /// Boot Error Region Block Status Definition
1338 ///
1339 typedef struct {
1340 UINT32 UncorrectableErrorValid:1;
1341 UINT32 CorrectableErrorValid:1;
1342 UINT32 MultipleUncorrectableErrors:1;
1343 UINT32 MultipleCorrectableErrors:1;
1344 UINT32 ErrorDataEntryCount:10;
1345 UINT32 Reserved:18;
1346 } EFI_ACPI_5_0_ERROR_BLOCK_STATUS;
1347
1348 ///
1349 /// Boot Error Region Definition
1350 ///
1351 typedef struct {
1352 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1353 UINT32 RawDataOffset;
1354 UINT32 RawDataLength;
1355 UINT32 DataLength;
1356 UINT32 ErrorSeverity;
1357 } EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;
1358
1359 //
1360 // Boot Error Severity types
1361 //
1362 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00
1363 #define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01
1364 #define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02
1365 #define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03
1366
1367 ///
1368 /// Generic Error Data Entry Definition
1369 ///
1370 typedef struct {
1371 UINT8 SectionType[16];
1372 UINT32 ErrorSeverity;
1373 UINT16 Revision;
1374 UINT8 ValidationBits;
1375 UINT8 Flags;
1376 UINT32 ErrorDataLength;
1377 UINT8 FruId[16];
1378 UINT8 FruText[20];
1379 } EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1380
1381 ///
1382 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)
1383 ///
1384 #define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201
1385
1386 ///
1387 /// HEST - Hardware Error Source Table
1388 ///
1389 typedef struct {
1390 EFI_ACPI_DESCRIPTION_HEADER Header;
1391 UINT32 ErrorSourceCount;
1392 } EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1393
1394 ///
1395 /// HEST Version (as defined in ACPI 5.0 spec.)
1396 ///
1397 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1398
1399 //
1400 // Error Source structure types.
1401 //
1402 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00
1403 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01
1404 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02
1405 #define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06
1406 #define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07
1407 #define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08
1408 #define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09
1409
1410 //
1411 // Error Source structure flags.
1412 //
1413 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)
1414 #define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)
1415
1416 ///
1417 /// IA-32 Architecture Machine Check Exception Structure Definition
1418 ///
1419 typedef struct {
1420 UINT16 Type;
1421 UINT16 SourceId;
1422 UINT8 Reserved0[2];
1423 UINT8 Flags;
1424 UINT8 Enabled;
1425 UINT32 NumberOfRecordsToPreAllocate;
1426 UINT32 MaxSectionsPerRecord;
1427 UINT64 GlobalCapabilityInitData;
1428 UINT64 GlobalControlInitData;
1429 UINT8 NumberOfHardwareBanks;
1430 UINT8 Reserved1[7];
1431 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1432
1433 ///
1434 /// IA-32 Architecture Machine Check Bank Structure Definition
1435 ///
1436 typedef struct {
1437 UINT8 BankNumber;
1438 UINT8 ClearStatusOnInitialization;
1439 UINT8 StatusDataFormat;
1440 UINT8 Reserved0;
1441 UINT32 ControlRegisterMsrAddress;
1442 UINT64 ControlInitData;
1443 UINT32 StatusRegisterMsrAddress;
1444 UINT32 AddressRegisterMsrAddress;
1445 UINT32 MiscRegisterMsrAddress;
1446 } EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1447
1448 ///
1449 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1450 ///
1451 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00
1452 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01
1453 #define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02
1454
1455 //
1456 // Hardware Error Notification types. All other values are reserved
1457 //
1458 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00
1459 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01
1460 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02
1461 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03
1462 #define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04
1463
1464 ///
1465 /// Hardware Error Notification Configuration Write Enable Structure Definition
1466 ///
1467 typedef struct {
1468 UINT16 Type:1;
1469 UINT16 PollInterval:1;
1470 UINT16 SwitchToPollingThresholdValue:1;
1471 UINT16 SwitchToPollingThresholdWindow:1;
1472 UINT16 ErrorThresholdValue:1;
1473 UINT16 ErrorThresholdWindow:1;
1474 UINT16 Reserved:10;
1475 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1476
1477 ///
1478 /// Hardware Error Notification Structure Definition
1479 ///
1480 typedef struct {
1481 UINT8 Type;
1482 UINT8 Length;
1483 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;
1484 UINT32 PollInterval;
1485 UINT32 Vector;
1486 UINT32 SwitchToPollingThresholdValue;
1487 UINT32 SwitchToPollingThresholdWindow;
1488 UINT32 ErrorThresholdValue;
1489 UINT32 ErrorThresholdWindow;
1490 } EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1491
1492 ///
1493 /// IA-32 Architecture Corrected Machine Check Structure Definition
1494 ///
1495 typedef struct {
1496 UINT16 Type;
1497 UINT16 SourceId;
1498 UINT8 Reserved0[2];
1499 UINT8 Flags;
1500 UINT8 Enabled;
1501 UINT32 NumberOfRecordsToPreAllocate;
1502 UINT32 MaxSectionsPerRecord;
1503 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1504 UINT8 NumberOfHardwareBanks;
1505 UINT8 Reserved1[3];
1506 } EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1507
1508 ///
1509 /// IA-32 Architecture NMI Error Structure Definition
1510 ///
1511 typedef struct {
1512 UINT16 Type;
1513 UINT16 SourceId;
1514 UINT8 Reserved0[2];
1515 UINT32 NumberOfRecordsToPreAllocate;
1516 UINT32 MaxSectionsPerRecord;
1517 UINT32 MaxRawDataLength;
1518 } EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1519
1520 ///
1521 /// PCI Express Root Port AER Structure Definition
1522 ///
1523 typedef struct {
1524 UINT16 Type;
1525 UINT16 SourceId;
1526 UINT8 Reserved0[2];
1527 UINT8 Flags;
1528 UINT8 Enabled;
1529 UINT32 NumberOfRecordsToPreAllocate;
1530 UINT32 MaxSectionsPerRecord;
1531 UINT32 Bus;
1532 UINT16 Device;
1533 UINT16 Function;
1534 UINT16 DeviceControl;
1535 UINT8 Reserved1[2];
1536 UINT32 UncorrectableErrorMask;
1537 UINT32 UncorrectableErrorSeverity;
1538 UINT32 CorrectableErrorMask;
1539 UINT32 AdvancedErrorCapabilitiesAndControl;
1540 UINT32 RootErrorCommand;
1541 } EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1542
1543 ///
1544 /// PCI Express Device AER Structure Definition
1545 ///
1546 typedef struct {
1547 UINT16 Type;
1548 UINT16 SourceId;
1549 UINT8 Reserved0[2];
1550 UINT8 Flags;
1551 UINT8 Enabled;
1552 UINT32 NumberOfRecordsToPreAllocate;
1553 UINT32 MaxSectionsPerRecord;
1554 UINT32 Bus;
1555 UINT16 Device;
1556 UINT16 Function;
1557 UINT16 DeviceControl;
1558 UINT8 Reserved1[2];
1559 UINT32 UncorrectableErrorMask;
1560 UINT32 UncorrectableErrorSeverity;
1561 UINT32 CorrectableErrorMask;
1562 UINT32 AdvancedErrorCapabilitiesAndControl;
1563 } EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1564
1565 ///
1566 /// PCI Express Bridge AER Structure Definition
1567 ///
1568 typedef struct {
1569 UINT16 Type;
1570 UINT16 SourceId;
1571 UINT8 Reserved0[2];
1572 UINT8 Flags;
1573 UINT8 Enabled;
1574 UINT32 NumberOfRecordsToPreAllocate;
1575 UINT32 MaxSectionsPerRecord;
1576 UINT32 Bus;
1577 UINT16 Device;
1578 UINT16 Function;
1579 UINT16 DeviceControl;
1580 UINT8 Reserved1[2];
1581 UINT32 UncorrectableErrorMask;
1582 UINT32 UncorrectableErrorSeverity;
1583 UINT32 CorrectableErrorMask;
1584 UINT32 AdvancedErrorCapabilitiesAndControl;
1585 UINT32 SecondaryUncorrectableErrorMask;
1586 UINT32 SecondaryUncorrectableErrorSeverity;
1587 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;
1588 } EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1589
1590 ///
1591 /// Generic Hardware Error Source Structure Definition
1592 ///
1593 typedef struct {
1594 UINT16 Type;
1595 UINT16 SourceId;
1596 UINT16 RelatedSourceId;
1597 UINT8 Flags;
1598 UINT8 Enabled;
1599 UINT32 NumberOfRecordsToPreAllocate;
1600 UINT32 MaxSectionsPerRecord;
1601 UINT32 MaxRawDataLength;
1602 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;
1603 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;
1604 UINT32 ErrorStatusBlockLength;
1605 } EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1606
1607 ///
1608 /// Generic Error Status Definition
1609 ///
1610 typedef struct {
1611 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;
1612 UINT32 RawDataOffset;
1613 UINT32 RawDataLength;
1614 UINT32 DataLength;
1615 UINT32 ErrorSeverity;
1616 } EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;
1617
1618 ///
1619 /// ERST - Error Record Serialization Table
1620 ///
1621 typedef struct {
1622 EFI_ACPI_DESCRIPTION_HEADER Header;
1623 UINT32 SerializationHeaderSize;
1624 UINT8 Reserved0[4];
1625 UINT32 InstructionEntryCount;
1626 } EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1627
1628 ///
1629 /// ERST Version (as defined in ACPI 5.0 spec.)
1630 ///
1631 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1632
1633 ///
1634 /// ERST Serialization Actions
1635 ///
1636 #define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00
1637 #define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01
1638 #define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02
1639 #define EFI_ACPI_5_0_ERST_END_OPERATION 0x03
1640 #define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04
1641 #define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05
1642 #define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06
1643 #define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07
1644 #define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08
1645 #define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09
1646 #define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A
1647 #define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B
1648 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D
1649 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E
1650 #define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F
1651
1652 ///
1653 /// ERST Action Command Status
1654 ///
1655 #define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00
1656 #define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01
1657 #define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02
1658 #define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03
1659 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04
1660 #define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05
1661
1662 ///
1663 /// ERST Serialization Instructions
1664 ///
1665 #define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00
1666 #define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01
1667 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02
1668 #define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03
1669 #define EFI_ACPI_5_0_ERST_NOOP 0x04
1670 #define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05
1671 #define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06
1672 #define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07
1673 #define EFI_ACPI_5_0_ERST_ADD 0x08
1674 #define EFI_ACPI_5_0_ERST_SUBTRACT 0x09
1675 #define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A
1676 #define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B
1677 #define EFI_ACPI_5_0_ERST_STALL 0x0C
1678 #define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D
1679 #define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E
1680 #define EFI_ACPI_5_0_ERST_GOTO 0x0F
1681 #define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10
1682 #define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11
1683 #define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12
1684
1685 ///
1686 /// ERST Instruction Flags
1687 ///
1688 #define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01
1689
1690 ///
1691 /// ERST Serialization Instruction Entry
1692 ///
1693 typedef struct {
1694 UINT8 SerializationAction;
1695 UINT8 Instruction;
1696 UINT8 Flags;
1697 UINT8 Reserved0;
1698 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1699 UINT64 Value;
1700 UINT64 Mask;
1701 } EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1702
1703 ///
1704 /// EINJ - Error Injection Table
1705 ///
1706 typedef struct {
1707 EFI_ACPI_DESCRIPTION_HEADER Header;
1708 UINT32 InjectionHeaderSize;
1709 UINT8 InjectionFlags;
1710 UINT8 Reserved0[3];
1711 UINT32 InjectionEntryCount;
1712 } EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;
1713
1714 ///
1715 /// EINJ Version (as defined in ACPI 5.0 spec.)
1716 ///
1717 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01
1718
1719 ///
1720 /// EINJ Error Injection Actions
1721 ///
1722 #define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00
1723 #define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01
1724 #define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02
1725 #define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03
1726 #define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04
1727 #define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05
1728 #define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06
1729 #define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07
1730 #define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF
1731
1732 ///
1733 /// EINJ Action Command Status
1734 ///
1735 #define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00
1736 #define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01
1737 #define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02
1738
1739 ///
1740 /// EINJ Error Type Definition
1741 ///
1742 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)
1743 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)
1744 #define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)
1745 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)
1746 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)
1747 #define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)
1748 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)
1749 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)
1750 #define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)
1751 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)
1752 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)
1753 #define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)
1754
1755 ///
1756 /// EINJ Injection Instructions
1757 ///
1758 #define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00
1759 #define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01
1760 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02
1761 #define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03
1762 #define EFI_ACPI_5_0_EINJ_NOOP 0x04
1763
1764 ///
1765 /// EINJ Instruction Flags
1766 ///
1767 #define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01
1768
1769 ///
1770 /// EINJ Injection Instruction Entry
1771 ///
1772 typedef struct {
1773 UINT8 InjectionAction;
1774 UINT8 Instruction;
1775 UINT8 Flags;
1776 UINT8 Reserved0;
1777 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
1778 UINT64 Value;
1779 UINT64 Mask;
1780 } EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;
1781
1782 ///
1783 /// EINJ Trigger Action Table
1784 ///
1785 typedef struct {
1786 UINT32 HeaderSize;
1787 UINT32 Revision;
1788 UINT32 TableSize;
1789 UINT32 EntryCount;
1790 } EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;
1791
1792 ///
1793 /// Platform Communications Channel Table (PCCT)
1794 ///
1795 typedef struct {
1796 EFI_ACPI_DESCRIPTION_HEADER Header;
1797 UINT32 Flags;
1798 UINT64 Reserved;
1799 } EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1800
1801 ///
1802 /// PCCT Version (as defined in ACPI 5.0 spec.)
1803 ///
1804 #define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1805
1806 ///
1807 /// PCCT Global Flags
1808 ///
1809 #define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0
1810
1811 //
1812 // PCCT Subspace type
1813 //
1814 #define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00
1815
1816 ///
1817 /// PCC Subspace Structure Header
1818 ///
1819 typedef struct {
1820 UINT8 Type;
1821 UINT8 Length;
1822 } EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;
1823
1824 ///
1825 /// Generic Communications Subspace Structure
1826 ///
1827 typedef struct {
1828 UINT8 Type;
1829 UINT8 Length;
1830 UINT8 Reserved[6];
1831 UINT64 BaseAddress;
1832 UINT64 AddressLength;
1833 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;
1834 UINT64 DoorbellPreserve;
1835 UINT64 DoorbellWrite;
1836 UINT32 NominalLatency;
1837 UINT32 MaximumPeriodicAccessRate;
1838 UINT16 MinimumRequestTurnaroundTime;
1839 } EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;
1840
1841 ///
1842 /// Generic Communications Channel Shared Memory Region
1843 ///
1844
1845 typedef struct {
1846 UINT8 Command;
1847 UINT8 Reserved:7;
1848 UINT8 GenerateSci:1;
1849 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1850
1851 typedef struct {
1852 UINT8 CommandComplete:1;
1853 UINT8 SciDoorbell:1;
1854 UINT8 Error:1;
1855 UINT8 PlatformNotification:1;
1856 UINT8 Reserved:4;
1857 UINT8 Reserved1;
1858 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1859
1860 typedef struct {
1861 UINT32 Signature;
1862 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;
1863 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;
1864 } EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1865
1866 //
1867 // Known table signatures
1868 //
1869
1870 ///
1871 /// "RSD PTR " Root System Description Pointer
1872 ///
1873 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1874
1875 ///
1876 /// "APIC" Multiple APIC Description Table
1877 ///
1878 #define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')
1879
1880 ///
1881 /// "BERT" Boot Error Record Table
1882 ///
1883 #define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')
1884
1885 ///
1886 /// "BGRT" Boot Graphics Resource Table
1887 ///
1888 #define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')
1889
1890 ///
1891 /// "CPEP" Corrected Platform Error Polling Table
1892 ///
1893 #define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')
1894
1895 ///
1896 /// "DSDT" Differentiated System Description Table
1897 ///
1898 #define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')
1899
1900 ///
1901 /// "ECDT" Embedded Controller Boot Resources Table
1902 ///
1903 #define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')
1904
1905 ///
1906 /// "EINJ" Error Injection Table
1907 ///
1908 #define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')
1909
1910 ///
1911 /// "ERST" Error Record Serialization Table
1912 ///
1913 #define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')
1914
1915 ///
1916 /// "FACP" Fixed ACPI Description Table
1917 ///
1918 #define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')
1919
1920 ///
1921 /// "FACS" Firmware ACPI Control Structure
1922 ///
1923 #define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')
1924
1925 ///
1926 /// "FPDT" Firmware Performance Data Table
1927 ///
1928 #define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')
1929
1930 ///
1931 /// "GTDT" Generic Timer Description Table
1932 ///
1933 #define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')
1934
1935 ///
1936 /// "HEST" Hardware Error Source Table
1937 ///
1938 #define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')
1939
1940 ///
1941 /// "MPST" Memory Power State Table
1942 ///
1943 #define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')
1944
1945 ///
1946 /// "MSCT" Maximum System Characteristics Table
1947 ///
1948 #define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')
1949
1950 ///
1951 /// "PMTT" Platform Memory Topology Table
1952 ///
1953 #define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')
1954
1955 ///
1956 /// "PSDT" Persistent System Description Table
1957 ///
1958 #define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')
1959
1960 ///
1961 /// "RASF" ACPI RAS Feature Table
1962 ///
1963 #define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')
1964
1965 ///
1966 /// "RSDT" Root System Description Table
1967 ///
1968 #define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')
1969
1970 ///
1971 /// "SBST" Smart Battery Specification Table
1972 ///
1973 #define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')
1974
1975 ///
1976 /// "SLIT" System Locality Information Table
1977 ///
1978 #define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')
1979
1980 ///
1981 /// "SRAT" System Resource Affinity Table
1982 ///
1983 #define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')
1984
1985 ///
1986 /// "SSDT" Secondary System Description Table
1987 ///
1988 #define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')
1989
1990 ///
1991 /// "XSDT" Extended System Description Table
1992 ///
1993 #define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')
1994
1995 ///
1996 /// "BOOT" MS Simple Boot Spec
1997 ///
1998 #define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')
1999
2000 ///
2001 /// "CSRT" MS Core System Resource Table
2002 ///
2003 #define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')
2004
2005 ///
2006 /// "DBG2" MS Debug Port 2 Spec
2007 ///
2008 #define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')
2009
2010 ///
2011 /// "DBGP" MS Debug Port Spec
2012 ///
2013 #define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')
2014
2015 ///
2016 /// "DMAR" DMA Remapping Table
2017 ///
2018 #define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')
2019
2020 ///
2021 /// "DRTM" Dynamic Root of Trust for Measurement Table
2022 ///
2023 #define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')
2024
2025 ///
2026 /// "ETDT" Event Timer Description Table
2027 ///
2028 #define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')
2029
2030 ///
2031 /// "HPET" IA-PC High Precision Event Timer Table
2032 ///
2033 #define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')
2034
2035 ///
2036 /// "iBFT" iSCSI Boot Firmware Table
2037 ///
2038 #define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')
2039
2040 ///
2041 /// "IVRS" I/O Virtualization Reporting Structure
2042 ///
2043 #define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')
2044
2045 ///
2046 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2047 ///
2048 #define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')
2049
2050 ///
2051 /// "MCHI" Management Controller Host Interface Table
2052 ///
2053 #define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')
2054
2055 ///
2056 /// "MSDM" MS Data Management Table
2057 ///
2058 #define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')
2059
2060 ///
2061 /// "SLIC" MS Software Licensing Table Specification
2062 ///
2063 #define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')
2064
2065 ///
2066 /// "SPCR" Serial Port Concole Redirection Table
2067 ///
2068 #define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')
2069
2070 ///
2071 /// "SPMI" Server Platform Management Interface Table
2072 ///
2073 #define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')
2074
2075 ///
2076 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2077 ///
2078 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')
2079
2080 ///
2081 /// "TPM2" Trusted Computing Platform 1 Table
2082 ///
2083 #define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')
2084
2085 ///
2086 /// "UEFI" UEFI ACPI Data Table
2087 ///
2088 #define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')
2089
2090 ///
2091 /// "WAET" Windows ACPI Emulated Devices Table
2092 ///
2093 #define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')
2094 #define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE
2095
2096 ///
2097 /// "WDAT" Watchdog Action Table
2098 ///
2099 #define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')
2100
2101 ///
2102 /// "WDRT" Watchdog Resource Table
2103 ///
2104 #define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')
2105
2106 ///
2107 /// "WPBT" MS Platform Binary Table
2108 ///
2109 #define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')
2110
2111 #pragma pack()
2112
2113 #endif